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A Short-term Aircraft Trajectory Prediction Framework Using Conditional Generative Adversarial network 4

A Short-term Aircraft Trajectory Prediction Framework Using ...

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4th ieee International conference on Civil Aviation Safety and Information Technology, ICCASIT 2022

作者： Hu, Qinzhi Huang, Guoxin Shi, Han Lin, Yi Guo, Dongyue National Key Laboratory of Air Traffic Control Automation System Technology College of Computer Science Sichuan University Chengdu China National Key Laboratory of Fundamental Science on Synthetic Vision Sichuan University Chengdu China

ISBN: (数字)9781665467667

ISBN: (纸本)9781665467667

Short-term aircraft trajectory prediction (TP) plays an important role in current air traffic control systems. However, existing works usually perform the multi-horizon TP task in an iterated manner which easily suffers from error accumulation problems. In this work, a novel short-term aircraft TP framework, called TPGAN, is proposed which predicts the multi-horizon trajectory in a single step using the conditional generative adversarial network (CGAN). Compared with the conventional approaches, the TP task is formulated to the probability distribution estimate problems by CGAN architecture. In this framework, the generator is employed to output the predictions while the discriminative features between ground truth and predictions are learned by the discriminator. The generative adversarial training strategy is applied to optimize the proposed framework. Moreover, to validate the generality and effectiveness of the proposed framework, three neural network architectures are designed to develop the proposed framework, including Conv1D-TPGAN, Conv2D-TPGAN, and LSTM-TPGAN. In addition, a dataset collected from real-world ATC systems is used to construct the experiments. The experimental results demonstrated that the proposed framework achieves significantly performance improvements than baseline. © 2022 ieee.

关键词： Air traffic control

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PIM-HLS: An Automatic Hardware Generation Tool for Heterogeneous Processing-In-Memory-Based Neural network Accelerators 23

PIM-HLS: An Automatic Hardware Generation Tool for Heterogen...

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Proceedings of the 60th Annual ACM/ieee Design Automation conference

作者： Yu Zhu Zhenhua Zhu Guohao Dai Fengbin Tu Hanbo Sun Kwang-Ting Cheng Huazhong Yang Yu Wang Department of Electronic Engineering BNRist Tsinghua University Beijing China Qingyuan Research Institute Shanghai Jiao Tong University Shanghai China Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology Hong Kong

ISBN: (纸本)9798350323481

Processing-in-memory (PIM) architectures have shown great abilities for neural network (NN) acceleration on edge devices that demand low latency under severe area constraints. Heterogeneous PIM architectures with different PIM implementation approaches such as RRAM-based PIM and SRAM-based PIM can further improve the performance. However, the automatic generation of heterogeneous PIM architectures faces the following two unresolved problems. First, existing work has not considered the design for heterogeneous PIM-based NN accelerators with multiple memory technologies. Second, for PIM with insufficient memory on edge devices, it is challenging to find the optimal runtime weight scheduling strategy in an O(L!) optimization space for the NN with L *** this paper, we propose PIM-HLS, an automatic hardware generation tool for heterogeneous PIM-based NN accelerators. Aiming at the problems above, we first point out that heterogeneous PIM can improve the performance under severe area constraints. Then we optimize the architectures for each NN layer by taking the advantage of different memory technologies. We also define the optimization problem of runtime weight scheduling and mapping for the first time, and propose a dynamic-programming-based weight scheduling algorithm to reduce the optimization space to O(L2). We implement PIM-HLS to automatically generate the hardware code and the instructions. Results show that we achieve an averagely 5.9× speedup with 72.8% less area compared with state-of-the-art PIM designs.

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Placement of 5G RAN Slices in Multi-tier O-RAN 5G networks with Flexible Functional Splits 17

Placement of 5G RAN Slices in Multi-tier O-RAN 5G Networks w...

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17th International conference on network and Service Management (CNSM) - Smart Management for Future networks and Services

作者： Sarikaya, Egemen Onur, Ertan METU Dept Comp Engn Ankara Turkey

ISBN: (纸本)9783903176362

The network slicing concept has gained much attention with the development of software-defined network and network function virtualization technologies, enabling logically isolated networks for different purposes in the same network infrastructure. The virtualization of network functions enables the functional split of radio access network functions to fulfill different 5G radio access network requirements. Functional split can be expressed as deciding the distribution of radio access network functionalities between the radio unit placed at the edge of the network, the distributed unit placed close to the users, and the central unit placed centrally. The open radio access network concept is utilized to achieve a virtualized, interoperable radio access network among multiple vendors. In this work, we considered the placement of radio access network slices in a multi-tier 5G open radio access network architecture and formulated the problem as a Mixed-Integer Quadratically Constrained programming, considering different functional split options for each network slice separately. Our results showed that flexible functional split utilizes physical network resources and satisfies different network slice requirements better than fixed functional split options.

关键词： 5G open RAN network slicing RAN slicing VNF placement baseband function placement flexible functional split

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Comparison of Common Instrument Stack architectures for Small UAS and CubeSats

Comparison of Common Instrument Stack Architectures for Smal...

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ieee Aerospace conference (AeroConf)

作者： Siewert, Sam Rocha, Katherine Butcher, Trevor Pederson, Troy Calif State Univ Chico 400 W First St Chico CA 95929 USA ERAU 3700 Willow Creek Rd Prescott AZ 86301 USA

ISBN: (纸本)9781728174365

Both small satellites (e.g. CubeSats) and sUAS (small Unoccupied Aerial Systems) have a rapidly growing number of potential missions and can serve as platforms for a wide range of uses in science, communications, and remote sensing alone or together. The challenge is integrating these systems quickly and reliably with efficient payload operations. While much work has been completed to define and make flight control and operations available as open systems, fewer options exist for instrumentation. Some options are available for specific domains. For example, ROS (Robot Operating System) is used for many UAV (Unoccupied Aerial Vehicle) projects, but interdisciplinary use cases are non-trivial for projects that migrate payloads between UAVs and CubeSats or coordinate UAV and CubeSat joint missions. Common objectives and careful flight and ground configuration for both UAVs and CubeSats could provide a Common Instrument Stack Architecture (CISA). Many of the basic instrument integration objectives for CubeSats and sUAS share common requirements. The goal for the research architectures we are investigating, is to compare combinations of stack layers including: 1) the use of open source real-time operating systems (RTOS), such as FreeRTOS and Linux with real-time extensions, with 2) open middleware, such as ROS, cFS (core Flight System) or F Prime , and 3) image co-processing firmware. Previously developed and tested FPGA (Field Programmable Gate Array) and GP-GPU (General Purpose Graphics Processing Units) firmware for sUAS sensor networks will be integrated with CISA for performance testing. Ideally, we envision this architecture working for sensor networked flight instruments (sUAS and CubeSat) as well as ground systems (e.g. sUAS traffic management and CubeSat ground operations). To start, we are installing and evaluating the leading open-source middleware options in use for both UAVs and CubeSats integrated with our multi-core, GP-GPU, DPS, and FPGA image processing

关键词： Measurement Instruments Operating systems Robot sensing systems Real-time systems CubeSat Middleware

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Optimal Day-Ahead Orders Using Stochastic programming and Noise-Driven Recurrent Neural networks

Optimal Day-Ahead Orders Using Stochastic Programming and No...

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14th ieee Madrid PowerTech conference (ieee POWERTECH)

作者： Biel, Martin KTH Royal Inst Technol Sch Elect Engn & Comp Sci S-10044 Stockholm Sweden

ISBN: (纸本)9781665435970

This paper presents a methodology for strategic day-ahead planning that uses a combination of deep learning and optimization. A noise-driven recurrent neural network structure is proposed for forecasting electricity prices and local inflow to water reservoirs. The resulting forecasters generate predictions with seasonal variation without relying on long input sequences. This forecasting method is employed in a stochastic program formulation of the day-ahead problem. This results in optimal order strategies for a price-taking hydropower producer participating in the Nordic day-ahead market. Using an open-source software framework for stochastic programming, the model is implemented and distributed over multiple cores. The model is then solved in parallel using a sampling-based algorithm. Tight confidence intervals around the stochastic solution are provided, which show that the gain from adopting a stochastic approach is statistically significant.

关键词： Recurrent neural networks Software algorithms Stochastic processes Hydroelectric power generation programming Reservoirs Planning

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Proceedings of 2022 ieee International conference on Current Development in Engineering and Technology, CCET 2022

Proceedings of 2022 IEEE International Conference on Current...

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2022 ieee International conference on Current Development in Engineering and Technology, CCET 2022

ISBN: (纸本)9781665454155

The proceedings contain 132 papers. The topics discussed include: application security using SQL malware detection and prevention scheme;multimedia security in audio signals;role of blockchain and smart contracts in healthcare - challenges and benefits;cyber physical system architectures for pharmaceutical care services: challenges and future trends;block chain technology for limiting the impact of pandemic: open issues and challenges;design of encrypted steganography double secure algorithm using the Laguerre transform;generic signcryption-based certificate less security scheme for internet of things;enhancing the privacy protection in locations-based services through hybrid LSTM;ANN controller based single phase cascade thirty-one level grid-tied inverter for power quality improvement;AGC of deregulated electric network using slime mold optimization search strategy;exploring mind powers of rishis inspired optimization algorithm for genuine power loss reduction;energy management system and electric motors of electric vehicles: a review;designing of high voltage double - y type harmonic filter bank for reactive power compensation and harmonic mitigation of 350 ton/50 MVA ladle furnace at steel melt shop - a study of real case;and power signal disturbances analysis based on transfer learning in deep architecture.

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Parallel Optimization of Computational Fluid Dynamics Application code_saturne Based on Next Generation Sunway Supercomputer

Parallel Optimization of Computational Fluid Dynamics Applic...

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International Symposium on Parallel architectures, Algorithms and programming (PAAP)

作者： Anjun Liu Yin Liao Xihao Xu YanYan Chen Hongjun Zhong Jianming Wu Bo Kong Alexander Raikov Meng Guo Jinan Key Laboratory of High Performance Industrial Software Jinan Institute of Supercomputing Technology Jinan China Jinan Supercomputing-Zhejiang Yuansuan Industrial Simulation System Joint Laboratory Zhejiang Yuansuan Technology Co. Ltd Hangzhou China Key Laboratory of Computing Power Network and Information Security Ministry of Education Shandong Computer Science Center (National Supercomputer Center in Jinan ) Qilu University of Technology (Shandong Academy of Sciences) Shandong Provincial Key Laboratory of Computer Networks Shandong Fundamental Research Center for Computer Science Jinan China

code_saturne is an open-source general large-scale computational fluid dynamics software independently developed by Electricite de France since 1997. Due to its high computing performance, code_saturne has been widely used in the nuclear industry, heavy fuel and biomass combustion, particle tracking and other computational fluid dynamics fields. In this work, we implemented code_saturne on the new generation Sunway supercomputer (SW26010pro) at the first time. By applying the data value-taking technology of double cache, combined with Sunway shared memory technology, we have adapted the data structure and Modular programming of code_saturne conducively to the new generation Sunway supercomputer (SW26010pro) and accelerated the software hotspots the software hotspots by 1–2 times. After optimizing and porting, this software has successfully served in the numerical simulation of the lateral flow of fuel assemblies in the nuclear industry.

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Challenges in Migrating Imperative Deep Learning Programs to Graph Execution: An Empirical Study

Challenges in Migrating Imperative Deep Learning Programs to...

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19th International conference on Mining Software Repositories (MSR)

作者： Velez, Tatiana Castro Khatchadourian, Raffi Bagherzadeh, Mehdi Raja, Anita CUNY Grad Ctr New York NY 10017 USA CUNY Hunter Coll New York NY 10021 USA Oakland Univ Rochester MI 48063 USA

ISBN: (纸本)9781450393034

Efficiency is essential to support responsiveness w.r.t. ever-growing datasets, especially for Deep Learning (DL) systems. DL frameworks have traditionally embraced deferred execution-style DL code that supports symbolic, graph-based Deep Neural network (DNN) computation. While scalable, such development tends to produce DL code that is error-prone, non-intuitive, and difficult to debug. Consequently, more natural, less error-prone imperative DL frameworks encouraging eager execution have emerged at the expense of run-time performance. While hybrid approaches aim for the "best of both worlds," the challenges in applying them in the real world are largely unknown. We conduct a data-driven analysis of challenges-and resultant bugs-involved in writing reliable yet performant imperative DL code by studying 250 open-source projects, consisting of 19.7 MLOC, along with 470 and 446 manually examined code patches and bug reports, respectively. The results indicate that hybridization: (i) is prone to API misuse, (ii) can result in performance degradation-the opposite of its intention, and (iii) has limited application due to execution mode incompatibility. We put forth several recommendations, best practices, and anti-patterns for effectively hybridizing imperative DL code, potentially benefiting DL practitioners, API designers, tool developers, and educators.

关键词： empirical studies deep learning imperative programs hybrid programming paradigms graph-based execution software evolution

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PCC: An End-to-End Compilation Framework for Neural networks on Photonic-Electronic Accelerators

PCC: An End-to-End Compilation Framework for Neural Networks...

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ieee International conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： Bohan Hu Yinyi Liu Zhenguo Liu Wei Zhang Jiang Xu Microelectronic Thrust The Hong Kong University of Science and Technology (Guangzhou) Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology

ISBN: (数字)9798350380408

ISBN: (纸本)9798350380415

Photonic computing, known for its high bandwidth and energy efficiency, harnesses physical phenomena in the optical domain to accelerate a wide range of computational operations such as dot product, matrix multiplication, Fourier transform, 1D convolution, and more. However, the multitude of computational operations mentioned above poses challenges in mapping realistic neural network workloads onto underlying photonic hardware. This complexity requires extensive expertise and laborious programming, impeding the practical adoption and deployment of photonic acceleration. To address this gap, we propose an end-to-end compilation framework comprising a Photonic Compiler Collection (PCC). This framework automates the mapping of high-level deep neural network (DNN) specifications onto target architectures of photonic-electronic accelerators. Additionally, we present a method to streamline neural network workloads by leveraging the multilevel intermediate representation (MLIR) and compiler optimization techniques, targeting photonic-specific patterns. Moreover, we conduct a comprehensive case study illustrating the integration of a typical computational operator, the Mach-Zehnder Interferometer (MZI) mesh, into PCC. Our experimental results demonstrate that PCC achieves up to a 4x speedup on DNN workloads compared to handcrafted implementations. In summary, our proposed framework offers a practical and automated solution for compiling, optimizing, and flexibly sup-porting newer operators of photonic devices. We anticipate that our framework will significantly accelerate the development and deployment of photonic applications in real-world AI scenarios.

关键词： Optical interferometry Program processors Processor scheduling Optical design Artificial neural networks Optical computing programming Matrix converters Optimization Photonics

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Bounding the Complexity of Formally Verifying Neural networks: A Geometric Approach 60

Bounding the Complexity of Formally Verifying Neural Network...

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60th ieee conference on Decision and Control (CDC)

作者： Ferlez, James Shoukry, Yasser Univ Calif Irvine Dept Elect Engn & Comp Sci Irvine CA 92697 USA

ISBN: (纸本)9781665436595

In this paper, we consider the computational complexity of formally verifying the behavior of Rectified Linear Unit (ReLU) Neural networks (NNs), where verification entails determining whether the NN satisfies convex polytopic specifications. Specifically, we show that for two different NN architectures - shallow NNs and Two-Level Lattice (TLL) NNs - the verification problem with (convex) polytopic constraints is polynomial in the number of neurons in the NN to be verified, when all other aspects of the verification problem held fixed. We achieve these complexity results by exhibiting explicit (but similar) verification algorithms for each type of architecture. Both algorithms efficiently translate the NN parameters into a partitioning of the NN's input space by means of hyperplanes;this has the effect of partitioning the original verification problem into polynomially many sub-verification problems derived from the geometry of the neurons. We show that these sub-problems may be chosen so that the NN is purely affine within each, and hence each sub-problem is solvable in polynomial time by means of a Linear Program (LP). Thus, a polynomial-time algorithm for the original verification problem can be obtained using known algorithms for enumerating the regions in a hyperplane arrangement. Finally, we adapt our proposed algorithms to the verification of dynamical systems, specifically when these NN architectures are used as state-feedback controllers for LTI systems. We further evaluate the viability of this approach numerically.

关键词： Linear programming

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