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Restoration Strategy for Honeycomb Active Distribution network with Soft open Point

Restoration Strategy for Honeycomb Active Distribution Netwo...

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ieee International conference on Power and Energy Applications (ICPEA)

作者： Zhaoyu Liu Ke Sun Jialin Yu Chun Li Pengfei Hu Pengcheng Zhu Liqun Qian State Grid Zhejiang Economic and Technological Research Institute Hangzhou China State Grid Jiaxing Power Supply Company Jiaxing China College of Electrical Engineering Zhejiang University Hangzhou China

Honeycomb active distribution network is a new intelligent distribution network that adapts to the development of distribution networks in the future. Base smart power/information exchange station (SPIES) in the topology is connected to adjacent microgrids through multi-port power electronic switches, which can realize the flexible control. Because of this characteristic, honeycomb distribution network has stronger fault isolation and self-healing ability than traditional distribution network. Aiming at the fault recovery problem of the honeycomb distribution network with distributed photovoltaic, innovatively considered both island division and network reconstruction, proposed a power recovery strategy with SPIES. The optimal model was established with maximum recovery load and minimum network loss as the objective function, and a hybrid optimization algorithm of binary particle swarm optimization and second-order cone programming was used to solve the fault self-healing scheme. The simulation results show that the proposed strategy can effectively restore the power supply in the lost area of the honeycomb distribution network.

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Challenges of implementing software variability in eclipse omr: An interview study 43

Challenges of implementing software variability in eclipse o...

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43rd ieee/ACM International conference on Software Engineering: Software Engineering in Practice, ICSE-SEIP 2021

作者： Nuryyev, Batyr Nadi, Sarah Bhuiyan, Nazim Uddin Banderali, Leonardo University of Alberta Edmonton Canada IBM Markham Canada

ISBN: (纸本)9780738146690

Software variability is the ability of a software system to be customized or configured for a particular context. In this paper, we discuss our experience investigating software variability implementation challenges in practice. Eclipse OMR, developed by IBM, is a set of highly configurable C++ components for building language runtimes;it supports multiple programming languages and target architectures. We conduct an interview study with 6 Eclipse OMR developers and identify 8 challenges incurred by the existing variability implementation, and 3 constraints that need to be taken into account for any reengineering effort. We discuss these challenges and investigate the literature and existing open-source systems for potential solutions. We contribute a solution for one of the challenges, namely adding variability to enumerations and arrays. We also share our experiences and lessons learned working with a large-scale highly configurable industry project. For example, we found that the 'latest and greatest' research solutions may not always be favoured by developers due to small practical considerations such as build dependencies, or even C++ version constraints. © 2021 ieee.

关键词： C++ (programming language)

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ProSLICE: An open RAN-based approach to Programmable RAN Slicing

ProSLICE: An Open RAN-based approach to Programmable RAN Sli...

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GLOBECOM 2022 - 2022 ieee Global Communications conference

作者： Ahan Kak Van-Quan Pham Huu-Trung Thieu Nakjung Choi Network Systems and Security Research Nokia Bell Labs Murray Hill NJ USA Network Systems and Security Research Nokia Bell Labs Nozay France

ISBN: (纸本)9781665435413

The increasing popularity of programmable wireless networks has led to efforts by both academia as well as industry to redesign access networks based on the disaggregated open Radio Access network (O-RAN) concept. However, the absence of a development platform for prototyping O-RAN use cases and the perceived complexity of the O-RAN specification have led to a stagnation of systems research efforts in this domain with a disproportionate focus on monolithic RAN architectures. With a view to overcoming these challenges, this paper introduces the ProSLICE platform, a full-scale realization of the complete O-RAN specification based on purely open source components along with several enhancements and extensions for fine-grained network control and ease of use. Key contributions include a fully disaggregated O-RAN-compliant RAN, a custom O-RAN service model in support of network slicing, statistics and configuration applications for the O-RAN RAN Intelligent Controller (RIC), and a comprehensive use case-based performance evaluation.

关键词： Performance evaluation Industries Automation network slicing Wireless networks Catalysts User experience

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Towards On-Chip Learning for low Latency Reasoning with End-to-End Synthesis

Towards On-Chip Learning for low Latency Reasoning with End-...

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Asia and South Pacific Design Automation conference

作者： Vito Giovanni Castellana Nicolas Bohm Agostini Ankur Limaye Vinay Amatya Marco Minutoli Joseph Manzano Antonino Tumeo Serena Curzel Michele Fiorito Fabrizio Ferrandi Pacific Northwest National Laboratory Richland WA USA Politecnico di Milano Milano Italy

The Software Defined architectures (SODA) Synthesizer is an open-source compiler-based tool able to automatically generate domain-specialized systems targeting Application-Specific Integrated Circuits (ASICs) or Field Programmable Gate Arrays (FPGAs) starting from high-level programming. SODA is composed of a frontend, SODA-OPT, which leverages the multilevel intermediate representation (MLIR) framework to interface with productive programming tools (e.g., machine learning frameworks), identify kernels suitable for acceleration, and perform high-level optimizations, and of a state-of-the-art high-level synthesis backend, Bambu from the PandA framework, to generate custom accelerators. One specific application of the SODA Synthesizer is the generation of accelerators to enable ultra-low latency inference and control on autonomous systems for scientific discovery (e.g., electron microscopes, sensors in particle accelerators, etc.). This paper provides an overview of the flow in the context of the generation of accelerators for edge processing to be integrated in transmission electron microscopy (TEM) devices, focusing on use cases from precision material synthesis. We show the tool in action with an example of design space exploration for inference on reconfigurable devices with a conventional deep neural network model (LeNet). Finally, we discuss the research directions and opportunities enabled by SODA in the area of autonomous control for scientific experimental workflows.

关键词： Transmission electron microscopy Synthesizers Microscopy Focusing programming System-on-chip Space exploration

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A RISC-V in-network accelerator for flexible high-performance low-power packet processing 21

A RISC-V in-network accelerator for flexible high-performanc...

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ACM/ieee 48th Annual International Symposium on Computer Architecture (ISCA)

作者： Di Girolamo, Salvatore Kurth, Andreas Calotoiu, Alexandru Benz, Thomas Schneider, Timo Beranek, Jakub Benini, Luca Hoefler, Torsten Swiss Fed Inst Technol Dept Comp Sci Zurich Switzerland Swiss Fed Inst Technol Integrated Syst Lab Zurich Switzerland VSB Tech Univ Ostrava IT4Innovat Ostrava Czech Republic

ISBN: (纸本)9781665433334

The capacity of offloading data and control tasks to the network is becoming increasingly important, especially if we consider the faster growth of network speed when compared to CPU frequencies. In-network compute alleviates the host CPU load by running tasks directly in the network, enabling additional computation/communication overlap and potentially improving overall application performance. However, sustaining bandwidths provided by next-generation networks, e.g., 400 Gbit/s, can become a challenge. sPIN is a programming model for in-NIC compute, where users specify handler functions that are executed on the NIC, for each incoming packet belonging to a given message or flow. It enables a CUDA-like acceleration, where the NIC is equipped with lightweight processing elements that process network packets in parallel. We investigate the architectural specialties that a sPIN NIC should provide to enable high-performance, low-power, and flexible packet processing. We introduce PsPIN, a first open-source sPIN implementation, based on a multi-cluster RISC-V architecture and designed according to the identified architectural specialties. We investigate the performance of PsPIN with cycle-accurate simulations, showing that it can process packets at 400 Gbit/s for several use cases, introducing minimal latencies (26 ns for 64 B packets) and occupying a total area of 18.5 mm(2) (22 nm FDSOI).

关键词： in-network compute packet processing specialized architecture sPIN

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Comparative analysis of Cybersecurity mechanisms in SD-WAN architectures: A preliminary results 2

Comparative analysis of Cybersecurity mechanisms in SD-WAN a...

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2nd ieee Engineering International Research conference, EIRCON 2021

作者： Bustamante, Jorge Rodriguez Avila-Pesantez, Diego Escuela de Posgrado Pontificia Universidad Católica Del Ecuador Sede Ambato Ecuador Escuela Superior Politécnica de Chimborazo Facultad de Informática y Electrónica Riobamba Ecuador

ISBN: (纸本)9781665444453

Software-defined network in a wide area network (SD-WAN) has become a trend applied by large companies with geographically separated branches. The primary objective is based on a software solution that provides a cost-benefit balance, given the high cost of WAN connections. The growth of SD-WAN has brought numerous solutions by various vendors, but that has also increased the number of threats and vulnerabilities to this technology. This article aims to compare the commercial mechanisms versus opensource solutions implement within a specific architecture. It describes the cyber-attack vectors within SD-WAN and how to respond them within a simulation using the GNS3 software. The topology presented is based on a design with two branches and a headquarters, connected by two links that provide redundancy, one by MPLS and the other by broadband internet. The results of this research report that the commercial solution (Fortigate) provides better security mechanisms that focus on confidentiality, integrity, and availability. However, the open-source solution (Flexiwan) offers tools for adaptability to future threats thanks to the community's efforts. © 2021 ieee.

关键词： Cybersecurity

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Self-Tuning network Control architectures

Self-Tuning Network Control Architectures

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ieee conference on Decision and Control

作者： Tyler Summers Karthik Ganapathy Iman Shames Mathias Hudoba de Badyn Control Optimization and Networks Lab University of Texas at Dallas Australian National University Automatic Control Laboratory ETH Zürich

ISBN: (数字)9781665467612

ISBN: (纸本)9781665467629

We formulate a general mathematical framework for self-tuning network control architecture design. This problem involves jointly adapting the locations of active sensors and actuators in the network and the feedback control policy to all available information about the time-varying network state and dynamics to optimize a performance criterion. We propose a general solution structure analogous to the classical self-tuning regulator from adaptive control. We show that a special case with full-state feedback can be solved in principle with dynamic programming, and in the linear quadratic setting the optimal cost functions and policies are piecewise quadratic and piecewise linear, respectively. For large networks where exhaustive architecture search is prohibitive, we describe a greedy heuristic for joint architecture-policy design. We demonstrate in numerical experiments that self-tuning architectures can provide dramatically improved performance over fixed architectures. Our general formulation provides an extremely rich and challenging problem space with opportunities to apply a wide variety of approximation methods from stochastic control, system identification, reinforcement learning, and static architecture design.

关键词： Actuators Reinforcement learning Aerospace electronics Cost function Control systems Sensors Feedback control

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A Unified programming Model over Heterogeneous Data Planes 7

A Unified Programming Model over Heterogeneous Data Planes

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7th International conference on Computer and Communications, ICCC 2021

作者： Li, Xianhai Shi, Zhou Pan, Jiangyu Tian, Ye School of Computer Science and Technology University of Science and Technology of China Hefei China

ISBN: (纸本)9781665409506

Software Defined networking (SDN) separates the data plane and the control plane in the traditional network, and the data plane communicates with the control plane through standard protocols. With the development of SDN, there are many southbound communication protocols in academia, such as openFlow, Protocol Oblivious Forwarding (POF), programming protocol-independent packet processors (P4). The design ideas and implementation of these protocols are very different. Therefore, many controllers provide some high-level Application programming Interfaces (API) supporting different protocols to shield the complexity of the protocol and facilitate the writing of network strategies, but none of them can support different southbound protocols at the runtime. That is, the controller can't support a variety of different protocols while the data plane has kinds of switches. For example, open network Operating System (ONOS) supports P4 and openFlow, but it can only support a specific data plane at the runtime, so it cannot combine the strengths and advantages of different types of programmable switches. This paper proposes a unified programming model that can support both the P4 and POF protocols at the runtime so that network users can combine the high performance of the P4 and the flexibility of the POF. We also provide kinds of API to facilitate the writing of network strategies. In certain application scenarios, the losing of data packets caused by updating the data plane pipeline can be effectively eliminated with the programming model. © 2021 ieee.

关键词： Controllers

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Addressing the ieee AV Test Challenge with SCENIC and VERIFAI 3

Addressing the IEEE AV Test Challenge with SCENIC and VERIFA...

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3rd ieee International conference on Artificial Intelligence Testing (AITest)

作者： Viswanadha, Kesav Indaheng, Francis Wong, Justin Kim, Edward Kalvan, Ellen Pant, Yash Fremont, Daniel J. Seshia, Sanjit A. Univ Calif Berkeley Berkeley CA 94720 USA Univ Calif Santa Cruz Santa Cruz CA 95064 USA

ISBN: (纸本)9781665434812

This paper summarizes our formal approach to testing autonomous vehicles (AVs) in simulation for the ieee AV Test Challenge. We demonstrate a systematic testing framework leveraging our previous work on formally-driven simulation for intelligent cyber-physical systems. First, to model and generate interactive scenarios involving multiple agents, we used SCENIC, a probabilistic programming language for specifying scenarios. A SCENIC program defines an abstract scenario as a distribution over configurations of physical objects and their behaviors over time. Sampling from an abstract scenario yields many different concrete scenarios which can be run as test cases for the AV. Starting from a SCENIC program encoding an abstract driving scenario, we can use the VERIFAI toolkit to search within the scenario for failure cases with respect to multiple AV evaluation metrics. We demonstrate the effectiveness of our testing framework by identifying concrete failure scenarios for an open-source autopilot, Apollo, starting from a variety of realistic traffic scenarios.

关键词： Measurement Computer languages Systematics conferences Tools Cyber-physical systems Probabilistic logic

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OrchestRAN: network Automation through Orchestrated Intelligence in the open RAN

OrchestRAN: Network Automation through Orchestrated Intellig...

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ieee Annual Joint conference: INFOCOM, ieee Computer and Communications Societies

作者： Salvatore D’ Oro Leonardo Bonati Michele Polese Tommaso Melodia Institute for the Wireless Internet of Things Northeastern University Boston MA U.S.A.

The next generation of cellular networks will be characterized by softwarized, open, and disaggregated architectures exposing analytics and control knobs to enable network intelligence via innovative data-driven algorithms. How to practically realize this vision, however, is largely an open problem. For a given network optimization/automation objective, it is currently unknown how to select which data-driven models should be deployed and where, which parameters to control, and how to feed them appropriate inputs. In this paper, we take a decisive step forward by presenting and prototyping OrchestRAN, a novel orchestration framework for next generation systems that embraces and builds upon the open Radio Access network (RAN) paradigm to provide a practical solution to these challenges. OrchestRAN has been designed to execute in the non-Real-time (RT) RAN Intelligent Controller (RIC) and allows network Operators (NOs) to specify high-level control/inference objectives (i.e., adapt scheduling, and forecast capacity in near-RT, e.g., for a set of base stations in Downtown New York). OrchestRAN automatically computes the optimal set of data-driven algorithms and their execution location (e.g., in the cloud, or at the edge) to achieve intents specified by the NOs while meeting the desired timing requirements and avoiding conflicts between different data-driven algorithms controlling the same parameters set. We show that the intelligence orchestration problem in open RAN is NP-hard, and design low-complexity solutions to support real-world applications. We prototype OrchestRAN and test it at scale on Colosseum, the world’s largest wireless network emulator with hardware in the loop. Our experimental results on a network with 7 base stations and 42 users demonstrate that OrchestRAN is able to instantiate data-driven services on demand with minimal control overhead and latency.

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