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Distilling Spikes: Knowledge Distillation in Spiking Neural networks

Distilling Spikes: Knowledge Distillation in Spiking Neural ...

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International conference on Pattern Recognition

作者： Ravi Kumar Kushawaha Saurabh Kumar Biplab Banerjee Rajbabu Velmurugan IIT Bombay

ISBN: (纸本)9781728188089;9781728188096

Spiking Neural networks (SNN) are energy-efficient computing architectures that exchange spikes for processing information, unlike classical Artificial Neural networks (ANN). Due to this, SNNs are better suited for real-life deployments. However, similar to ANNs, SNNs also benefit from deeper architectures to obtain improved performance. Furthermore, like the deep ANNs, the memory, compute and power requirements of SNNs also increase with model size, and model compression becomes a necessity. Knowledge distillation is a model compression technique that enables transferring the learning of a large machine learning model to a smaller model with minimal loss in performance. In this paper, we propose techniques for knowledge distillation in spiking neural networks for the task of image classification. We present ways to distill spikes from a larger SNN, also called the teacher network, to a smaller one, also called the student network, while minimally impacting the classification accuracy. We demonstrate the effectiveness of the proposed method with detailed experiments on three standard datasets while proposing novel distillation methodologies and loss functions. We also present a multi-stage knowledge distillation technique for SNNs using an intermediate network to obtain higher performance from the student network. Our approach is expected to open up new avenues for deploying high performing large SNN models on resource-constrained hardware platforms.

关键词： Knowledge engineering Training Image coding Computational modeling Artificial neural networks Linear programming Hardware

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A Zone Routing Algorithm for Service network

A Zone Routing Algorithm for Service Network

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2020 International conference on Service Science, ICSS 2020

作者： Zheng, Bangpeng Yin, Jianwei Pang, Shengye Zheng, Tao Tian, Qunxi College of Computer Science Zhejiang University Hangzhou China New H3C Beijing China Alibaba Group Hangzhou China

ISBN: (纸本)9781728185316

The increasing number of available open services demands distributed architectures to promote scalability to enable their precise and efficient retrieval. As web services proliferate, it is more and more difficult to find suitable services and further compose them into complex applications automatically. In this paper, a novel service infrastructure named Service network(ServNet), which is constructed on the basis of service routers and service switches, is proposed to deploy and manage large-scale services. Furthermore, the zone routing algorithm (ZRA) combines the advantages of the proactive and reactive approaches by maintaining an up-to-date topological map of a zone centered on each service node. Experimental evaluations confirmed the efficiency in terms of accuracy of query and network traffic. © 2020 ieee.

关键词： Routing algorithms

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Extending XACC for Quantum Optimal Control

Extending XACC for Quantum Optimal Control

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ieee International conference on Quantum Computing and Engineering (QCE)

作者： Nguyen, Thien Santana, Anthony McCaskey, Alexander Oak Ridge Natl Lab Comp Sci & Math Oak Ridge TN 37830 USA

ISBN: (纸本)9781728189697

Quantum computing vendors are beginning to open up application programming interfaces for direct pulse-level quantum control. With this, programmers can begin to describe quantum kernels of execution via sequences of arbitrary pulse shapes. This opens new avenues of research and development with regards to smart quantum compilation routines that enable direct translation of higher-level digital assembly representations to these native pulse instructions. In this work, we present an extension to the XACC system-level quantum-classical software framework that directly enables this compilation lowering phase via user-specified quantum optimal control techniques. This extension enables the translation of digital quantum circuit representations to equivalent pulse sequences that are optimal with respect to the backend system dynamics. Our work is modular and extensible, enabling third party optimal control techniques and strategies in both C++ and Python. We demonstrate this extension with familiar gradient-based methods like gradient ascent pulse engineering (GRAPE), gradient optimization of analytic controls (GOAT), and Krotov's method. Our work serves as a foundational component of future quantum-classical compiler designs that lower high-level programmatic representations to low-level machine instructions.

关键词： quantum computing quantum optimal control quantum programming quantum software

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Design classification of aggregating systems in intelligent information system architectures 25

Design classification of aggregating systems in intelligent ...

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25th ieee International conference on Emerging Technologies and Factory Automation (ETFA)

作者： Iatrou, Chris Paul Ketzel, Lukas Graube, Markus Haefner, Martin Urbas, Leon Tech Univ Dresden Chair Proc Control Syst Dresden Germany TraceTronic GmbH Dresden Germany Burkert Fluid Control Syst Ingelfingen Germany

ISBN: (纸本)9781728189567

With the rising amount of networked devices in industrial, edge, fog and IoT applications, gathering, managing and presenting data from a multitude of distributed sources is an increasingly vital task. Computing systems that locate and centralize data from a subordinate network domain - complex gateways and aggregating servers - are frequently employed and described in this capacity. However, when such "aggregating systems" are encountered in research or industrial applications, one quickly realizes that functions and capabilities vary tremendously. The term appears to encompass anything from simple fieldbus gateways to intelligent information processing nodes for harmonizing information models. This article presents a classification scheme for aggregating systems, that is systems with the ability to integrate information from other, distributed devices into their own datastore. A particular focus lies on intelligent systems supporting OPCUA, a standard that is rapidly establishing itself as a key protocol for semantic communications. This article first introduces a general architecture model for aggregating systems and proceeds to detail functionality and cross-cutting concerns that effect these systems. Finally, the applicability of these models is tested on two case studies.

关键词： gateway aggregating system aggregating server namur open architecture noa opcua canopen

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SuSy: A programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs 20

SuSy: A Programming Model for Productive Construction of Hig...

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39th ieee/ACM International conference On Computer Aided Design (ICCAD)

作者： Lai, Yi-Hsiang Rong, Hongbo Zheng, Size Zhang, Weihao Cui, Xiuping Jia, Yunshan Wang, Jie Sullivan, Brendan Zhang, Zhiru Liang, Yun Zhang, Youhui Cong, Jason George, Nithin Alvarez, Jose Hughes, Christopher Dubey, Pradeep Cornell Univ Sch Elect & Comp Engn Ithaca NY 14853 USA Intel San Jose CA USA Peking Univ Beijing Peoples R China Tsinghua Univ Beijing Peoples R China Univ Calif Los Angeles Dept Comp Sci Los Angeles CA 90024 USA

ISBN: (纸本)9781665423243

Systolic algorithms are one of the killer applications on spatial architectures such as FPGAs and CGRAs. However, it requires a tremendous amount of human effort to design and implement a high-performance systolic array for a given algorithm using the traditional RTL-based methodology. On the other hand, existing high-level synthesis (HLS) tools either (1) force the programmers to do "micro-coding" where too many optimizations must be carried out through tedious code restructuring and insertion of vendor-specific pragmas, or (2) give them too little control to influence a push-button compilation flow to achieve high quality of results. To tackle these challenges, we introduce SuSy, a programming framework composed of a domain-specific language (DSL) and a compilation flow that enables programmers to productively build high-performance systolic arrays on FPGAs. With SuSy, programmers express the design functionality in the form of uniform recurrence equations (UREs), which can describe algorithms from a wide spectrum of applications as long as the underlying computation has a uniform dependence structure. The URE description in SuSy is followed by a set of decoupled spatial mapping primitives that specify how to map the equations to a spatial architecture. More concretely, programmers can apply space-time transformations and several other memory and I/O optimizations to build a highly efficient systolic architecture productively. Experimental results show that SuSy can describe various algorithms with UREs and generate high-performance systolic arrays by spatial optimizations. For instance, the SGEMM benchmark written in SuSy can approach the performance of the manual design optimized by experts, while using 30x fewer lines of code.

关键词： DSL FPGA Systolic Array Space-Time Transformation URE

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Challenges and Opportunities in Performance Benchmarking of Service Mesh for the Edge

Challenges and Opportunities in Performance Benchmarking of ...

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ieee International conference on Edge Computing (EDGE)

作者： Mrittika Ganguli Sunku Ranganath Subhiksha Ravisundar Abhirupa Layek Dakshina Ilangovan Edwin Verplanke Network and Edge Group (NEX) Intel Corporation Chandler USA Network and Edge Group (NEX) Intel Corporation Hillsboro USA

ISBN: (纸本)9781665400633

As Edge deployments move closer towards the end devices, low latency communication among Edge aware applications is one of the key tenants of Edge service offerings. In order to simplify application development, service mesh architectures have emerged as the evolutionary architectural paradigms for taking care of bulk of application communication logic such as health checks, circuit breaking, secure communication, resiliency (among others), thereby decoupling application logic with communication infrastructure. The latency to throughput ratio needs to be measurable for high performant deployments at the Edge. Providing benchmark data for various edge deployments with Bare Metal and virtual machine-based scenarios, this paper digs into architectural complexities of deploying service mesh at edge environment, performance impact across north-south and east-west communications in and out of a service mesh leveraging popular open-source service mesh Istio/Envoy using a simple on-prem Kubernetes cluster. The performance results shared indicate performance impact of Kubernetes network stack with Envoy data plane. Microarchitecture analyses indicate bottlenecks in Linux based stacks from a CPU micro-architecture perspective and quantify the high impact of Linux's Iptables rule matching at scale. We conclude with the challenges in multiple areas of profiling and benchmarking requirement and a call to action for deploying a service mesh, in latency sensitive environments at Edge.

关键词： Linux Microservice architectures Benchmark testing Throughput Data models Complexity theory Kernel

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Construction of the Regular Dodecahedron with the MATHEMATICA 20th

Construction of the Regular Dodecahedron with the MATHEMATIC...

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20th International conference on Computational Science and Its Applications (ICCSA)

作者： Velezmoro Leon, Ricardo Velasquez Fernandez, Marcela Jimenez Gomez, Jorge Natl Univ Piura Math Dept Urb Miraflores S-N Castilla Piura 20002 Peru Natl Univ Piura Urb Miraflores S-N Castilla Piura 20002 Peru

ISBN: (纸本)9783030587994;9783030587987

Man is always curious about the patterns and beauty of platonic solids. Throughout history it has shaped them into artistic works, even today it uses them in technological models;likewise nature has adopted its geometric patterns. Through the development of digital technologies, geometric designs are made using the architecture of Platonic solids. The object of study and construction in this work is the Dodecahedron using Wolfram Mathematica 11.2 Software. For this, an efficient logical language will be used, framed within the discipline of geometry, where relationships and hierarchies are established in reasoning through the programming language, allowing its architecture to be associated with creations of man, objects and organisms of nature.

关键词： Regular dodecahedron programming Wolfram mathematica

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WP4: A P4 Programmable ieee 802.11 Data Plane 30

WP4: A P4 Programmable IEEE 802.11 Data Plane

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30th International Telecommunication networks and Applications conference (ITNAC)

作者： Zanna, Paul Radcliffe, Pj Kumar, Dinesh RMIT Univ Melbourne Vic Australia

ISBN: (纸本)9781728188270

ieee 802.11 wireless networking is now one of the most common methods of connectivity, and with it, a new range of security and reliability issues. While a Software Defined networking (SDN) approach has made significant inroads with these problems in wired networks, the impact has not been as notable in the wireless networking space. One reason for this is that the existing SDN approach, predominately openFlow, is restricted to the network interface level as their match-action pipelines are only capable of processing Ethernet frames and cannot, therefore, address the underlying wireless elements. The introduction of the P4 programming language allows developers to create custom data planes which can include definable packet parsers. This functionality enables the construction of data planes capable of parsing ieee 802.11 wireless frames. In this paper, we develop a new P4 compiler extension called WP4 to enable the creation of a P4 data plane accessible by a Linux wireless driver. It allows the processing of previously inaccessible management frames such as beacons, probes and de-authentication. Finally, we provide example scenarios for this novel approach and a performance evaluation of the WP4 implementation.

关键词： Software Defined networking openFlow P4 Wireless networks open vSwitch

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P4Knocking: Offloading host-based firewall functionalities to the network 23

P4Knocking: Offloading host-based firewall functionalities t...

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23rd conference on Innovation in Clouds, Internet and networks and Workshops (ICIN)

作者： Ollora Zaballa, Eder Franco, David Zhou, Zifan Berger, Michael S. Tech Univ Denmark DTU Foton Lyngby Denmark Univ Basque Country UPV EHU Dept Commun Engn Leioa BI Spain

ISBN: (数字)9781728151274

ISBN: (纸本)9781728151274

The introduction of Software-Defined networks (SDN) and the evolution towards programmable data planes bring the opportunity to offload several functions to the data plane. In this context, the P4 programming language opens the door to the customization of data planes. It can provide packet processing functionalities that can be applied to improve network security among other areas. This paper presents P4Knocking, a P4-based port knocking implementation that can externally open ports that appear to be closed. The goal of bringing port knocking capabilities to the network is to seamlessly deploy firewall functions in the data plane, reliving hosts from dealing with unintended traffic. Our work presents a total of four implementations that involve data and control planes in different degrees. In this case, P4Knocking can provide a more transparent and efficient way to deploy the port knocking service compared to a host-based port knocking implementation. In fact, it requires no specific purpose externs apart from registers, hence its higher portability and flexibility with local or remote control planes.

关键词： port knocking security programmable SDN P4

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NetVerify 2021 - network Verification Workshop

NetVerify 2021 - Network Verification Workshop

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International conference on network Protocols

Preserving the availability and trustworthiness of computer networks continues to be an open challenge. Traditionally, we used expert engineers to manage all aspects of the network. This approach is not viable for large-scale networks. On one hand, we have cloud networks that comprise several hundreds of thousands of network devices that interconnect several million servers. New advances such as programmable network devices further magnify the complexity - we now also have churn in the data plane in addition to the control plane. On the other hand, we have enterprises migrating to the cloud and deploying virtual networks at scale. Managing both kind of networks require solving the same challenges such as intent specification, correct-by-construction translation to configurations, re-mediating drift, and finally ensuring the safety of changes. Solving these challenges requires a multi-pronged approach. NetVerify will create interdisciplinary forum to foster interactions between researchers and practitioners from fields such as networking, security, formal methods, programming languages, and machine learning. The workshop program is designed to stimulate discussions to both advance the science of network verification and influence adoption.

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