LoRaWAN is an opennetworking protocol used to create long-range communication for low-powered devices. LoRaWAN allows the configuration of several parameters that affect the network performance. LoRaWAN end devices u...
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ISBN:
(纸本)9798350330656;9798350330649
LoRaWAN is an opennetworking protocol used to create long-range communication for low-powered devices. LoRaWAN allows the configuration of several parameters that affect the network performance. LoRaWAN end devices utilize this protocol for communication in the Internet Of Things (IoT). These devices transmit and receive data through radio gateways using LoRa RF Modulation. LoRaWAN end devices include Class A, B, and C operational categories that vary based on their functionality in communication with the network. Research has been undertaken on Class A end devices, but a notable gap exists in studies dedicated to Class B and Class C devices. Understanding the communication behaviors of these devices is important for finely tuned and efficient implementations. This study aims to bridge this gap by performing a simulationbased performance analysis in ns-3 for these device classes. Additionally, we demonstrate the potential for significant performance improvements through the careful adjustments of system parameters.
Software-Defined networks (SDN) fundamentally transform traditional network architecture. However, the performance of SDN controllers, particularly in their single-Threaded implementations like Ryu, poses a major chal...
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Traditional Traffic Engineering (TE) usually balances the load on network links by formulating and solving a routing optimization problem based on measured Traffic Matrices (TMs). Given that traffic demands could chan...
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ISBN:
(纸本)9798350303223
Traditional Traffic Engineering (TE) usually balances the load on network links by formulating and solving a routing optimization problem based on measured Traffic Matrices (TMs). Given that traffic demands could change unexpectedly and significantly in realistic scenarios, routing strategies optimized based on currently measured TMs might not work well in future traffic scenarios. To compensate for the mismatch between stale routing decisions and future TMs, network operators may perform routing updates more frequently, which could introduce significant network disturbance and service disruption. Moreover, given the high routing computation overhead of TE optimization in today's large-scale networks, routing updates could experience severe delay and thus cannot accommodate future traffic changes in time. To address these challenges, we propose Roracle, a scalable learning-based TE that quickly predicts a good routing strategy for a long sequence of future TMs, while the learning process is guided by the optimal solutions of Linear programming (LP) problems using Supervised Learning (SL). We design a scalable Graph Neural network (GNN) architecture that greatly facilitates training and inference processes to accelerate TE in large networks. Extensive simulation results on real world network topologies and traffic traces show that Roracle outperforms existing TE solutions by up to 36% in terms of worst -case performance under future unknown traffic scenarios. Additionally, Roracle achieves good scalability by providing at least 71 x speedup over the most efficient baseline method in large-scale networks.
In ultra-dense fog networks, faceted conversation architectures are crucial because they provide low latency, high capacity, and electricity-green speech communication. Several component verbal exchange topologies, su...
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This paper proposes a scheduling model for updating resource allocations for virtualized networks (VNs) without congestion. The proposed model determines the schedule of migrating traffic flows on VNs from old routes ...
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ISBN:
(纸本)9798350310900
This paper proposes a scheduling model for updating resource allocations for virtualized networks (VNs) without congestion. The proposed model determines the schedule of migrating traffic flows on VNs from old routes to new routes. The model aims to minimize the number of rounds required to complete the update of all existing VNs. We evaluate the performance of model in terms of the percentage of trials where feasible update scheduling exists and the number of rounds required to complete the update. Numerical results show that more rounds are required to achieve congestion-free update when the traffic demand or the number of VNs increases. The number of required rounds tends to remain the same when the maximum number of rounds exceeds a certain value;this observation helps network operators estimate the time required for VN update.
This study investigates the use of local optima network (LON) analysis, a derivative of the fitness landscape of candidate solutions, to characterise and visualise the neural architecture space. The search space of fe...
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ISBN:
(数字)9781728186719
ISBN:
(纸本)9781728186719
This study investigates the use of local optima network (LON) analysis, a derivative of the fitness landscape of candidate solutions, to characterise and visualise the neural architecture space. The search space of feedforward neural networkarchitectures with up to three layers, each with up to 10 neurons, is fully enumerated by evaluating trained model performance on a selection of data sets. Extracted LONs, while heterogeneous across data sets, all exhibit simple global structures, with single global funnels in all cases but one. These results yield early indication that LONs may provide a viable paradigm by which to analyse and optimise neural architectures.
Despite its presence for more than two decades and its proven benefits in expanding the space of system design, dynamic partial reconfiguration (DPR) is rarely integrated into frameworks and platforms that are used to...
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ISBN:
(纸本)9798350396249
Despite its presence for more than two decades and its proven benefits in expanding the space of system design, dynamic partial reconfiguration (DPR) is rarely integrated into frameworks and platforms that are used to design complex reconfigurable system-on-chip (SoC) architectures. This is due to the complexity of the DPR FPGA flow as well as the lack of architectural and software runtime support to enable and fully harness DPR. Moreover, as DPR designs involve additional design steps and constraints, they often have a higher FPGA compilation (RTL-to-bitstream) runtime compared to equivalent monolithic designs. In this work, we present PR-ESP, an open-source platform for a system-level design flow of partially reconfigurable FPGA-based SoC architectures targeting embedded applications that are deployed on resource-constrained FPGAs. Our approach is realized by combining SoC design methodologies and tools from the open-source ESP platform with a fully-automated DPR flow that features a novel size-driven technique for parallel FPGA compilation. We also developed a software runtime reconfiguration manager on top of Linux. Finally, we evaluated our proposed platform using the WAMI-App benchmark application on Xilinx VC707.
Multi-label classification is a generalization of multi-class classification, where a single data sample can have multiple labels. While deep neural networks have depicted commendable performance for multi-label learn...
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ISBN:
(纸本)9798350318920;9798350318937
Multi-label classification is a generalization of multi-class classification, where a single data sample can have multiple labels. While deep neural networks have depicted commendable performance for multi-label learning, they require a large amount of manually annotated training data to attain good generalization capability. However, annotating a multi-label data sample requires a human oracle to consider the presence/absence of every single class individually, which is extremely laborious. Active learning algorithms automatically identify the salient and exemplar instances from large amounts of unlabeled data and are effective in reducing human annotation effort in inducing a machine learning model. In this paper, we propose a novel active learning framework for multi-label learning, which queries a batch of (image-label) pairs and for each pair, poses the question whether the queried label is present in the corresponding image;the human annotators merely need to provide a binary feedback ("yes/no") in response to each query, which involves much less manual work. We pose the image and label selection as a constrained optimization problem and derive a linear programming relaxation to select a batch of (image-label) pairs, which are maximally informative to the underlying deep neural network. Our extensive empirical studies on three challenging datasets corroborate the potential of our method for real-world multi-label classification applications.
The detection of network attacks is a crucial aspect in ensuring the sustainability and proper functioning of information systems. Complex threat patterns and malicious actors possess the ability to inflict significan...
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We formulate a general mathematical framework for self-tuning network control architecture design. This problem involves jointly adapting the locations of active sensors and actuators in the network and the feedback c...
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ISBN:
(纸本)9781665467612
We formulate a general mathematical framework for self-tuning network control architecture design. This problem involves jointly adapting the locations of active sensors and actuators in the network and the feedback control policy to all available information about the time-varying network state and dynamics to optimize a performance criterion. We propose a general solution structure analogous to the classical self-tuning regulator from adaptive control. We show that a special case with full-state feedback can be solved in principle with dynamic programming, and in the linear quadratic setting the optimal cost functions and policies are piecewise quadratic and piecewise linear, respectively. For large networks where exhaustive architecture search is prohibitive, we describe a greedy heuristic for joint architecture-policy design. We demonstrate in numerical experiments that self-tuning architectures can provide dramatically improved performance over fixed architectures. Our general formulation provides an extremely rich and challenging problem space with opportunities to apply a wide variety of approximation methods from stochastic control, system identification, reinforcement learning, and static architecture design.
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