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检索条件"任意字段=IEEE International Conference on Integrated Circuit Design and Technology"
76526 条 记 录,以下是51-60 订阅
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CMOS Based Spiking-Time Dependent Plasticity circuit and Simple Image Classification
CMOS Based Spiking-Time Dependent Plasticity Circuit and Sim...
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ieee international conference on IC design and technology (ICICDT)
作者: Qiu, Zhen Gu, Bowen Wei, Chenxu Gu, Yang Wang, Qinan Zhao, Chun Xian Jiaotong Liverpool Univ Sch Adv Technol Suzhou Peoples R China
The Von Neumann structure is the most applied structure in modern computers. However, it is hitting the bottleneck due to higher fabrication requirements and more demanding high-performance equipment demands. Meanwhil... 详细信息
来源: 评论
Flexible Yet Efficient Transformer Acceleration with Unified Sparse Attention Support on FPGA  17
Flexible Yet Efficient Transformer Acceleration with Unified...
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17th ieee international conference on Solid-State and integrated circuit technology, ICSICT 2024
作者: Zhong, Linfeng Guo, Qingyu Wang, Runsheng Wang, Yuan Li, Meng School of Electronic and Computer Engineering Peking University China School of Integrated Circuits Peking University China Institute of Electronic Design Automation Peking University China Advanced Innovation Center for Integrated Circuits China Institute for Artificial Intelligence Peking University China
The quadratic complexity of attention computation poses a challenge for traditional Transformers, which the window attention mechanism aims to mitigate. However, the diverse applications of Transformer architectures r... 详细信息
来源: 评论
Securing Finite State Machines through Obfuscation Modes and Diverse Flip-Flop Configurations  11
Securing Finite State Machines through Obfuscation Modes and...
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11th ieee international conference on Consumer Electronics - Taiwan (ICCE-Taiwan) - Empower of Innovative Consumer technology
作者: Yu, Ya-Cheng Huang, Shih-Hsu Chung Yuan Christian Univ Dept Elect Engn Taoyuan Taiwan
As control logics are frequently implemented using finite state machines (FSMs), integrating obfuscation techniques into the FSM design is paramount. Prior research has leveraged diverse flip-flop configurations, chan... 详细信息
来源: 评论
Modeling Molecules for Field-Coupled Nanocomputing circuit design  24
Modeling Molecules for Field-Coupled Nanocomputing Circuit D...
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ieee 24th international conference on Nanotechnology (NANO)
作者: Ardesi, Yuri Ravera, Federico Piccinini, Gianluca Graziano, Mariagrazia Politecn Torino Dept Elect & Telecommun Turin Italy Politecn Torino Dept Appl Sci & Technol Turin Italy
Molecular Field-Coupled Nanocomputing (molFCN) is a highly low-power technology promising for digital electronics. It encodes information in the charge distribution of molecules and propagates it through electrostatic... 详细信息
来源: 评论
Robust and Efficient Implementation of design for Testability in integrated circuits  8
Robust and Efficient Implementation of Design for Testabilit...
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8th ieee international conference on Computational System and Information technology for Sustainable Solutions, CSITSS 2024
作者: Jois, Skanda V. Ravish Aradhya, H.V. Rv College of Engineering Department of Electronics and Communication Bangalore India
design for Testability (DFT) is essential in modern integrated circuit (IC) design, particularly as transistor sizes shrink and the complexity of IC's increases. Ensuring reliable testing methodologies becomes par... 详细信息
来源: 评论
A Bidirectional ESD Protection circuit With High Reliability and Low Leakage for Consumer Electronic Products  11
A Bidirectional ESD Protection Circuit With High Reliability...
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11th ieee international conference on Consumer Electronics - Taiwan (ICCE-Taiwan) - Empower of Innovative Consumer technology
作者: Chen, Chun-Cheng Lin, Chun-Yu Natl Taiwan Normal Univ Dept Elect Engn Taipei Taiwan Natl Yang Ming Chiao Tung Univ Inst Elect Hsinchu Taiwan
With the proliferation of consumer electronics, products are becoming slimmer and more compact, leading to a reduction in the size of integrated circuits (ICs). This downsizing makes ICs more susceptible to electrosta... 详细信息
来源: 评论
Development of AI-Based Simulation circuit design and Assistance Systems  6
Development of AI-Based Simulation Circuit Design and Assist...
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6th ieee international conference on Civil Aviation Safety and Information technology, ICCASIT 2024
作者: Cao, Shaohan Jilin Engineering Normal University Changchun130051 China
Artificial intelligence (AI) algorithms have vast application prospects in the field of analog circuit design. This paper introduces an AI algorithm-based assisted system for analog circuit design. The system adopts a... 详细信息
来源: 评论
Automatically Device Sizing of Analog circuit through Sequential Model-Based Optimization with circuit Recognition  17
Automatically Device Sizing of Analog Circuit through Sequen...
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17th ieee international conference on Solid-State and integrated circuit technology, ICSICT 2024
作者: Dai, Shun-Qi Wang, Xiao Lei, Yuan Yan, Bei-Ping AECS Department Hong Kong
This paper presents a new approach to improve the efficiency of automatically device sizing in analog circuits using a sequential model-based optimization technique combined with circuit recognition. The proposed meth... 详细信息
来源: 评论
A Fast-Response Current Source with High-Impedance for Zero-Crossing-Based circuits  17
A Fast-Response Current Source with High-Impedance for Zero-...
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17th ieee international conference on Solid-State and integrated circuit technology, ICSICT 2024
作者: Li, Ruoyu Wang, Xianglong Xu, Jianqiang Yang, Yintang Xidian University Faculty of Integrated Circuit Xi'an710071 China
In this paper, a high-impedance current source is developed to rapidly establish the output current. Under the framework of low bandwidth and large load capacitor, the output current can be quickly established by addi... 详细信息
来源: 评论
Layer Pipelined Neural Network Accelerator design on 2.5D FPGAs  17
Layer Pipelined Neural Network Accelerator Design on 2.5D FP...
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17th ieee international conference on Solid-State and integrated circuit technology, ICSICT 2024
作者: Wang, Mengxuan Wu, Chang School of Microelectronics Fudan University Shanghai China
The 2.5D FPGA integrates 3 or 4 FPGA dies together for larger design capacity and higher computing power. In this paper, we propose an advanced large neural network accelerator design on 2.5D FPGAs. Layer pipeline is ... 详细信息
来源: 评论