In this work, the design of a broadband K/Ka-band Power Amplifier (PA) Monolithic Microwave integratedcircuit (MMIC) in 180 nm E-mode GaAs pHEMT technology is discussed. In small-signal the design has a flat frequenc...
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Convolutional Neural Networks (CNNs) are widely used in image processing, object detection, and other machine learning applications due to their ability to extract features from data effectively. However, the high com...
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Spin-orbit torque magnetic random-access memory (SOT-MRAM), which exhibits sub-nanosecond write speed and high endurance, is a promising candidate for the future high-level cache. Nevertheless, SOT-MRAM faces challeng...
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Spin-orbit torque magnetic random-access memory (SOT-MRAM), which exhibits sub-nanosecond write speed and high endurance, is a promising candidate for the future high-level cache. Nevertheless, SOT-MRAM faces challenge in meeting the high read performance requirements of cache applications due to the limited ON/OFF ratio. Consequently, extensive investigation has been conducted into robust complementary bit-cell (CBC) designs based on SOT-MRAM. However, previous designs suffer from significant technology feasibility, area and performance issues. In this paper, the feasibility and performance of the existing complementary write schemes are analyzed, and optimized U-type and toggle spin torque (TST) schemes with practicality and conciseness are presented. The previous CBC designs are evaluated and optimized in terms of circuit and layout, while the 1-word-line-3-bit-line (1WL3BL) CBC designs with both U-type and TST schemes are proposed, which can reduce the bit-cell area by 24.64%-27.54% and improve the write and read performance. In comparison to the conventional CBC design, the proposed 1WL3BL CBC design can reduce the write energy and read latency by up to 36.91% and 21.93%, respectively. Furthermore, the proposed low-voltage read scheme demonstrates the capability to enhance the read performance and conserve the read energy under the aggressive read-related process parameters.
As 3D integratedcircuits (ICs) have emerged as a promising direction in the semiconductor industry, thermal issues in 3D-ICs have become increasingly prominent. In this work, we develop a novel machine learning (ML) ...
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Pre-silicon power and IR-drop estimation are crucial parts of the chip design process. Vector-based and vectorless assessments are commonly employed to estimate the worst peak power and dynamic IR-drop of the design. ...
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This paper proposes a phase compensation scheme for MEMS gyroscope drive closed-loop based on the dual phase-locked loop synchronous tracking, which can reduce the phase error caused by the ADC/DAC and be a universal ...
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Sequencing elements, such as flip-flops (FFs), significantly impact the speed, size, and power consumption of digital integratedcircuits. Despite numerous sequencing-element proposals in the past, they have heavily r...
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Optimal mean shift vector (OMSV)-based importance sampling methods have long been prevalent in yield estimation and optimization as an industry standard. However, most OMSV-based methods are designed heuristically wit...
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Compact and integrated 220GHz solid-state power amplifiers (SSPAs) are important in enabling future high-data-rate wireless communication, imaging, and radar systems. Silicon (CMOS and SiGe) and III-V (GaAs and InP) t...
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Modern Field-Programmable Gate Arrays (FPGAs) are highly versatile, with reconfigurable logic functionality that allows designers to create custom designs. Unlike traditional fixed-function integratedcircuits, FPGAs ...
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