The proceedings contain 38 papers. The topics discussed include: passive permutation multiplexer to detect hard and soft open fails on short flow characterization vehicle test chips;novel teststructures for extractin...
ISBN:
(纸本)9781538650691
The proceedings contain 38 papers. The topics discussed include: passive permutation multiplexer to detect hard and soft open fails on short flow characterization vehicle test chips;novel teststructures for extracting interface state density of advanced CMOSFETs using optical charge pumping;test structure to evaluate the impact of parasitic edge FET on circuits operating in weak inversion;comprehensive investigation on parameter extraction methodology for short channel amorphous InGaZnO thin-film transistors;modeling split-gate flash memory cell for advanced neuromorphic computing;test structure design for model-based electromigration;electrostatic teststructures for transmission line pulse and human body model testing at wafer level;reliability analysis of the metal-graphene contact resistance extracted through the transfer length method;and teststructures for seed layer optimization of electroplated ferromagnetic films.
The proceedings contain 35 papers. The topics discussed include: Vth-shiftable SRAM Cell TEGs for direct measurement for the immunity of the threshold voltage variability;measurement of mismatch factor and noise of SR...
ISBN:
(纸本)9781509036158
The proceedings contain 35 papers. The topics discussed include: Vth-shiftable SRAM Cell TEGs for direct measurement for the immunity of the threshold voltage variability;measurement of mismatch factor and noise of SRAM PUF using small bias voltage;dealing with leakage current in TLM and CTLM structures with vertical junction isolation;teststructures for studying flexible interconnect supported by carbon nanotube scaffolds;electrical teststructures for verifying continuity of ultra-thin insulating and conducting films;electromechanical testing of ZnO thin films under high uniaxial strain;statistical characterization and modeling of drain current local and global variability in 14 nm bulk FinFETs;characterization and monitoring structures for robustness against cyclic thermomechanical stress: design and influence of Ti-Al(Cu) layer scheme;teststructures for understanding the impact of ultra-high vacuum metal deposition on top-gate MoS2field-effect-transistors;ring-oscillator test-structures for sub-0.1% accuracy wafer-level characterization of active- and standby current consumption, variability, and fast aging of oscillation frequencies;the outstanding properties of graphene-insulator-semiconductor (GIS) teststructures for photoelectric determination of semiconductor devices band diagram;and detailed characterization and critical discussion of series resistance in graphene-metal contacts.
The proceedings contain 36 papers. The topics discussed include: an efficient method to evaluate 4 million microbump interconnection resistances for 3D stacked 16-Mpixel image sensor;an end-point visualization test st...
ISBN:
(纸本)9781467387934
The proceedings contain 36 papers. The topics discussed include: an efficient method to evaluate 4 million microbump interconnection resistances for 3D stacked 16-Mpixel image sensor;an end-point visualization test structure for all plasma dry release of deep-RIE MEMS;spring-constant measurement methods for RF-MEMS capacitive switches;microfabricated teststructures for thermal gas sensor;a test structure for analysis of metal wire effect on temperature distribution in stacked IC;dedicated test-structures for investigation of the thermal impact of the BEOL in advanced SiGe HBTs in time and frequency domain;hotspot teststructures for evaluating carbon nanotube microfin coolers and graphene-like heat spreaders;and transistor self-heating correction and thermal conductance extraction using only DC data.
The proceedings contain 45 papers. The topics discussed include: systematic calibration procedure of process parameters for electromagnetic field analysis of millimeter-wave CMOS devices;circuit architecture and measu...
ISBN:
(纸本)9781479983025
The proceedings contain 45 papers. The topics discussed include: systematic calibration procedure of process parameters for electromagnetic field analysis of millimeter-wave CMOS devices;circuit architecture and measurement technique to reduce the leakage current stemming from peripheral circuits with an array structure in examining the resistive element;a proposal for early warning indicators to detect impending metallization failure of DMOS transistors in cyclic operation;14nm BEOl TDDB reliability testing and defect analysis;observations on substrate characterisation through coplanar transmission line impedance measurements;a novel structure of MOSFET array to measure Ioff-ion with high accuracy and high density;characterization of wideband decoupling power line with extremely low characteristic impedance for millimeter-wave CMOS circuits;electromagnetic field test structure chip for back end of the line metrology;and SPICE modeling of 55 nm Embedded SuperFlash® Technology 2T memory cells.
Semiconductor Devices have been, and continue to be, the core of the information society. Together with tiny and inexpensive sensors, huge amounts of physical data will be collected in cyber-systems and analyzed by ar...
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Semiconductor Devices have been, and continue to be, the core of the information society. Together with tiny and inexpensive sensors, huge amounts of physical data will be collected in cyber-systems and analyzed by artificial intelligence. In such cyber-physical system, large-scale, low-power, and reliable semiconductor devices should be integrated with sensors and actuators. In addition to the classical trend of semiconductors, the engineers of mid-2010s must explore many materials for “new functionality,” whose impact on standard LSI system is still unclear. Recent integration technology such as chip-on-chip (3-D stacked IC) increases complexity of the device fabrication and analysis. It is therefore clear that everyone must seek for reliable and productive fabrication to achieve satisfactory yields, and a key component in addressing these issues is the characterization of the technology. teststructures, as well as test methods, play a major role in technology characterization and covers elements such as feature size measurement, parameter extraction, fluctuation assessment in transistors, stability measurement, and analogue parameter characterization. For thirty years the ieee has annually sponsored the ieee international conference on microelectronic test structures to discuss cutting edge methods in characterization.
The proceedings contain 30 papers. The topics discussed include: rapid MOSFET threshold voltage testing for high throughput semiconductor process monitoring;droplet impact sensing with low noise coplanar reverse-elect...
ISBN:
(纸本)9798350329896
The proceedings contain 30 papers. The topics discussed include: rapid MOSFET threshold voltage testing for high throughput semiconductor process monitoring;droplet impact sensing with low noise coplanar reverse-electrowetting teststructures;a novel test structure with two active areas for eNVM reliability studies;statistical investigation of SnOx RRAM memories for switching characteristics;electrical behavior of ALD-molybdenum films in the thin-film limit;use of DC probes for multi-MHz measurements of crosstalk and substrate coupling in gallium nitride power integrated circuits;teststructures for studying the impact of the backend contact metallization on the performance and stress sensitivity of SiGe HBTs;and teststructures to investigate ESD robustness of integrated GaN devices.
To quote Lord Kelvin: “I often say that when you can measure what you are speaking about, and express it in numbers, you know something about it; but when you cannot measure it, when you cannot express it in numbers,...
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To quote Lord Kelvin: “I often say that when you can measure what you are speaking about, and express it in numbers, you know something about it; but when you cannot measure it, when you cannot express it in numbers, your knowledge is of a meagre and unsatisfactory kind; it may be the beginning of knowledge, but you have scarcely, in your thoughts, advanced to the stage of science, whatever the matter may be.”
This special section of ieee Transactions on Semiconductor Manufacturing presents extended versions of papers originally presented as part of the ieee 33 rd internationalconference on microelectronicteststructures...
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This special section of ieee Transactions on Semiconductor Manufacturing presents extended versions of papers originally presented as part of the ieee 33 rd internationalconference on microelectronicteststructures (ICMTS) which was hosted at the University of Edinburgh, Scotland. Originally planned to take place at the University’s South Hall Complex in April 2020, the impact of the global pandemic led to the difficult decision to move to a fully virtual conference held between 4 th – 18 th May 2020. The guest editors for this special section, who were honoured to act as the General Chair and Technical Chair of the conference, would like to thank all of those involved in making the virtual conference a success, not least the digital events team from the ieee who made it possible.
The proceedings contain 32 papers. The topics discussed include: homogeneous ring oscillator with staggered layout for gate-level delay characterization;teststructures for characterizing the fabrication of miniature ...
ISBN:
(纸本)9781665485661
The proceedings contain 32 papers. The topics discussed include: homogeneous ring oscillator with staggered layout for gate-level delay characterization;teststructures for characterizing the fabrication of miniature reference electrodes;design of low-cost teststructures for measuring within-die process skew variations;combined machine learning techniques for characteristics classification and threshold voltage extraction of transistors;optimal teststructures for the characterization of integrated transformers at mm-wave frequencies using the open/thru de-embedding technique;two-pads per electrode in-situ test structure for micron-scale flip-chip bonding reliability of chip-on-chip device;characterizing aging degradation of integrated circuits with a versatile custom array of reliability teststructures;and utilization of poly heater teststructures in the characterization of bias temperature instability.
The proceedings contain 34 papers. The topics discussed include: anomalous scaling of parasitic capacitance in FETs with a high-K channel material;microheater isolation characterization to aid the optimization of a ME...
ISBN:
(纸本)9781728140087
The proceedings contain 34 papers. The topics discussed include: anomalous scaling of parasitic capacitance in FETs with a high-K channel material;microheater isolation characterization to aid the optimization of a MEMS Leidenfrost engine;automated wafer-level characterization of electrochemical teststructures for wafer scanning;drop-in test structure chip to visualize residual stress of Ru/Cu film grown by atomic layer deposition and supercritical fluid deposition;comparison of cut-back method and optical backscatter reflectometry for wafer level waveguide characterization;integrated variability measurements of 28 nm FDSOI MOSFETs down to 4.2 K for cryogenic CMOS applications;and test setup optimization and automation for accurate silicon photonics wafer acceptance production tests.
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