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检索条件"任意字段=IEEE International Symposium on Computer Architecture and High Performance Computing"
16709 条 记 录,以下是261-270 订阅
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Identification of Abnormal Activities in Surveillance Scenes using Deep Auto Encoder and Sequential Extreme Learning Machine
Identification of Abnormal Activities in Surveillance Scenes...
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2025 international Conference on Visual Analytics and Data Visualization, ICVADV 2025
作者: Rahul Chiranjeevi, V. Malathi, D. Srm Institute of Science and Technology Department of Computing Technologies Kattankulathur Chennai603203 India
Video anomaly detection is an essential task in computer vision, focused on spotting unexpected or unusual events in surveillance footage. This study presents a hybrid framework that combines a Deep Autoencoder (AE) w... 详细信息
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Proceedings - 22nd international symposium on computer architecture and high performance computing Workshops, SBAC-PADW 2010, 1st Workshop on Applications for Multi and Many Core architectures, WAMMCA 2010: Message from the workshop organizers
Proceedings - 22nd International Symposium on Computer Archi...
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Proceedings - 22nd international symposium on computer architecture and high performance computing Workshops, SBAC-PADW 2010, 1st Workshop on Applications for Multi and Many Core architectures, WAMMCA 2010年 viii页
作者: Bentes, Cristiana Drummond, Lúcia M. A. Farias, Ricardo UERJ Brazil
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Preface: 26th international symposium on computer architecture and high performance computing
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PARALLEL computing 2016年 54卷 1-1页
作者: [Anonymous]
来源: 评论
computer architecture: Challenges and opportunities for the next decade
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ieee MICRO 2005年 第3期25卷 58-69页
作者: Agerwala, T Chatterjee, S IBM Corp Thomas J Watson Res Ctr Yorktown Hts NY 10598 USA
In an updated version of Agerwala's July 2004 keynote address at The international symposium on computer architecture, the authors urge the computer architecture community to devise innovative ways of delivering c... 详细信息
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On-chip Parallel Photonic Reservoir computing using Multiple Delay lines  32
On-chip Parallel Photonic Reservoir Computing using Multiple...
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32nd ieee international symposium on computer architecture and high-performance computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)
作者: Hasnain, Syed Ali Mahapatra, Rabi Texas A&M Univ Dept Comp Sci & Engn College Stn TX 77843 USA
Silicon-Photonics architectures have enabled high speed hardware implementations of Reservoir computing (RC). With a delayed feedback reservoir (DFR) model, only one non-linear node can be used to perform RC. However,... 详细信息
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Petascale computing research challenges - A manycore perspective
Petascale computing research challenges - A manycore perspec...
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13th international symposium on high-performance computer architecture
作者: Pawlowski, Steve Intel Corp Digital Enterprise Grp Santa Clara CA 95051 USA
Future high performance computing will undoubtedly reach Petascale and beyond. Today's HPC is tomorrow's Personal computing. What are the evolving processor architectures towards Multi-core and Many-core for t... 详细信息
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FFT optimizations and performance assessment targeted towards satellite and airborne radar processing  32
FFT optimizations and performance assessment targeted toward...
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32nd ieee international symposium on computer architecture and high-performance computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)
作者: Schlemon, Maron Naghmouchi, Jamin German Aerosp Ctr DLR Microwaves & Radar Inst Oberpfaffenhofen Germany Innovat Gesell TU Braunschweig mbH Next Generat Comp Braunschweig Germany
Following the re-invention of the FFT algorithm by Cooley and Tukey in 1965, a lot of effort has been invested into optimization of this algorithm and all its variations. In this paper, we discuss its use and optimiza... 详细信息
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high-level service connectors for component-based high performance computing
High-level service connectors for component-based high perfo...
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19th international symposium on computer architecture and high performance computing
作者: de Carvalho-Junior, Francisco Heron Correa, Ricardo Cordeiro Araujo, Gisele Azevedo Silva, Jefferson Carvalho Lins, Rafael Duelre Univ Fed Ceara Dept Comp Fortaleza Ceara Brazil Univ Fed Pernambuco Dept Elect Sistemas Recife PE Brazil
Component-based programming has been applied to address the requirements of applications in high performance computing (HPC). The usual service connectors of commercial component models do not fit some requirements of... 详细信息
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A highly Efficient SGEMM Implementation using DMA on the Intel/Movidius Myriad-2  32
A Highly Efficient SGEMM Implementation using DMA on the Int...
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32nd ieee international symposium on computer architecture and high-performance computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)
作者: Bakshi, Suyash Johnsson, Lennart Univ Houston Dept Comp Sci Main Campus Houston TX 77204 USA
Reducing energy consumption and achieving high energy efficiency in computation has become the top priority in high performance computing. high energy efficiency generally requires high resource utilization since ener... 详细信息
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CLITE: Efficient and QoS-Aware Co-location of Multiple Latency-Critical Jobs for Warehouse Scale computers  26
CLITE: Efficient and QoS-Aware Co-location of Multiple Laten...
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26th ieee international symposium on high performance computer architecture (HPCA)
作者: Patel, Tirthak Tiwari, Devesh Northeastern Univ Boston MA 02115 USA
Large-scale data centers run latency-critical jobs with quality-of-service (QoS) requirements, and throughput-oriented background :jobs, which need to achieve high performance. Previous works have proposed methods whi... 详细信息
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