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检索条件"任意字段=IEEE International Symposium on Embedded Multicore/Many-core System-on-Chip"

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Emerging Frontiers and Limitations of Logic Locking for Secure IC Design

Emerging Frontiers and Limitations of Logic Locking for Secu...

引用

ieee international symposium on embedded multicore Socs (MCSoC)

作者： Jugal Gandhi Diksha Shekhawat M. Santosh Jai Gopal Pandey CSIR- Central Electronics Engineering Research Institute Pilani India Academy of Scientific and Innovative Research (AcSIR) Ghaziabad India

ISBN: (数字)9798331530471

ISBN: (纸本)9798331530488

The semiconductor industry is facing growing challenges in protecting hardware intellectual property (IP) designs within integrated circuits (ICs) from design theft, unauthorized access, reverse engineering, etc. As hardware security becomes critical, design for trust (DfTr) techniques are essential to ensure security from untrusted entities in the IC design process. Logic locking has emerged as a prominent hardware IP/IC security technique, establishing the way for the future of secure IC design. This article explores the principles of logic locking, its application in securing designs from unauthorized access, reverse engineering attempts, etc., and its potential in securing hardware IP/ICs. It delves into the evolving cat-and-mouse game between defenses and security vulnerabilities, where researchers continuously strive to develop more robust and resilient logic locking techniques to counter emerging threats. The discussion highlights the limitations in existing logic locking techniques, such as vulnerability to emerging adversarial algorithms, efficiency, scalability, etc. The article further explores emerging technologies and future research directions to bring logic locking to the forefront of secure IC design. By providing a comprehensive review of future prospects, this article serves as a valuable resource for researchers and industry professionals to leverage the potential of logic locking for secure IC design.

关键词： Integrated circuits Industries Reviews multicore processing Scalability Hardware security Reverse engineering Intellectual property Games Logic

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Unleashing Python’s Power Inside Oracle: A New Era of Machine Learning with OML4Py

Unleashing Python’s Power Inside Oracle: A New Era of Machi...

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ieee international symposium on embedded multicore Socs (MCSoC)

作者： Manjunatha Sughaturu Krishnappa Bindu Mohan Harve Vivekananda Jayaram Gokul Pandy Balaji Shesharao Ingole Vishnu Ramineni Shenson Joseph Nikhil Bangad Oracle America Inc. Santa Clara CA USA JPMorgan Chase Bank NA Lewisville TX USA Albertsons Companies Plano TX USA Meta Inc. Roundrock TX USA

ISBN: (数字)9798331530471

ISBN: (纸本)9798331530488

Oracle Machine Learning for Python (OML4Py) represents a significant advancement in data science and machine learning by seamlessly integrating Python’s extensive machine learning libraries with Oracle Database’s robust infrastructure. This paper explores the architecture, key features, and practical applications of OML4Py, highlighting its ability to execute Python scripts and machine learning algorithms directly within the database environment. By reducing data movement and leveraging the database’s processing power, OML4Py enhances efficiency and scalability in data analysis workflows. We provide a detailed guide on implementing OML4Py, from installation and configuration to model training and deployment. A case study on predicting customer churn in the telecom industry demonstrates the practical benefits and performance improvements achieved with OML4Py. This integration not only streamlines the machine learning process but also ensures secure, high-performance data processing, making it a valuable tool for data scientists and developers working with large-scale data.

关键词： Training Machine learning algorithms multicore processing Scalability Machine learning Data science Telecommunications Security Risk management Predictive analytics

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A Spintronics-Based Nonvolatile FPGA and Its Application to Edge-AI Accelerator

A Spintronics-Based Nonvolatile FPGA and Its Application to ...

引用

ieee international symposium on embedded multicore Socs (MCSoC)

作者： Daisuke Suzuki Takahiro Hanyu School of Computer Science and Engineering The University of Aizu Aizu-Wakamatsu Japan Research Institute of Electrical Communication Tohoku University Sendai Japan

ISBN: (纸本)9781665465007

A nonvolatile (NV) field-programmable gate array (FPGA) is quite attractive hardware platform for an internet of things (IoT) device in terms of reconfigurability and ultra-low-power standby power consumption. Moreover, the use of NV logic-in-memory (LIM) circuitry makes it possible to im-prove both area efficiency and energy efficiency. In this paper, some related topics about NV-FPGA, NV-LIM circuitry, and its application to the edge-AI accelerator are presented and its effectiveness is demonstrated.

关键词： Energy consumption Power demand Nonvolatile memory multicore processing Logic circuits Logic gates Hardware

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Making Software Based on Human-Driven Design Case Study: SQL for non-experts

Making Software Based on Human-Driven Design Case Study: SQL...

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ieee international symposium on embedded multicore Socs (MCSoC)

作者： Hida Masataka Watanobe Yutaka University of Aizu Aizu Japan

ISBN: (纸本)9781665465007

There are barriers between general public people and professionals or computers. This barrier can also be seen in an educational situation. The purpose of this study is to break the barriers and reduce the learning cost, misunderstandings, and conflicts among people, computers, and knowledge in studying. This study attempted to find a way to provide information to the general public by using the software. In this paper, “general people” stands for students or people learning new skills and professional knowledge or people who have no knowledge of the field. As a case study, this study will create a user-friendly SQL system for non-experts. Approaches are mainly presented from the UI design of software and the usage of professional terms and words. The concept of Human-Driven Design(HDD) is also used. This paper researches the balance of interaction between humans and technology when using software. Based on HDD, this study also considers the sustainability of the database field and creates an opportunity to consider the reasons why the wall between experts and non-experts appears.

关键词： Computers Human computer interaction Costs Databases multicore processing Market research Software

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Parameterizable mobile workloads for adaptable base station optimizations

Parameterizable mobile workloads for adaptable base station ...

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ieee international symposium on embedded multicore Socs (MCSoC)

作者： Julian Robledo Jeronimo Castrillon chair for compiler construction TU Dresden Dresden Germany

ISBN: (纸本)9781665465007

Recent works on 5G baseband processing systems address the optimization of applications with different require-ments of quality of service (QoS). The volume and heterogeneity of applications that have to be processed on a base station are growing and 5G introduces new use cases that push system designers towards more flexible and adaptable approaches. To investigate future network challenges of mobile communications, a good methodology for the generation of realistic workloads, that allows target optimizations of different traffic scenarios, is required. In this paper, we study the variation of real traffic data on multiple base stations and identify the main sources for the high variation of the 5G workloads. We propose a methodology for parameterizable workload generation for users with different QoS requirements that enables optimization techniques in base-band processing systems. We demonstrate the feasibility of our approach based on a virtual base station using a heterogeneous hardware model and various state-of-the-art mapping policies.

关键词： Base stations Baseband 5G mobile communication multicore processing Quality of service Hardware Generators

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A Realization of IO Physical Memory Protection for RISC-V systems

A Realization of IO Physical Memory Protection for RISC-V Sy...

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ieee international symposium on embedded multicore Socs (MCSoC)

作者： Jien Hau Ng Chee Hong Ang Hwa Chaw Law StarFive Technology International Sdn. Bhd. Penang Malaysia

ISBN: (纸本)9781665465007

Physical memories or RAMs are essential components in a computer system to hold temporary information required for both software and hardware to work properly. When a system's security is compromised (e.g., due to a malicious application), sensitive information being held in the memories can be leaked out for example to “the cloud”. The RISC-V privileged architecture standard adopts a method called Physical Memory Protection (PMP) to segregate a system's memory into regions with different policy and permissions to prevent unprivileged software from accessing unauthorized regions. However, PMP does not prevent malicious software from hijacking an Input/Output (IO) device with Direct Memory Access (DMA) capability to indirectly gain unauthorized accesses and hence, a similar method commonly termed as “IOPMP” is being worked on in the RISC-V community. This paper describes an early implementation of IOPMP and how it is used to protect physical memory regions in a RISC-V system. Then, the potential performance impact of IOPMP is briefly elaborated. There are still work to be done and this early IOPMP implementation allows various aspects of the protection method such as its scalability, practicality, and effectiveness etc. to be studied for future enhancement.

关键词： multicore processing Scalability Memory management Random access memory Malware Hardware Computer security

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Fake Image Detection Using An Ensemble of CNN Models Specialized For Individual Face Parts

Fake Image Detection Using An Ensemble of CNN Models Special...

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ieee international symposium on embedded multicore Socs (MCSoC)

作者： Akihisa Kawabe Ryuto Haga Yoichi Tomioka Yuichi Okuyama Jungpil Shin School of Computer Science and Engineering the University of Aizu Aizu-Wakamatsu City Fukushima Japan

ISBN: (纸本)9781665465007

With the rapid increase of deep learning technology, creating human face images with artificial intelligence (AI) is becoming easier. Those generated images are coming up to images that humans cannot distinguish from authentic ones. It is essential to realize an accurate method to detect such fake images to avoid abusing them. In this paper, we propose a fake image detection using an ensemble model of convolutional neural network (CNN) models that focus on deepfake detection of individual face parts. Our results show that a combination of deepfake detection based on different face parts is effective. This idea can be adopted on partially manipulated deepfake images/videos.

关键词： Deepfakes multicore processing Nose Mouth Detectors Convolutional neural networks Reliability

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Driver Status Monitoring system with Feedback from Fatigue Detection and Lane Line Detection

Driver Status Monitoring System with Feedback from Fatigue D...

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ieee international symposium on embedded multicore Socs (MCSoC)

作者： Kai Yan Chaoyue Zhao Chengkang Shen Peiyan Wang Guoqing Wang Research Centre 2nd Research Institute of CAAC Chengdu China AI Research Centre China Telecom Research Institute (CTRI) Beijing China School of Electronic Science and Engineering Nanjing University Nanjing China Department of Electrical and Computer Engineeering Purdue University West Lafayette USA School of Computer Science and Engineering University of Electronic Science and Technology of China Chengdu China

ISBN: (纸本)9781665465007

Automobiles have become an indispensable part of life for both business and pleasure in today's society. Because of the long-term continuous work, fatigue presents a great danger to ride-sharing and truck drivers. Therefore, this paper aims to design a device that provides valuable feedback by evaluating driver status and surroundings. A gradient judgment is made through lane detection and face detection. When a dangerous condition is detected, the driver will be alerted by music and audio announcements with different degrees. The system also has two additional functions. First, a digital record-keeping to assist the professional driver. The other is a security system that if a stranger starts the car, a text message will be sent to the owner's phone. Compared with those in previous works, the proposed system's efficacy and efficiency are validated qualitatively and quantitatively in driver fatigue detection.

关键词： Lane detection multicore processing Face recognition Roads Fatigue Safety Automobiles

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Design and Analysis of A Dual-Band Bistatic Backscatter Circuit for Passive RFID Tags

Design and Analysis of A Dual-Band Bistatic Backscatter Circ...

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ieee international symposium on embedded multicore Socs (MCSoC)

作者： Nasir Abdul Quadir Maher Hamdi Muhammad Asfandyar Awan Bo Wang Amine Bermak Division of Information and Computing Technology College of Science and Engineering Hamad Bin Khalifa University Doha Qatar School of Business George Washington University Washington DC USA

ISBN: (纸本)9781665465007

Passive radio-frequency identification (RFID) tags, when placed remotely or in harsh environments, will benefit the most if the communication distance between the tag and reader is vastly improved. The bistatic backscattering technique provides a solution to this problem by separating the carrier and backscattered signal in frequency, which helps mitigate interference. It also decouples the reader from carrier generation by having a separate radio-frequency (RF) emitter and further improves the signal strength by reducing round trip path loss. A dual-band on-chip bistatic backscattering circuit design for passive RFID tags is presented in this paper using a 180 nm CMOS process dissipating 35 $\mu \mathrm{W}$ of power. Post layout simulation results provide a communicable distance of 170 m between the tag and reader at 868 MHz and 60 m at 2.4 GHz when the tag is kept 5 m away from the RF emitter.

关键词： Radio frequency Simulation Dual band Frequency shift keying Circuit synthesis system-on-chip Passive RFID tags

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Exploration of an Enhanced Scheduling Approach with Feasibility Analysis on a Single CPU system

Exploration of an Enhanced Scheduling Approach with Feasibil...

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ieee international symposium on embedded multicore Socs (MCSoC)

作者： Vijayalakshmi Saravanan Gang Wan Anju S Pillai Department of Computer Science University of South Dakota Vermillion SD USA Department of Electrical and Electronics Engineering Amrita School of Engineering Coimbatore Amrita Vishwa Vidyapeetham India

ISBN: (纸本)9781665465007

Developing a new scheduling algorithm and conducting the performance analysis to recognize its effect in practice can be a laborious task. CPU scheduling is crucial in achieving the operating system's (OS) design goals. There exists a variety of scheduling algorithms in the field and in this paper, a performance comparison of different existing scheduling algorithms by simulating the same bundle of tasks is carried out. A variety of algorithms under batch OS and time-sharing OS are considered. Upon the analysis, a novel task scheduling algorithm incorporating the merits of existing algorithms is proposed for a single CPU system. The performance of various algorithms is compared with the proposed algorithm for parameters viz., throughput, CPU utilization, average turnaround time, waiting time, and response time. Extensive simulation analysis for the various bundle of tasks is conducted and the proposed algorithm is found to outperform the other algorithms in terms of guaranteed reduced average response time. Thus, an efficient CPU scheduler is proposed to accommodate varying workloads at run-time making the best use of the CPU in a particular execution scenario.

关键词： Analytical models multicore processing Operating systems Throughput Scheduling Performance analysis Time factors

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