检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

1,186 篇 会议
21 篇 期刊文献

馆藏范围

1,207 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

634 篇 工学
- 484 篇 计算机科学与技术...
- 339 篇 电气工程
- 170 篇 软件工程
- 103 篇 电子科学与技术（可...
- 58 篇 控制科学与工程
- 40 篇 信息与通信工程
- 18 篇 仪器科学与技术
- 15 篇 动力工程及工程热...
- 14 篇 机械工程
- 14 篇 材料科学与工程（可...
- 7 篇 生物工程
- 7 篇 安全科学与工程
- 5 篇 光学工程
- 5 篇 化学工程与技术
- 4 篇 环境科学与工程（可...
- 4 篇 生物医学工程（可授...
- 3 篇 冶金工程
- 3 篇 建筑学
- 3 篇 土木工程
- 3 篇 石油与天然气工程
63 篇 理学
- 26 篇 数学
- 19 篇 物理学
- 15 篇 系统科学
- 8 篇 生物学
- 4 篇 化学
45 篇 管理学
- 39 篇 管理科学与工程(可...
- 10 篇 工商管理
- 5 篇 图书情报与档案管...
6 篇 法学
- 4 篇 社会学
4 篇 经济学
- 4 篇 应用经济学
3 篇 农学
2 篇 医学
1 篇 文学

主题

400 篇 multicore proces...
160 篇 hardware
145 篇 system-on-chip
83 篇 computer archite...
77 篇 embedded systems
70 篇 system-on-a-chip
62 篇 program processo...
58 篇 computational mo...
57 篇 real-time system...
53 篇 field programmab...
47 篇 benchmark testin...
46 篇 throughput
46 篇 random access me...
44 篇 kernel
42 篇 memory managemen...
40 篇 power demand
38 篇 instruction sets
37 篇 parallel process...
37 篇 energy consumpti...
37 篇 multiprocessing ...

机构

5 篇 tampere universi...
5 篇 school of comput...
5 篇 department of in...
5 篇 institute for co...
5 篇 department of co...
4 篇 national institu...
4 篇 univ grenoble al...
4 篇 infineon technol...
4 篇 engineering prod...
4 篇 department of co...
4 篇 tokyo inst techn...
4 篇 school of comput...
3 篇 univ siegen chai...
3 篇 school of comput...
3 篇 singapore univer...
3 篇 dept. of informa...
3 篇 graduate school ...
3 篇 international co...
3 篇 chiba univ grad ...
3 篇 eecs department ...

作者

10 篇 benini luca
10 篇 hideharu amano
9 篇 kise kenji
8 篇 nurmi jari
8 篇 hamada mohamed
8 篇 amano hideharu
7 篇 mohamed hamada
7 篇 luca benini
6 篇 obermaisser roma...
6 篇 kenji kise
5 篇 pasi liljeberg
5 篇 roman obermaisse...
5 篇 t. hui teo
5 篇 marongiu andrea
5 篇 yuichi okuyama
5 篇 jungpil shin
4 篇 hiroki matsutani
4 篇 hannu tenhunen
4 篇 goehringer diana
4 篇 dutt nikil

语言

1,196 篇 英文
6 篇 其他
5 篇 中文

检索条件"任意字段=IEEE International Symposium on Embedded Multicore/Many-core System-on-Chip"

共 1207 条记录，以下是381-390 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Real-time UAV Attitude Heading Reference system Using Extended Kalman Filter for Programmable SoC 11

Real-time UAV Attitude Heading Reference System Using Extend...

引用

11th ieee international symposium on embedded multicore/many-core systems-on-chip (MCSoC)

作者： Mie, Shunsuke Okuyama, Yuichi Sato, Yusuke Chan, Ye Dang, Nam Khanh Abderazek, Ben Abdellash Univ Aizu Grad Sch Comp Sci & Engn Aizu Wakamatsu Fukushima Japan Univ Yangon UniversitiesRes Ctr Yangon Myanmar

ISBN: (纸本)9781538634417

We implemented an extended Kalman filter (EKF) hardware for a real-time attitude heading reference system (AHRS). Attitude estimation is an important process for small unmanned aerial vehicle (UAV) control. Small UAVs mounts smaller sensors due to the limitation of space and power. However, effects of noise components in sensor output become large if the size of sensors become smaller. We considered using EKF to reduce effects of noises by sensor fusion. Moreover, real-time and highly accurate attitude estimation is required for an autonomous flight of UAVs. To reduce loads of processors in a real-time calculation of EKF, we implemented a circuit of EKF by C-based hardware design in Programmable SoC. We achieved five times faster EKF processing on FPGA than the processing on ARM Cortex-A9@677Hz with single core processing.

关键词： Attitude Heading Reference system Extended Kalman Filter FPGA C-based hardware design

来源：评论

学校读者我要写书评

暂无评论

Exploiting Locality in Graph Analytics through Hardware-Accelerated Traversal Scheduling 51

Exploiting Locality in Graph Analytics through Hardware-Acce...

引用

51st Annual ieee/ACM international symposium on Microarchitecture (MICRO)

作者： Mukkara, Anurag Beckmann, Nathan Abeydeera, Maleen Ma, Xiaosong Sanchez, Daniel MIT CSAIL Cambridge MA 02139 USA CMU SCS Pittsburgh PA USA QCRI Ar Rayyan Qatar

ISBN: (纸本)9781538662403

Graph processing is increasingly bottlenecked by main memory accesses. On-chip caches are of little help because the irregular structure of graphs causes seemingly random memory references. However, most real-world graphs offer significant potential locality it is just hard to predict ahead of time. In practice, graphs have well-connected regions where relatively few vertices share edges with many common neighbors. If these vertices were processed together, graph processing would enjoy significant data reuse. Hence, a graph's traversal schedule largely determines its locality. This paper explores online traversal scheduling strategies that exploit the community structure of real-world graphs to improve locality. Software graph processing frameworks use simple, locality-oblivious scheduling because, on general-purpose cores, the benefits of locality-aware scheduling are outweighed by its overheads. Software frameworks rely on offfine preprocessing to improve locality. Unfortunately, preprocessing is so expensive that its costs often negate any benefits from improved locality. Recent graph processing accelerators have inherited this design. Our insight is that this misses an opportunity: Hardware acceleration allows for more sophisticated, online locality-aware scheduling than can be realized in software, letting systems significantly improve locality without any preprocessing. To exploit this insight, we present bounded depth-first scheduling (BDFS), a simple online locality-aware scheduling strategy. BDFS restricts each core to explore one small, connected region of the graph at a time, improving locality on graphs with good community structure. We then present HATS, a hardware accelerated traversal scheduler that adds just 0.4% area and 0.2% power over general-purpose cores. We evaluate BDFS and HATS on several algorithms using large real-world graphs. On a simulated 16-core system, BDFS reduces main memory accesses by up to 2.4x and by 30% on average. However, BDF

关键词： graph analytics multicore caches locality scheduling prefetching

来源：评论

学校读者我要写书评

暂无评论

Implementation of Analytical Tool for Power Analysis in Multi core Modem 2

Implementation of Analytical Tool for Power Analysis in Mult...

引用

2nd international Conference on Electronics, Communication and Aerospace Technology, ICECA 2018

作者： Garg, Nemesa Jain, Ankit Arun, M. Department of Embedded Systems VIT India Intel Technology India Pvt. Ltd India

ISBN: (纸本)9781538609651

Power consumption in mobile devices is primarily critical because of battery life. It is mainly useful for measuring the performance of the handheld devices as power source has its limitations. Nowadays mobile industries are incorporating multicore modem which implements complex software with hardware. This paper mainly present the method of validating multi-core behavior of modem chip through specifically designed command line interface tool. The command can be given through any terminal like Tera Term/Putty. Through these customized commands, status of each core in modem is known so that power consumption of device can be known. As there is shutdown state, sleep state of a subsystem in the over-all system and also pending interrupts are there, all this can be known by using information of all states and interrupt queues in the modem and hence performance of the power source can be analyzed accurately and effectively. © 2018 ieee.

关键词： Modems

来源：评论

学校读者我要写书评

暂无评论

Comparative Study on Edge Detection Algorithms using OpenACC and OpenMPI on multicore systems 11

Comparative Study on Edge Detection Algorithms using OpenACC...

引用

11th ieee international symposium on embedded multicore/many-core systems-on-chip (MCSoC)

作者： Goyal, Aakashdeep Li, Zuqing Kimm, Haklin East Stroudsburg Univ Dept Comp Sci East Stroudsburg PA 18301 USA

ISBN: (纸本)9781538634417

In this paper, we present a comparative study on parallel edge detection algorithms upon high-resolution satellite images, implemented on OpenACC, Hybrid OpenMP/MPI, OpenMP, and MPI models on which the Sobel, Prewitt and Canny algorithms were developed using C++ language and OpenCV. The performance of these computing models were measured in terms of speedup and execution time by implementing the edge detection algorithms using various sized images and programming constructs. The program implementations using OpenACC display the largest speedup in CPU time, which is followed by the Hybrid OpenMP/MPI model. The parallel detection algorithms using OpenACC obtain the greatest speedup of around 6.5 over OpenMP model. The parallel Sobel and Prewitt algorithms are relatively 2 times faster than the Canny in all respects.

关键词： Edge Detection OpenACC OpenMP OpenMPI multicore

来源：评论

学校读者我要写书评

暂无评论

A Novel Multi-core Approach for Functional Safety Compliance of Automotive Electronic Control Unit According to ISO 26262

A Novel Multi-Core Approach for Functional Safety Compliance...

引用

international Conference for Convergence of Technology (I2CT)

作者： Pramit Nag Umesh Ghanekar Jyoti Harmalkar School of VLSI Design and Embedded Systems NIT Kurukshetra Kurukshetra India Dept. of ECE NIT Kurukshetra Kurukshetra India Product Engineering Services KPIT Technologies LTD. Pune India

ISBN: (数字)9781538680759

ISBN: (纸本)9781538680766

The modern automotive market is heading towards significant transformations in terms of automation and driver assistance. To cope up with this rapidly evolving technology in modern vehicles, the use of electronic system has reached to a new level. Following this rapid growth of electronic systems in automotive industry, the need for ensuring safety and reliability has become one of the most important issues for all car manufacturers where the ISO 26262 functional safety standard plays a key role. The increased complexity in automotive electronic control units (ECU) has raised many technical and economic arguments for designers to choose between two options, either using multicore architecture or increasing monolithic processor's performance. This paper presents functional safety compliance of an electronic control unit for a battery pack system and looks into a novel multi-core architectural approach for fulfilling the requirements.

关键词： ISO Standards Batteries Hazards Automotive engineering Hardware Controllability

来源：评论

学校读者我要写书评

暂无评论

Quadcopter control implemented on FPGA*

Quadcopter control implemented on FPGA*

引用

international symposium on Computational Intelligence and Informatics

作者： István Zsolt Székely Sándor Tihamér Brassai Sapientia Hungarian University of Transylvania Cluj Napoca Romania

ISBN: (数字)9781728156255

ISBN: (纸本)9781728156262

The aim of the paper is to solve the horizontal stabilization of a quadcopter on a Field Programmable Gate Array circuit. There are similar implementations, many of them implemented on microcontroller or embedded processors. Our implementation focuses on Zybo Development Board Zynq-7000 family, which integrates a dual-core ARM Cortex-A9 processor and Xilinx 7-series FPGA logic. The essence of the work is the implementation in FPGA of the critical control loops: sensors reading, control algorithm, filters, motor control and remote control. One of the main aim of our project is to apply the implemented modules in education as well. High level control algorithm is proposed to be implemented on the embedded processor. The various subunits of the task are integrated in the Xilinx system Generator. Critical parts, the control and synchronization of the modules, are implemented in VHDL as finite state machine with datapath. Hardware co-simulation allows system parameter update and measurement evaluation during the operation and simplifies testing of implemented circuits. The paper details the measurements made under laboratory conditions for one degree of freedom of the system.

关键词： FPGA control quacopter UAV hardware implementation Field programmable gate arrays drone honey bees Unmanned Aerial Vehicle Degree of freedom Standing Orders embedded processor finite state machines very high density lipoproteins Microcontrollers Essences Computer algorithms control of movement

来源：评论

学校读者我要写书评

暂无评论

Hypervisor-Induced Negative Interference in Virtualized Multi-core Platforms: The P4080 Case 11

Hypervisor-Induced Negative Interference in Virtualized Mult...

引用

11th ieee international symposium on embedded multicore/many-core systems-on-chip (MCSoC)

作者： Dutta, Sourav Kagaris, Dimitri Ramaprasad, Harini Southern Illinois Univ Dept Elect & Comp Engn Carbondale IL 62901 USA Univ N Carolina Dept Comp Sci Charlotte NC USA

ISBN: (纸本)9781538634417

Modern real-time (RT) applications heavily depend on multi-core processors to meet the increasing computing demands within strict time-constraints. To reduce the cost of overall hardware, most of these applications run along with general purpose workloads on the same hardware platform which may create data contention in shared resources and incur delay for the time critical RT applications. Virtualization of the hardware platform under the supervision of a Virtual Machine Monitor (VMM) or hypervisor allows the isolation of shared resources among concurrent applications from different domains. However, the actual partitioning of hardware resources among the hosted operating systems as well as the hypervisor play a significant role in the performance of the RT applications. In this paper we report results of an experimental investigation for this purpose on a particular multi-core platform, the P4080 developed by Freescale Semiconductor Inc. Using the actual (not simulated) P4080 hardware platform and the Topaz hypervisor, we examined the effect that the partition of the last-level cache (LLC) among a Real-Time Operating system (RTOS), a General Purpose Operating system (GPOS) and the hypervisor has on the performance of the RT tasks. We have identified inverted bell-shaped curves that seem to govern the optimal allocation of resources for P4080.

关键词： Virtual machine monitors Hardware Operating systems Interference Task analysis Time factors Real-time systems Virtual machine monitors Operating systems task analysis Time Factors real-time systems Hardware Platform Computer hardware Resource utilization general purpose operating system interference Room temperature centromere interference

来源：评论

学校读者我要写书评

暂无评论

Parallel Longest Common Sequence Algorithm on multicore systems Using OpenACC, OpenMP and OpenMPI 11

Parallel Longest Common Sequence Algorithm on Multicore Syst...

引用

11th ieee international symposium on embedded multicore/many-core systems-on-chip (MCSoC)

作者： Li, Zuqing Goyal, Aakashdeep Kimm, Haklin East Stroudsburg Univ Penn Dept Comp Sci East Stroudsburg PA 18301 USA

ISBN: (纸本)9781538634417

The longest common subsequence (LCS) problem is one of the most useful algorithms being applied in various research areas. This problem is known to be NP-hard for arbitrary data. In this paper, we present a parallel LCS algorithm using the GPU-based OpenACC model, which is based on the existing dynamic approach and parallel anti-diagonal scheme that is applied in order to eliminate the data dependencies. The proposed algorithm in this paper has been benchmarked using four different computing models: OpenMPI, OpenMP, hybrid OpenMPI & OpenMP, and OpenACC model. The parallel LCS algorithm has been implemented using Swiss-Prot databases over these computing models, so that their execution times, speed-ups and speed-ratios have been measured and analogized among them extensively. Our experimental results reveal that the computation of our algorithm on OpenACC (on GPU) is around 16 times faster than the execution on a single CPU, and around 2 times faster than on the octa-core processor systems. The performance of the OpenACC model stands out among the four tested models in solving the LCS problem.

关键词： Heuristic algorithms Dynamic programming Graphics processing units Computational modeling Programming multicore processing Parallel algorithms Computational modeling Parallel algorithms Heuristic algorithms dynamic programming Programming Graphics Processing Unit LCS1 gene Legal Executions Parallel Lines Multi-core processors algorithms

来源：评论

学校读者我要写书评

暂无评论

Towards Memory Friendly Long-Short Term Memory Networks (LSTMs) on Mobile GPUs 51

Towards Memory Friendly Long-Short Term Memory Networks (LST...

引用

51st Annual ieee/ACM international symposium on Microarchitecture (MICRO)

作者： Zhang, Xingyao Xie, Chenhao Wang, Jing Zhang, Weidong Fu, Xin Univ Houston ECE Dept ECOMS Lab Houston TX 77004 USA Capital Normal Univ Beijing Adv Innovat Ctr Imaging Tech Beijing Peoples R China

ISBN: (纸本)9781538662403

Intelligent Personal Assistants (IPAs) with the capability of natural language processing (NLP) are increasingly popular in today's mobile devices. Recurrent neural networks (RNNs), especially one of their forms Long-Short Term Memory networks (LSTMs), are becoming the core machine learning technique applied in the NLP-based IPAs. With the continuously improved performance of mobile GPUs, local processing has become a promising solution to the large data transmission and privacy issues induced by the cloud-centric computations of IPAs. However, LSTMs exhibit quite inefficient memory access pattern when executed on mobile GPUs due to the redundant data movements and limited off-chip bandwidth. In this study, we aim to explore the memory friendly LSTM on mobile GPUs by hierarchically reducing the off-chip memory accesses. To address the redundant data movements, we propose inter-cell level optimizations that intelligently parallelize the originally sequentially executed LSTM cells (basic units in RNNs, corresponding to neurons in CNNs) to improve the data locality across cells with negligible accuracy loss. To relax the pressure on limited off chip memory bandwidth, we propose infra-cell level optimizations that dynamically skip the loads and computations of rows in the weight matrices with trivial contribution to the outputs. We also introduce a light-weighted module to the GPUs architecture for the runtime row skipping in weight matrices. Moreover, our techniques are equipped with thresholds which provide a unique twining space for performance-accuracy trade-offs directly guided by the user preferences. The experimental results show our optimizations achieves substantial improvements on both performance and power with user-imperceptible accuracy loss. And our optimizations exhibit the strong scalability with the increasing input data set. Our user study also shows that our designed system delivers the excellent user experience.

关键词： Approximate Computing GPGPU/GPU Mobile and embedded Architectures

来源：评论

学校读者我要写书评

暂无评论

Model-free Runtime Management of Concurrent Workloads for Energy-Efficient many-core Heterogeneous systems 28

Model-free Runtime Management of Concurrent Workloads for En...

引用

28th ieee international symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)

作者： Aalsaud, Ali Rafiev, Ashur Xia, Fei Shafik, Rishad Yakovlev, Alex Univ Newcastle Sch Engn Newcastle Upon Tyne NE1 7RU Tyne & Wear England Univ Newcastle Sch CS Newcastle Upon Tyne NE1 7RU Tyne & Wear England Al Mustansiriya Univ Sch Engn Baghdad Iraq

ISBN: (纸本)9781538663653

Modern embedded systems execute multiple applications, both sequentially and concurrently, on heterogeneous platforms. Determining the most energy-efficient system configuration (i.e. the number of parallel threads, their core allocations and operating frequencies) tailored for each kind of workload is extremely challenging. In this paper, we propose a novel runtime optimization approach with the aim of maximizing power-normalized performance considering dynamic workload variations. To reduce overhead and complexity, we adopt a model-free approach to runtime adaptation based on workload classification. This classification is supported by analysis of data collected from a comprehensive study investigating the tradeoffs between inter-application concurrency with performance and power under different system configurations. We conduct extensive experiments on an Odroid XU3 heterogeneous platform with synthetic and standard benchmark applications to develop the control policies and validate our approach. These experiments show that workload classification into CPU-intensive and memory-intensive types provides the foundation for scalable energy minimization with low complexity. Implementing this approach as a Linux runtime governor, we demonstrate that IPS/Watt can be improved by over 120% compared to existing approaches.

关键词： many-core systems concurrent applications runtime optimization power-normalized performance workload classification

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共121页 << < 35 36 37 38 39 40 41 42 43 44 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：