The proceedings contain 45 papers. The topics discussed include: high-level modeling of manufacturing faults in deep neural network accelerators;storage based built-in test pattern generation method for close-to-funct...
ISBN:
(纸本)9781728181875
The proceedings contain 45 papers. The topics discussed include: high-level modeling of manufacturing faults in deep neural network accelerators;storage based built-in test pattern generation method for close-to-functional broadside tests;reduced fault coverage as a target for design scaffolding security;a CMOS OxRAM-based neuron circuit hardened with enclosed layout transistors for aerospace applications;soft error tolerance of power-supply-noise hardened latches;on the testing of special memories in GPGPUs;temporary laser fault injection into flash memory: calibration, enhanced attacks, and countermeasures;and broadside ATPG for low power Trojans detection using built-in current sensors.
The proceedings contain 38 papers. The topics discussed include: do radiation and aging impact DVFS? TCAD-based Analysis on 22 nm FDSOI latches;navigating the road to automotive cybersecurity compliance;can social med...
ISBN:
(纸本)9798350370553
The proceedings contain 38 papers. The topics discussed include: do radiation and aging impact DVFS? TCAD-based Analysis on 22 nm FDSOI latches;navigating the road to automotive cybersecurity compliance;can social media shape the security of next-generation connected vehicles?;on the fine tuning of RRAM resistance under variability using current pulses at SET;anomalous IoT behavior detection by generated power waveforms with hyper-parameter tuning;silent data corruptions in computing: understand and quantify;on approaching multivariate IC pre-silicon verification using ML-based adaptive algorithms;silent data corruption and reliability risks due to faults affecting high performance microprocessors’ caches;SpikingJET: enhancing fault injection for fully and convolutional spiking neural networks;and a graph-based methodology for speeding up cell-aware model generation.
The proceedings contain 34 papers. The topics discussed include: on-chip SRAM disclosure attack prevention technique for SoC;towards dependable RISC-V cores for edge computing devices;ERrOR: improving performance and ...
ISBN:
(纸本)9798350341355
The proceedings contain 34 papers. The topics discussed include: on-chip SRAM disclosure attack prevention technique for SoC;towards dependable RISC-V cores for edge computing devices;ERrOR: improving performance and fault tolerance using early execution;ML-based onlinedesign error localization for RISC-V implementations;TREFU: an online error detecting and correcting fault tolerant GPGPU architecture;SafeLS: an open source implementation of a lockstep NOEL-V RISC-V core;microarchitecture-aware timing error prediction via deep neural networks;a learning-based approach for single event transient analysis in pass transistor logic;and about the correlation between logical identified faulty gates and their layout characteristics.
The proceedings contain 37 papers. The topics discussed include: experimental evaluation of neutron-induced errors on a multicore RISC-V platform;functional and timing implications of transient faults in critical syst...
ISBN:
(纸本)9781665473552
The proceedings contain 37 papers. The topics discussed include: experimental evaluation of neutron-induced errors on a multicore RISC-V platform;functional and timing implications of transient faults in critical systems;a closer look at evaluating the bit-flip attack against deep neural networks;a new decoding method for double error correcting cross parity codes;all digital low-cost built-in defect testing strategy for operational amplifiers with high coverage;an experimentally tuned compact electrical model for laser fault injection simulation;compressed learning in MCA architectures to tolerate malicious noise;microcontroller performance screening: optimizing the characterization in the presence of anomalous and noisy data;recent trends and perspectives on defect-oriented testing;a novel fault-tolerant logic style with self-checking capability;effective hardware-trojan feature extraction against adversarial attacks at gate-level netlists;understanding the impact of cutting in quantum circuits reliability to transient faults;and quantum noise in the flow of time: a temporal study of the noise in quantum computers.
The proceedings contain 32 papers. The topics discussed include: neuron-PUF: physical unclonable function based on a single spiking neuron;SafeDE: a flexible diversity enforcement hardware module for light-locksteppin...
ISBN:
(纸本)9781665433709
The proceedings contain 32 papers. The topics discussed include: neuron-PUF: physical unclonable function based on a single spiking neuron;SafeDE: a flexible diversity enforcement hardware module for light-lockstepping;unsupervised recycled FPGA detection based on direct density ratio estimation;flip flop weighting: a technique for estimation of safety metrics in automotive design;online fast detection and diagnosis of power grid security attacks using state checksums;towards error resilient and power-efficient adaptive multiprocessor system using highly configurable and flexible cross-layer framework;MOZART: masking outputs with Zeros for architectural robustness and testing of DNN accelerators;and FPGA checkpointing for scientific computing.
You are reading the Editorial of the Special Section of ieee Transactions on Device and Materials Reliability (TDMR) with a collection of the best papers of the 2018 edition of the ieeeinternational On-linetesting 5...
详细信息
You are reading the Editorial of the Special Section of ieee Transactions on Device and Materials Reliability (TDMR) with a collection of the best papers of the 2018 edition of the ieeeinternational On-linetesting 50 and robustsystemdesignsymposium (IOLTS), an established ieeesymposium which has focused for more than two decades on the challenges and solutions for electronic circuits and systems robustdesign . Held for its first 21 years as the ieeeinternational On-linetestingsymposium, it was recently renamed to the international On-linetesting and robustsystems designsymposium , keeping its well-recognized acronym IOLTS; it continues a healthy history with its quarter-century (25th) edition planned for July 2019.
The proceedings contain 69 papers. The topics discussed include: global and local process variation simulations in design for reliability approach;on a side channel and fault attack concurrent countermeasure methodolo...
ISBN:
(纸本)9781728124902
The proceedings contain 69 papers. The topics discussed include: global and local process variation simulations in design for reliability approach;on a side channel and fault attack concurrent countermeasure methodology for MCU-based byte-sliced cipher implementations;automated die inking through on-line machine learning;dual detection of heating and photocurrent attacks (DDHP) sensor using Hybrid CMOS/STT-MRAM;run-time detection and mitigation of power-noise viruses;variation-aware fault modeling and test generation for STT-MRAM;QuSecNets: quantization-based defense mechanism for securing deep neural network against adversarial attacks;and software-only diverse redundancy on GPUs for autonomous driving platforms.
The proceedings contain 63 papers. The topics discussed include: a novel use of approximate circuits to thwart hardware trojan insertion and provide obfuscation;error resilient neuromorphic networks using checker neur...
ISBN:
(纸本)9781538659922
The proceedings contain 63 papers. The topics discussed include: a novel use of approximate circuits to thwart hardware trojan insertion and provide obfuscation;error resilient neuromorphic networks using checker neurons;a capture safe static test compaction method based on don't cares;towards an automatic approach for hardware verification according to ISO 26262 functional safety standard;fault-independent test-generation for software-based self-testing;from on-chip self-healing to self-adaptivity in analog/RF ICs: challenges and opportunities;minimization of timing failures in pipelined designs via path shaping and operand truncation;efficient fault injection for embedded systems: as fast as possible but as accurate as necessary;integrated test structures for reliability investigation under dynamic stimuli;a new approach to threshold voltage measurements of transistors;impact of a laser pulse on a STT-MRAM bitcell: security and reliability issues;on the effect of aging in detecting hardware trojan horses with template analysis;a test register assignment method based on controller augmentation to reduce the number of test patterns;reliability estimations of large circuits in massively-parallel GPU-SPICE;and reliability improvements for multiprocessor systems by health-aware task scheduling.
This Special Section of ieee Transactions on Device and Materials Reliability includes a collection of the best papers of the latest (2016) edition of an established ieeesymposium which focuses for more than two deca...
详细信息
This Special Section of ieee Transactions on Device and Materials Reliability includes a collection of the best papers of the latest (2016) edition of an established ieeesymposium which focuses for more than two decades on the challenges and solutions for electronic circuits and systems on-linetesting and fault tolerance. Held for 21 years as the ieeeinternational On-linetestingsymposium it was renamed in 2016 to international On-linetesting and robustsystems designsymposium keeping its well recognized acronym IOLTS.
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