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NPB-PSTL: C++ STL Algorithms with parallel Execution Policies in NAS parallel Benchmarks 33

NPB-PSTL: C++ STL Algorithms with Parallel Execution Policie...

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33rd Euromicro international Conference on parallel, distributed, and Network-Based processing, PDP 2025

作者： Loff, Junior Hoffmann, Renato B. Bianchessi, Arthur S. Mallmann, Leonardo Griebler, Dalvan Binder, Walter Faculty of Informatics Lugano Switzerland Porto Alegre Brazil

ISBN: (纸本)9798331524937

The C++ language continually evolves through formal specifications established by its standards committee, proposing new features to maintain $\mathrm{C}++$ as a relevant programming language while improving usability, performance, and portability across platforms. With the addition of parallel Standard Template Library (STL) algorithms in C++17, programmers can now leverage parallel processing capabilities via vendor-neutral parallel execution policies. This study presents an adaptation of the NAS parallel Benchmarks (NPB) - a well-established suite of applications for evaluating parallel architectures-by porting its sequential C-style code to use C++ STL abstractions and performance-portable parallelism features. Our goals are to (1) assess the suitability of C++ STL for scientific applications like the ones in the NPB and (2) provide a comparative performance and portability of STL algorithms' parallel execution policies across different multicore architectures (x86 and AArch64). Results indicate that the performance of parallel STL algorithms is often close to that of optimized handwritten versions (OpenMP, Intel TBB, and FastFlow) on different architectures, with notable shortfalls. Across all NPB benchmarks, the STL algorithms' geometric mean shows sequential execution times that are between 3.76% and $\mathrm{6. 9 \%}$ higher, while parallel executions may reach a geometric mean of up to $\mathrm{2 1. 2 1 \%}$ higher execution time. © 2025 ieee.

关键词： C++ (programming language)

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MIMDRAM: An End-to-End processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Computing 30

MIMDRAM: An End-to-End Processing-Using-DRAM System for High...

引用

30th ieee international symposium on High-Performance Computer Architecture (HPCA)

作者： Oliveira, Geraldo F. Olgun, Ataberk Yaglikci, Abdullah Giray Bostanci, F. Nisa Gomez-Luna, Juan Ghose, Saugata Mutlu, Onur Swiss Fed Inst Technol Zurich Switzerland Univ Illinois Champaign IL USA

ISBN: (纸本)9798350393132;9798350393149

processing-using-DRAM (PUD) is a processing-in-memory (PIM) approach that uses a DRAM array's massive internal parallelism to execute very-wide (e.g., 16,384-262,144-bit-wide) data-parallel operations, in a single-instruction multiple-data (SIMD) fashion. However, DRAM rows' large and rigid granularity limit the effectiveness and applicability of PUD in three ways. First, since applications have varying degrees of SIMD parallelism (which is often smaller than the DRAM row granularity), PUD execution often leads to underutilization, throughput loss, and energy waste. Second, due to the high area cost of implementing interconnects that connect columns in a wide DRAM row, most PUD architectures are limited to the execution of parallel map operations, where a single operation is performed over equally-sized input and output arrays. Third, the need to feed the wide DRAM row with tens of thousands of data elements combined with the lack of adequate compiler support for PUD systems create a programmability barrier, since programmers need to manually extract SIMD parallelism from an application and map computation to the PUD hardware. Our goal is to design a flexible PUD system that overcomes the limitations caused by the large and rigid granularity of PUD. To this end, we propose MIMDRAM, a hardware/software co-designed PUD system that introduces new mechanisms to allocate and control only the necessary resources for a given PUD operation. The key idea of MIMDRAM is to leverage finegrained DRAM (i.e., the ability to independently access smaller segments of a large DRAM row) for PUD computation. MIMDRAM exploits this key idea to enable a multiple-instruction multiple-data (MIMD) execution model in each DRAM subarray (and SIMD execution within each DRAM row segment). We evaluate MIMDRAM using twelve real-world applications and 495 multi-programmed application mixes. Our evaluation shows that MIMDRAM provides 34x the performance, 14.3x the energy efficiency, 1.7x the throughp

关键词： DRAM energy-efficiency hardware/software co-design memory-centric computing processing-in-memory

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The MIT Supercloud Workload Classification Challenge 36

The MIT Supercloud Workload Classification Challenge

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36th ieee international parallel and distributed processing symposium (ieee IPDPS)

作者： Tang, Benny J. Chen, Qiqi Weiss, Matthew L. Frey, Nathan C. McDonald, Joseph Bestor, David Yee, Charles Arcand, William Bergeron, William Byun, Chansup Edelman, Daniel Houle, Michael Hubbell, Matthew Jones, Michael Kepner, Jeremy Klein, Anna Michaleas, Adam Michaleas, Peter Milechin, Lauren Mullen, Julia Prout, Andrew Reuther, Albert Rosa, Antonio Bowne, Andrew McEvoy, Lindsey Li, Baolin Tiwari, Devesh Gadepally, Jiay Samsi, Siddharth MIT 77 Massachusetts Ave Cambridge MA 02139 USA MIT Lincoln Lab 244 Wood St Lexington MA 02173 USA Northeastern Univ Boston MA 02115 USA US Air Force Cambridge MA USA

ISBN: (纸本)9781665497473

High-Performance Computing (HPC) centers and cloud providers support an increasingly diverse set of applications on heterogenous hardware. As Artificial Intelligence (AI) and Machine Learning (ML) workloads have become an increasingly larger share of the compute workloads, new approaches to optimized resource usage, allocation, and deployment of new AI frameworks are needed. By identifying compute workloads and their utilization characteristics, HPC systems may be able to better match available resources with the application demand. By leveraging datacenter instrumentation, it may be possible to develop AI-based approaches that can identify workloads and provide feedback to researchers and datacenter operators for improving operational efficiency. To enable this research, we released the MIT Supercloud Dataset, which provides detailed monitoring logs from the MIT Supercloud cluster. This dataset includes CPU and GPU usage by jobs, memory usage, and file system logs. In this paper, we present a workload classification challenge based on this dataset. We introduce a labelled dataset that can be used to develop new approaches to workload classification and present initial results based on existing approaches. The goal of this challenge is to foster algorithmic innovations in the analysis of compute workloads that can achieve higher accuracy than existing methods. Data and code will be made publicly available via the Datacenter Challenge website : https://***.

关键词： Technological innovation distributed processing File systems Instruments High performance computing Graphics processing units Machine learning

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Efficient and Reliable Clustering by parallel Random Swap Algorithm 26

Efficient and Reliable Clustering by Parallel Random Swap Al...

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26th ieee/ACM international symposium on distributed Simulation and Real Time applications (DS-RT)

作者： Nigro, Libero Cicirelli, Franco Franti, Pasi Univ Calabria DIMES Dept Informat Modelling Elect & Syst Sci I-87036 Arcavacata Di Rende Italy Natl Res Council Italy CNR Inst High Performance Comp & Networking ICAR I-87036 Arcavacata Di Rende Italy Univ Eastern Finland Sch Comp Machine Learning Grp POB 111 Joensuu 80101 Finland

ISBN: (数字)9781665497992

ISBN: (纸本)9781665497992

Solving large-scale clustering problems requires an efficient algorithm which can be implemented also in parallel. Kmeans would be suitable but it can lead to an inaccurate clustering result. To overcome this problem, we present a parallel version of random swap clustering algorithm. It combines the scalability of k-means with high clustering accuracy. The new clustering method is experimented on top of Java parallel streams and lambda expressions, which offer interesting execution time benefits. The method is applied to standard benchmark datasets, with a varying population size and distribution of managed records, dimensionality of data points and the number of clusters. The experimental results confirm that high quality clustering can be obtained by parallel random swap together with a high time efficiency.

关键词： Clustering problem K-Means Random swap parallelism Streams Lambda Expressions Java

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Synchronous parallel multisplitting method with convergence acceleration using a local Krylov-based minimization for solving linear systems 36

Synchronous parallel multisplitting method with convergence ...

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36th ieee international parallel and distributed processing symposium (ieee IPDPS)

作者： Tchakorom, Medane A. Couturier, Raphael Charr, Jean-Claude Univ Bourgogne Franche Comte UBFC CNRS FEMTO ST Inst Belfort France

ISBN: (纸本)9781665497473

Computer simulations of physical phenomena, such as heat transfer, often require the solution of linear equations. These linear equations occur in the form Ax = b, where A is a matrix, b is a vector, and x is the vector of unknowns. Iterative methods are the most adapted to solve large linear systems because they can be easily parallelized. This paper presents a variant of the multisplitting iterative method with convergence acceleration using the Krylov-based minimization method. This paper particularly focuses on improving the convergence speed of the method with an implementation based on the PETSc (Portable Extensible Toolkit for Scientific Computation) library. This was achieved by reducing the need for synchronization - data exchange - during the minimization process and adding a preconditioner before the multisplitting method. All experiments were performed either over one or two sites of the Grid5000 platform and up to 128 cores were used. The results for solving a 2D Laplacian problem of size 1024(2) components, show a speed up of up to 23X and 86X when respectively compared to the algorithm in [8] and to the general multisplitting implementation.

关键词： Iterative methods Krylov methods Multisplitting Linear Solvers PETSc MPI

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Efficient distributed Secure Memory with Migratable Merkle Tree 29

Efficient Distributed Secure Memory with Migratable Merkle T...

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29th ieee international symposium on High-Performance Computer Architecture (HPCA)

作者： Feng, Erhu Du, Dong Xia, Yubin Chen, Haibo Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai Peoples R China Shanghai Artificial Intelligence Lab Shanghai Peoples R China

ISBN: (纸本)9781665476522

Hardware-assisted enclaves with memory encryption have been widely adopted in the prevailing architectures, e.g., Intel SGX/TDX, AMD SEV, ARM CCA, etc. However, existing enclave designs fall short in supporting efficient cooperation among cross-node enclaves (i.e., multi-machines) because the range of hardware memory protection is within a single node. A naive approach is to leverage cryptography at the application level and transfer data between nodes through secure channels (e.g., SSL). However, it incurs orders of magnitude costs due to expensive encryption/decryption, especially for distributed applications with large data transfer, e.g., MapReduce and graph computing. A secure and efficient mechanism of distributed secure memory is necessary but still missing. This paper proposes Migratable Merkle Tree (MMT), a design enabling efficient distributed secure memory to support distributed confidential computing. MMT sets up an integrity forest for distributed memory on multiple nodes. It allows an enclave to securely delegate an MMT closure, which contains both data and metadata of a subtree, to a remote enclave. By reusing the memory encryption mechanisms of existing enclaves, our design achieves secure data transfer without software re-encryption. We have implemented a prototype of MMT and a trusted firmware for management, and further applied MMT to real-world distributed applications. The evaluation results show that compared with existing systems using the AES-NI instruction, MMT can achieve up to 13x speedup on data transferring, and gain 12%similar to 58% improvement on the end-to-end performance of MapReduce and PageRank.

关键词： MapReduce

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A Moving Target Defense Approach for the distributed Dynamic Network 21

A Moving Target Defense Approach for the Distributed Dynamic...

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21st ieee international symposium on parallel and distributed processing with applications, 13th ieee international Conference on Big Data and Cloud Computing, 16th ieee international Conference on Social Computing and Networking and 13th international Conference on Sustainable Computing and Communications, ISPA/BDCloud/SocialCom/SustainCom 2023

作者： Zhang, Lin Guo, Yunchuan Leng, Siyuan Li, Zifu Li, Fenghua Fang, Liang Institute of Information Engineering Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences School of Cyber Security Beijing China

ISBN: (纸本)9798350329223

The distributed dynamic network is vulnerable to scanning attacks due to the openness of wireless channels. Traditional defense systems tend to be passive and exhibit delayed responses. A moving target defense approach, namely distributed Network Address Shuffling (DNAS), is proposed to thwart attackers' network scanning through the shuffling of network addresses. To resolve address conflicts resulting from this shuffling, DNAS employs a dynamic diffusion method of allocated addresses before the shuffling process to reduce the probability of conflict generation, and utilizes a passive detection based conflict elimination algorithm after the shuffling process to eliminate any generated conflicts. To select low-risk addresses, DNAS leverages an artificial feature selection based Fully Connected Neural Network (FCNN) to recognize the attacker's scanning policy, and identifies low-risk addresses based on the scanning range of the policy. Empirical experiments and theoretical analysis indicate that DNAS significantly reduces the probability of address conflict generation at a minimal cost. It effectively eliminates all generated address conflicts within an average conflict resolution time of less than 500ms. Furthermore, DNAS exhibits an accuracy of 99.45% in recognizing scanning policies, surpassing pseudorandom address hopping in diminishing the success rate of sequential, local random, and mixed scanning. © 2023 ieee.

关键词： Network security

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AxoNN: An asynchronous, message-driven parallel framework for extreme-scale deep learning 36

AxoNN: An asynchronous, message-driven parallel framework fo...

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36th ieee international parallel and distributed processing symposium (ieee IPDPS)

作者： Singh, Siddharth Bhatele, Abhinav Univ Maryland Dept Comp Sci College Pk MD 20742 USA

ISBN: (纸本)9781665481069

In the last few years, the memory requirements to train state-of-the-art neural networks have far exceeded the DRAM capacities of modern hardware accelerators. This has necessitated the development of efficient algorithms to train these neural networks in parallel on large-scale GPU-based clusters. Since computation is relatively inexpensive on modern GPUs, designing and implementing extremely efficient communication in these parallel training algorithms is critical for extracting the maximum performance. This paper presents AxoNN, a parallel deep learning framework that exploits asynchrony and message-driven execution to schedule neural network operations on each GPU, thereby reducing GPU idle time and maximizing hardware efficiency. By using the CPU memory as a scratch space for offloading data periodically during training, AxoNN is able to reduce GPU memory consumption by four times. This allows us to increase the number of parameters per GPU by four times, thus reducing the amount of communication and increasing performance by over 13%. When tested against large transformer models with 12-100 billion parameters on 48-384 NVIDIA Tesla V100 GPUs, AxoNN achieves a per-GPU throughput of 49.4-54.78% of theoretical peak and reduces the training time by 2237 days (15-25% speedup) as compared to the state-of-the-art.

关键词： parallel deep learning asynchrony message driven scheduling memory optimizations

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High-Speed Serial and Semi-parallel IMPLY-based Approximate Adders through Memristors for In-Memory Computing

High-Speed Serial and Semi-Parallel IMPLY-based Approximate ...

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ieee international symposium on Circuits and Systems (ISCAS)

作者： Kaushik, Nandit Krishna, Hemanth Bodapati, Srinivasu Indian Inst Technol Mandi Sch Comp & Elect Engn SCEE Mandi 175005 Himachal Prades India

ISBN: (纸本)9798350330991;9798350331004

This paper introduces three memristive approximate adder designs using Material Implication (IMPLY) logic. Two designs follow a serial approach, while the third adopts a semiparallel technique. The proposed design achieves the approximate output in just 2 steps, utilizing only 3 memristors, in contrast to the 8 steps and 5 memristors required by the best competing IMPLY-based approximate adder. Furthermore, when integrated into an 8-bit Ripple Carry Adder (RCA), the proposed designs enhance latency by 4% to 28% compared to the existing IMPLYbased approximate design. Compared to exact serial and semiparallel adders in literature, latency is improved by 27% to 56.8%. Similarly, an improvement in the range of 4% to 42% is achieved for energy consumption. The performance of the proposed approximate adder designs is then evaluated in image processing applications, specifically Image Masking and RGB to Grayscale conversion. The results demonstrate better Peak Signal-to-Noise Ratio (PSNR) and Structural Similarity Index Measure (SSIM) values compared to the existing approximate IMPLY design.

关键词： Memristor IMPLY Approximate Adder IMC

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parallel Global Edge Switching for the Uniform Sampling of Simple Graphs with Prescribed Degrees 36

Parallel Global Edge Switching for the Uniform Sampling of S...

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36th ieee international parallel and distributed processing symposium (ieee IPDPS)

作者： Allendorf, Daniel Meyer, Ulrich Penschuck, Manuel Tran, Hung Goethe Univ Frankfurt Germany

ISBN: (纸本)9781665481069

The uniform sampling of simple graphs matching a prescribed degree sequence is an important tool in network science, e.g., to construct graph generators or null-models. Here, the Edge Switching Markov Chain (ES-MC) is a common choice. Given an arbitrary simple graph with the required degree sequence, ES-MC carries out a large number of small changes involving at most four edges to eventually obtain a uniform sample. In practice, reasonably short runs efficiently yield approximate uniform samples. We first engineer a simple sequential ES-MC implementation representing the graph in a hash-set. Despite its simplicity and to the best of our knowledge, our implementation significantly outperforms all openly available solutions. Secondly, we propose the Global Edge Switching Markov Chain (G-ES-MC) and show that it, too, converges to a uniform distribution. We provide empirical evidence that G-ES-MC requires not more switches than ES-MC (and often fewer). Thirdly, we engineer shared-memory parallel algorithms for ES-MC and G-ES-MC;we find that they benefit from the easier dependency structure of the G-ES-MC. In an empirical evaluation, we demonstrate the scalability of our implementations.

关键词： random graphs degrees edge switching markov chain parallelism

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