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检索条件"任意字段=IEEE International Symposium on Parallel and Distributed Processing with Applications"
16627 条 记 录,以下是4591-4600 订阅
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Multi-paradigm and multi-grain parallel execution model based on SMP-cluster
Multi-paradigm and multi-grain parallel execution model base...
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ieee John Vincent Atanasoff international symposium on Modern Computing
作者: Wang, Jue Hu, Changjun Lai, Jianxin Zhao, Yudi Zhang, Suqin Univ Sci & Technol Beijing Informat Engn Sch Beijing 100083 Peoples R China Tsinghua Univ Comp Sci & Technol Dept Beijing 100084 Peoples R China
In this paper, we propose a multi-paradigm and multi-grain parallel execution model based on SMP-Cluster, which integrates coarse grain, mid grain and fine grain parallelism. Multiple paradigms supported by our model ... 详细信息
来源: 评论
Configuration steering for a reconfigurable superscalar processor
Configuration steering for a reconfigurable superscalar proc...
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19th ieee international parallel and distributed processing symposium, IPDPS 2005
作者: Veale, Brian F. Antonio, John K. Tull, Monte P. School of Computer Science University of Oklahoma School of Electrical and Computer Engineering University of Oklahoma
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration of the processor is defined according ... 详细信息
来源: 评论
Use of PARADISE: A meta-tool for visualizing parallel systems  5
Use of PARADISE: A meta-tool for visualizing parallel system...
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5th international parallel processing symposium, IPPS 1991
作者: Kohl, James Arthur Casavant, Thomas L. Parallel Processing Laboratory Department of Electrical and Computer Engineering University of Iowa Iowa CityIA52242 United States
This paper addresses the problem of creating software tools for visualizing the dynamic behavior of parallel applications and systems. PARADISE (parallel Animated Debugging and Simulation Environment) approaches this ... 详细信息
来源: 评论
Fully parallel VLSI implementation of distributed arithmetic
Fully parallel VLSI implementation of distributed arithmetic
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1988 ieee international symposium on Circuits and Systems, Proceedings
作者: Li, Weiping Burr, James B. Peterson, Allen M. Lehigh Univ Bethlehem PA USA
A novel architecture to implement distributed arithmetic in VLSI is presented. This architecture comprises a serial-in random-out multiport memory and a multi-input adder. The design of a 1.25-μm CMOS convolution pro... 详细信息
来源: 评论
Using distributed component model for active service deployment
Using distributed component model for active service deploym...
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7th ieee international symposium on Computers and Communications
作者: Kilany, R Serhrouchni, A Ecole Super Ingenieurs Beyrouth Bayreuth Germany
This paper presents a novel active architecture for building and deploying network services: HABA, Hyper Active Components Architecture. At the architectural level, HABA defines an active node whose functionalities ar... 详细信息
来源: 评论
A formal framework for the performance analysis of P2P networks protocols  20
A formal framework for the performance analysis of P2P netwo...
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20th ieee international parallel and distributed processing symposium, IPDPS 2006
作者: Spognardi, Angelo Di Pietro, Roberto Università di Roma La Sapienza Dipartimento di Informatica Via Salaria 113 00198-Roma Italy
In this paper we propose a formal framework based on the Markov Chains to prove the performance of P2P protocols. Despite the proposal of several protocols for P2P networks, sometimes there is a lack of a formal demon... 详细信息
来源: 评论
An on-line arithmetic-based reconfigurable neuroprocessor  13th
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13th international parallel processing symposium, IPPS 1999 Held in Conjunction with the 10th symposium on parallel and distributed processing, SPDP 1999
作者: Beuchat, Jean-Luc Sanchez, Eduardo Logic Systems Laboratory Swiss Federal Institute of Technology LausanneCH-1015 Switzerland
Artificial neural networks can solve complex problems such as time series prediction, handwritten pattern recognition or speech processing. Though software simulations are essential when one sets about to study a new ... 详细信息
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A generic VHDL template for 2D stencil code applications on FPGAs
A generic VHDL template for 2D stencil code applications on ...
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作者: Schmidt, Michael Reichenbach, Marc Fey, Dietmar Department Computer Science Friedrich-Alexander-University Erlangen-Nuremberg Germany
The efficient realization of self-organizing systems based on 2D stencil code applications, like our developed Marching Pixel algorithms, is a great challenge. They are data-intensive and also computational-intensive,... 详细信息
来源: 评论
Price-based user-optimal job allocation scheme for grid systems  20
Price-based user-optimal job allocation scheme for grid syst...
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20th ieee international parallel and distributed processing symposium, IPDPS 2006
作者: Penmatsa, Satish Chronopoulost, Anthony T. University of Texas at San Antonio Dept. of Computer Science 6900 N Loop 1604 W San Antonio TX 78249 United States IEEE United States
In this paper we propose a price-based user-optimal job allocation scheme for grid systems whose nodes are connected by a communication network. The job allocation problem is formulated as a noncooperative game among ... 详细信息
来源: 评论
A 64-core Platform for Biomedical Signal processing
A 64-core Platform for Biomedical Signal Processing
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14th international symposium on Quality Electronic Design (ISQED)
作者: Bisasky, Jordan Homayoun, Houman Yazdani, Farhang Mohsenin, Tinoosh Univ Maryland Baltimore Cty CSEE Dept Baltimore MD USA
This paper presents a programmable many-core platform containing 64 cores routed in a hierarchical network tor biomedical signal processing applications. Individual core processors are based on a RISC architecture wit... 详细信息
来源: 评论