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CoMeFa: Compute-in-Memory Blocks for FPGAs 30

CoMeFa: Compute-in-Memory Blocks for FPGAs

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ieee 30th international symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Arora, Aman Anand, Tanmay Borda, Aatman Sehgal, Rishabh Hanindhito, Bagus Kulkarni, Jaydeep John, Lizy K. Univ Texas Austin Austin TX 78712 USA

ISBN: (纸本)9781665483322

Block RAMs (BRAMs) are the storage houses of FPGAs, providing extensive on-chip memory bandwidth to the compute units implemented using Logic Blocks (LBs) and Digital Signal processing (DSP) slices. We propose modifying BRAMs to convert them to CoMeFa (Compute-In-Memory Blocks for FPGAs) RAMs. These RAMs provide highly-parallel compute-in-memory by combining computation and storage capabilities in one block. CoMeFa RAMs utilize the true dual port nature of FPGA BRAMs and contain multiple programmable single-bit bit-serial processing elements. CoMeFa RAMs can be used to compute in any precision, which is extremely important for evolving applications like Deep Learning. Adding CoMeFa RAMs to FPGAs significantly increases their compute density. We explore and propose two architectures of these RAMs: CoMeFa-D (optimized for delay) and CoMeFa-A (optimized for area). Compared to existing proposals, CoMeFa RAMs do not require changing the underlying SRAM technology like simultaneously activating multiple rows on the same port, and are practical to implement. CoMeFa RAMs are versatile blocks that find applications in numerous diverse parallel applications like Deep Learning, signal processing, databases, etc. By augmenting an Intel Arria-10-like FPGA with CoMeFa-D (CoMeFa-A) RAMs at the cost of 3.8% (1.2%) area, and with algorithmic improvements and efficient mapping, we observe a geomean speedup of 2.55x (1.85x), across several representative benchmarks. Replacing all or some BRAMs with CoMeFa RAMs in FPGAs can make them better accelerators of modern compute-intensive workloads.

关键词： Deep learning Power demand Random access memory Signal processing algorithms Digital signal processing parallel processing System-on-chip

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Energy Consumption Minimization Control for Augmented Reality applications based on Multi-core Smart Devices

Energy Consumption Minimization Control for Augmented Realit...

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ieee international Conference on Consumer Electronics (ICCE)

作者： Song, Sooeun Kim, Junsung Chung, Jong-Moon Yonsei Univ Sch Elect & Elect Engn Seoul South Korea

ISBN: (纸本)9781538679104

Augmented Reality (AR) applications are becoming more and more popular, and smart devices are the most common platform for running AR applications, such as online games, travel guides, and personal assistants. However, these types of AR applications are usually interactive applications that require fast response time and an extremely high power consumption. AR applications need to be supported by highly adaptable multi core processors equipped smart devices where the optimal low power control technique, should be used. In this paper, the power consumption model of AR application workloads are mathematically modeled, taking into account the dynamic voltage and frequency scaling (DVFS) of the multi-core central processing unit (CPU) and the parallel execution of multi-core CPUs. Based on the proposed model, the optimal core operation frequency and minimized power consumption are derived. Experimental results show that the proposed scheme satisfies the interaction time limit with the lowest energy consumption.

关键词： Energy smartphone augmented reality parallel process

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Performance evaluation of the concurrent execution of NAS parallel benchmarks with BYTE sequential benchmarks on a cluster

Performance evaluation of the concurrent execution of NAS pa...

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11th international Conference on parallel and distributed Systems Workshops, ICPADS 2005

作者： Goscinski, Andrzej M. Wong, Adam K. L. School of Information Technology Deakin University Geelong Vic. 3216 Australia

ISBN: (纸本)0769522815

Computers of a non-dedicated cluster are often idle (users attend meetings, have lunch or coffee breaks) or lightly loaded (users carry out simple computations). These underutilized computers can be employed to execute parallel applications not only during weekends and at nights but also during office hours. Thus, they have to be shared by parallel and sequential applications which could lead to the improvement of their execution performance. However, there is a lack of experimental study showing the behavior and performance of parallel and sequential applications executing concurrently on clusters. We present here the result of an experimental study into load balancing based scheduling of a mixture of parallel and sequential applications on a non-dedicated cluster. © 2005 ieee.

关键词： parallel processing systems

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Modeling of coplanar circuits in a parallel computing environment

Modeling of coplanar circuits in a parallel computing enviro...

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Proceedings of the 1996 ieee MTT-S international Microwave symposium Digest. Part 1 (of 3)

作者： Isele, B. Russer, P. Technische Universitaet Muenchen Muenchen Germany

The time-domain simulation of coplanar waveguide (CPW) elements for picosecond pulse applications is described. CPW discontinuities were simulated using the 3D transmission-line-matrix (TLM) method. We present a cost-effective approach for the time-domain simulation of coplanar circuit structures utilizing distributed computing within a parallel software environment. The use of matched layers and skin effect models is discussed. The application of TLM method and distributed computing to the efficient analysis of coplanar structures is presented.

关键词： Transmission line theory

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MapReduce algorithms for GIS polygonal overlay processing

MapReduce algorithms for GIS polygonal overlay processing

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2013 ieee 37th Annual Computer Software and applications Conference, COMPSAC 2013

作者： Puri, Satish Agarwal, Dinesh He, Xi Prasad, Sushil K. Department of Computer Science Georgia State University Atlanta 30303 United States

ISBN: (纸本)9780769549798

Polygon overlay is one of the complex operations in computational geometry. It is applied in many fields such as Geographic Information Systems (GIS), computer graphics and VLSI CAD. Sequential algorithms for this problem are in abundance in literature but there is a lack of distributed algorithms especially for MapReduce platform. In GIS, spatial data files tend to be large in size (in GBs) and the underlying overlay computation is highly irregular and compute intensive. The MapReduce paradigm is now standard in industry and academia for processing large-scale data. Motivated by the MapReduce programming model, we revisit the distributed polygon overlay problem and its implementation on MapReduce platform. Our algorithms are geared towards maximizing local processing and minimizing the communication overhead inherent with shuffle and sort phases in MapReduce. We have experimented with two data sets and achieved up to 22x speedup with dataset 1 using 64 CPU cores. © 2013 ieee.

关键词： MapReduce

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A parallel-object programming model for petaflops machines and blue gene/cyclops 16

A parallel-object programming model for petaflops machines a...

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16th international parallel and distributed processing symposium, IPDPS 2002

作者： Zheng, Gengbin Kumar, A. Joshua, S. Unger, M. Kalé, L.V. Dept. of Computer Science University of Illinois at Urbana-Champaign 1304 W. Springfield Ave. UrbanaIL61801 United States

ISBN: (纸本)0769515738

One approach for building the next generation of parallel computers is based on large aggregates of multiprocessor chips with support for hardware multithreading. An initial design for IBM's Blue Gene/C project exemplifies this approach. Such a machine might consist of a million processors, and is characterized by a low memory-to-processor ratio. To study alternate programming models for such a machine before it is built, we have developed an emulator that allows million-processor programs to be run on conventional parallel machines with hundreds of processors. Here we present the implementation of a parallel object model based on Charm++ as a candidate programming model. Although the "ideal" programming model for such machines is a matter of continuing research, we believe that parallel objects represent a good starting point. This paper reviews the target architecture, presents the programming model, and describes the emulator implementation. Case studies of simple applications written using the emulator are also discussed. © 2002 ieee.

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Cross-subject Drowsiness Recognition Model Based on the Multi-scale parallel Convolution of EEG Channels 21

Cross-subject Drowsiness Recognition Model Based on the Mult...

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21st ieee international symposium on parallel and distributed processing with applications, 13th ieee international Conference on Big Data and Cloud Computing, 16th ieee international Conference on Social Computing and Networking and 13th international Conference on Sustainable Computing and Communications, ISPA/BDCloud/SocialCom/SustainCom 2023

作者： Li, Songquan Zhu, Rongbo Yuan, Jun Wan, Shaohua Huazhong Agricultural University College of Informatics Wuhan430070 China Huazhong Agricultural University Shenzhen Institute of Nutrition and Health Wuhan430070 China Agricultural Genomics Institute at Shenzhen Chinese Academy of Agricultural Sciences Shenzhen Branch Guangdong Laboratory for Lingnan Modern Agriculture Genome Analysis Laboratory Ministry of Agriculture Shenzhen518000 China University of Electronic Science and Technology of China Shenzhen Institute for Advanced Study Shenzhen518000 China

ISBN: (纸本)9798350329223

Cross-subject electroencephalogram (EEG) drowsiness recognition is currently one of the most efficient methods. However, the traditional cross-subject approaches overlook the correlation between channel sub-features and effectively utilize the potential connection between frequency features and drowsiness, making it difficult to extract shared features from differentiated subjects. This paper proposes a novel deep learning model called CPCNN to address the challenging of cross-subject drowsiness recognition without calibration and improve accuracy. CPCNN obtains delta frequency band features related to drowsiness from sub-features in the channel dimension, effectively combining the advantages of delta frequency bands in EEG with the richness of channel features. To capture the common features of drowsiness, a channel slicing module is proposed, which divides the spatial and channel features extracted by the deep separable convolution module into multiple sub-features along the channel dimension. In addition, to further improve cross-subject recognition performance, a multi-scale parallel group convolution is designed to capture four key frequency sub-feature groups within the delta frequency band. The experimental results show that CPCNN boosts the recognition performance, significantly outperforms all strong baselines. On balanced and unbalanced public datasets, the average accuracy of CPCNN is 81.49% and 78.26%, respectively, surpassing the excellent baseline method by 3.14% and 0.56%. © 2023 ieee.

关键词： Electroencephalography

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Discovery of parallel scheduling algorithms in cellular automata - based systems 15

Discovery of parallel scheduling algorithms in cellular auto...

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15th international parallel and distributed processing symposium, IPDPS 2001

作者： Seredyński, F. Świȩcicka, A. Zomaya, A.Y. Polish -Japanese Institute of Information Technologies Koszykowa 86 Warsaw02-008 Poland Institute of Computer Science Polish Academy of Sciences Ordona 21 Warsaw01-237 Poland Department of Computer Science Bialystok University of Technology Wiejska 45A Bialystok15-351 Poland Parallel Computing Research Laboratory Department of Electrical and Electronic Engineering University of Western Australia Nedlands PerthWA6907 Australia

ISBN: (纸本)0769509908

In this paper we report new results concerning developing parallel multiprocessor scheduling algorithms working in cellular automata (CAs) - based scheduler. We consider the simplest case when a multiprocessor system is limited to two processors, but we not imply any limitations on a size and parameters of parallel programs. We use an approach called a selected neighborhood to design a nonlinear structure of CAs for a given program graph. We propose to use coevolutionary genetic algorithm (GA) to discover rules of parallel CAs, suitable for solving the scheduling problem. We compare sequential and parallel scheduling algorithms discovered in the context of CAs - based scheduling system. © 2001 ieee.

关键词： Cellular automata

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Detecting runtime environment interference with parallel application behavior

Detecting runtime environment interference with parallel app...

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21st international parallel and distributed processing symposium, IPDPS 2007

作者： Knapp, Rashawn L. Karavanic, Karen L. Pase, Douglas M. Portland State University Department of Computer Science P.O. Box 751 Portland OR 97207-0751 IBM System X HPC Portfolio Development Dept. E1WA/205/EE154 3039 Cornwallis Rd. Res. Triangle Park NC 27709-2195

ISBN: (纸本)1424409101

Many performance problems observed in high end systems are actually caused by the runtime system and not the application code. Detecting these cases will require parallel performance tools to incorporate information about the runtime system;however many current tools do not. We present a test suite for evaluating the ability of performance tools to reach a correct diagnosis in cases where a problem is caused by the runtime environment. We include a set of results for one of the tests, which measures application performance as NFS server load is increased. We also present a model for performance diagnosis that combines system and application level information. © 2007 ieee.

关键词： Problem solving

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Scalability of the NewMadeleine Communication Library for Large Numbers of MPI Point-to-Point Requests 19

Scalability of the NewMadeleine Communication Library for La...

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19th Annual ieee/ACM international symposium on Cluster, Cloud, and Grid Computing (CCGRID)

作者： Denis, Alexandre Inria Bordeaux Sud Ouest Talence France

ISBN: (纸本)9781728109121

New kinds of applications with lots of threads or irregular conununication patterns which rely a lot on point-topoint MPI communications have emerged. It stresses the MPI library with potentially a lot of simultaneous MPI requests for sending and receiving at the same lime. To deal with large numbers of simultaneous requests, the bottleneck lies in two main mechanisms: the tag-matching (the algorithm that matches an incoming packet with a posted receive request), and the progression engine. In this paper, we propose algorithms and implementations that overconw, these issues so as to scale up to thousands of requests if needed. In particular our algorithms are able to perform constant-time tag-matching even with any-source and any-tag support. We have implemented these mechanisms in our New-Madeleine communication library. Through micro-benchmarks and computation kernel benchmarks, we demonstrate that our MPI library exhibits better performance than state-of-the-art MPI implementations in cases with many simultaneous requests.

关键词： application program interfaces message passing multi-threading parallel processing software libraries message passing Application programming interfaces Software libraries Multithreading mannose phosphate isomerase remote procedure calls parallel processing (COMPUTERS) Large Numbers Scalability Communication Research Libraries

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