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检索条件"任意字段=IEEE International Workshop on Multi-/Many-core Computing Systems"

共 974 条记录，以下是101-110 订阅

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Proceedings of LLVM-HPC2020 and HiPar 2020 - 6th workshop on the LLVM Compiler Infrastructure in HPC and workshop on Hierarchical Parallelism for Exascale computing, Held in conjunction with SC 2020: The international Conference for High Performance computing, Networking, Storage and Analysis

Proceedings of LLVM-HPC2020 and HiPar 2020 - 6th Workshop on...

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6th workshop on the LLVM Compiler Infrastructure in HPC and workshop on Hierarchical Parallelism for Exascale computing, LLVM-HPC2020 and HiPar 2020

ISBN: (纸本)9780738110424

The proceedings contain 10 papers. The topics discussed include: a case study and characterization of a many-socket, multi-tier NUMA static neural compiler optimization via deep reinforcement learning;extending the LLVM/Clang framework for OpenMP metadirective support;deep learning-based approximate graph-coloring algorithm for register allocation;robust practical binary optimization at run-time using LLVM;really embedding domain-speciﬁc languages into C++;towards automated kernel fusion for the optimization of scientiﬁc applications;and introducing multi-level parallelism, at coarse, ﬁne and instruction level to enhance the performance of iterative solvers for large sparse linear systems on multi- and many-core architecture.

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Performance Optimization and Analysis of the Unstructured Discontinuous Galerkin Solver on multi-core and many-core Architectures

Performance Optimization and Analysis of the Unstructured Di...

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ieee international Conference on High Performance computing and Communications (HPCC)

作者： Zhe Dai Liang Deng Yueqing Wang Fang Wang Ming Li Jian Zhang China Aerodynamics Research and Development Center Computational Aerodynamics Institute Mianyang China State Key Laboratory of Aerodynamics China Aerodynamics Research and Development Center Mianyang China

The discontinuous Galerkin (DG) algorithm is a representative high order method in Computational Fluid Dynamics (CFD) area which possesses considerable mathematical advantages such as high resolution, low dissipation, and dispersion. However, DG is rather computationally intensive to demonstrate practical engineering problems. This paper discusses the implementation of our in-house practical DG application in three different programming models, as well as some optimization techniques, including grid renumbering and mixed precision to maximize the performance improvements in a single node system. The experiment on CPU and GPU shows that our CUDA, OpenACC, and OpenMP-based code obtains a maximum speedup of 42.9x, 35.3x, and 8.1x compared with serial execution by the original application, respectively. Besides, we systematically compare the programming models in two aspects: performance and productivity. Our empirical conclusions facilitate the programmers to select the right platform with a suitable programming model according to their target applications.

关键词： Productivity Computational fluid dynamics Heuristic algorithms Graphics processing units Computer architecture Programming Mathematical models

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Extending heterogeneous applications to remote co-processors with rOpenCL 32

Extending heterogeneous applications to remote co-processors...

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32nd ieee international Symposium on Computer Architecture and High-Performance computing (SBAC-PAD) / 11th workshop on Applications for multi-core Architectures (WAMCA)

作者： Alves, Rui Rufino, Jose Inst Politecn Braganca Campus Santa Apolonia P-5300253 Braganca Portugal Inst Politecn Braganca Res Ctr Digitalizat & Intelligent Robot CeDRI Campus Santa Apolonia P-5300253 Braganca Portugal

ISBN: (纸本)9781728199245

In heterogeneous computing systems, general purpose CPUs are coupled with co-processors of different architectures, like GPUs and FPGAs. Applications may take advantage of this heterogeneous device ensemble to accelerate execution. However, developing heterogeneous applications requires specific programming models, under which applications unfold into code components targeting different computing devices. OpenCL is one of the main programming models for heterogeneous applications, set apart from others due to its openness, vendor independence and support for different co-processors. In the original OpenCL application model, a heterogeneous application starts in a certain host node, and then resorts to the local co-processors attached to that host. Therefore, co-processors at other nodes, networked with the host node, are inaccessible and cannot be used to accelerate the application. rOpenCL (remote OpenCL) overcomes this limitation for a significant set of the OpenCL 1.2 API, offering OpenCL applications transparent access to remote devices through a TPC/IP based network. This paper presents the architecture and the most relevant implementation details of rOpenCL, together with the results of a preliminary set of reference benchmarks. These prove the stability of the current prototype and show that, in many scenarios, the network overhead is smaller than expected.

关键词： OpenCL heterogeneous computing API forwarding remote execution parallel and distributed computing

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Empirical Analysis of the I/O Characteristics of a Highly Integrated many-core Processor 1

Empirical Analysis of the I/O Characteristics of a Highly In...

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1st ieee international Conference on Autonomic computing and Self-Organizing systems (ACSOS)

作者： Lee, Cheongjun Lee, Jaehwan Koo, Donghun Kim, Chungyong Bang, Jiwoo Byun, Eun-Kyu Eom, Hyeonsang Korea Aerosp Univ Dept Elect & Informat Engn Goyang Si South Korea Seoul Natl Univ Dept Comp Sci & Engn Seoul South Korea Korea Inst Sci & Technol Informat Div Natl Supercomp Daejeon South Korea

ISBN: (纸本)9781728184142

Optimized for parallel operations, Intel's second-generation Xeon Phi processor, code-named Knights Landing (KNL), is actively utilized in high performance computing systems based on its highly integrated cores and high-bandwidth on-package memory, multi-Channel DRAM (MCDRAM). Recently, the emergence of data-intensive applications and the utilization of many-core processors have further increased the I/O performance requirements of high performance computing systems. Therefore, it is necessary to understand and analyze the I/O characteristics of many integrated core systems. In this paper, we experimentally analyze the I/O characteristics of KNL, focusing on single-thread, buffered-write operations. We determine that KNL has a bottleneck in its buffered write operation that utilizes page cache. To find this bottleneck point and identify its cause, we conduct the experiments in two different ways. First, we measure the execution time of the kernel functions through the kernel I/O path. Second, we measure the occurrence count of system events such as cache-misses and branch-misses. With results from the experiments, we discuss the characteristics on KNL's I/O performance involving the performance bottlenecks.

关键词： Intel Knights Landing I/O performance buffered write page cache branch-miss memory control group

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Optimizing Green Energy Consumption of Fog computing Architectures 32

Optimizing Green Energy Consumption of Fog Computing Archite...

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32nd ieee international Symposium on Computer Architecture and High-Performance computing (SBAC-PAD) / 11th workshop on Applications for multi-core Architectures (WAMCA)

作者： Gougeon, Adrien Camus, Benjamin Orgerie, Anne-Cecile Univ Rennes INRIA CNRS IRISAENS Rennes Rennes France

ISBN: (纸本)9781728199245

The Cloud already represents an important part of the global energy consumption, and this consumption keeps increasing. many solutions have been investigated to increase its energy efficiency and to reduce its environmental impact. However, with the introduction of new requirements, notably in terms of latency, an architecture complementary to the Cloud is emerging: the Fog. The Fog computing paradigm represents a distributed architecture closer to the end-user. Its necessity and feasibility keep being demonstrated in recent works. However, its impact on energy consumption is often neglected and the integration of renewable energy has not been considered yet. The goal of this work is to exhibit an energy-efficient Fog architecture considering the integration of renewable energy. We explore three resource allocation algorithms and three consolidation policies. Our simulation results, based on real traces, show that the intrinsic low computing capability of the nodes in a Fog context makes it harder to exploit renewable energy. In addition, the share of the consumption from the communication network between the computing resources increases in this context, and the communication devices are even harder to power through renewable sources.

关键词： Fog computing Job scheduling Renewable energy

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A Pipelined multi-Level Fault Injector for Deep Neural Networks 33

A Pipelined Multi-Level Fault Injector for Deep Neural Netwo...

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33rd ieee international Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology systems (DFT)

作者： Ruospo, Annachiara Balaara, Angelo Bosio, Alberto Sanchez, Ernesto Politecn Torino Dipartimento Automat & Informat Turin Italy Ecole Cent Lyon INL Lyon France

ISBN: (纸本)9781728194578

Applications leveraging on new computing paradigms, such as brain-inspired computing, are currently being exploited in many fields thanks to their outstanding performance in solving complex tasks. Among them, Deep Neural Networks (DNNs) are gaining growing interest in different research areas spanning from playing complex games to safety-critical applications such as automotive. In the latter case, reliability assumes a dominant role and efficient reliability assessment approaches are thus required. Several works evaluate the DNN reliability by running fault injection campaigns. However, due to the excessive time required to run a single DNN execution (i.e., inference) at Hardware Description Level (HDL), the injections are typically performed at software level. This is clearly important to provide an overall estimation of the DNN behavior in faulty scenarios, however, it might be not accurate enough if the reliability of the target HW architecture must be determined. In that case, you need to run the fault injections directly at a hardware description level. The intent of the paper is to present a pipelined multi-layer fault injector for Deep Neural Networks that is able to drastically reduce the fault simulation time at HDL. Mimicking the behavior of the pipeline of a processor core, it allows to drastically reduce the complete fault injection time to be run at hardware level, thereby reducing the required time by about 60%.

关键词： Deep neural networks

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An Optimal Model for Optimizing the Placement and Parallelism of Data Stream Processing Applications on Cloud-Edge computing 32

An Optimal Model for Optimizing the Placement and Parallelis...

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32nd ieee international Symposium on Computer Architecture and High-Performance computing (SBAC-PAD) / 11th workshop on Applications for multi-core Architectures (WAMCA)

作者： de Souza, Felipe Rodrigo de Assuncao, Marcos Dias Caron, Eddy Veith, Alexandre da Silva Univ Lyon EnsL INRIA UCBLCNRSLIP Lyon 07 France Univ Toronto Toronto ON Canada

ISBN: (纸本)9781728199245

The Internet of Things has enabled many application scenarios where a large number of connected devices generate unbounded streams of data, often processed by data stream processing frameworks deployed in the cloud. Edge computing enables offloading processing from the cloud and placing it close to where the data is generated, thereby reducing the time to process data events and deployment costs. However, edge resources are more computationally constrained than their cloud counterparts, raising two interrelated issues, namely deciding on the parallelism of processing tasks (a.k.a. operators) and their mapping onto available resources. In this work, we formulate the scenario of operator placement and parallelism as an optimal mixed-integer linear programming problem. The proposed model is termed as Cloud-Edge data Stream Placement (CESP). Experimental results using discrete-event simulation demonstrate that CESP can achieve an end-to-end latency at least similar or equal to 80% and monetary costs at least similar or equal to 30% better than traditional cloud deployment.

关键词： Data Stream Processing Operator Placement Operator Parallelism End-to-end Latency Edge computing

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An Efficient Scheduling Algorithm for Interdependent Tasks in Heterogeneous multi-core systems

An Efficient Scheduling Algorithm for Interdependent Tasks i...

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ieee international Conference on systems, Man and Cybernetics

作者： Zhichao Fan Wei Hu Hong Guo Jing Liu Yu Gan College of Computer Science and Technology Wuhan University of Science and Technology Wuhan China

ISBN: (纸本)9781665442084

Due to the increasing demand for computing power in many industries, heterogeneous multi-core processors are needed to solve the problem. In order to make full use of multi-core computing resources, an effective scheduling strategy for heterogeneous multi-core processor tasks is required. Directed acyclic graph (DAG) is usually used to represent data dependencies between tasks. Each task needs to be executed in the order of its data dependencies. Research under this model has made great progress. In this article, we study and improve the DAG-based task model, taking into account the fact that not only one-way data transmission is possible between tasks, but also two-way data exchange. Based on this model, we propose two scheduling strategies, overall cutting scheduling (OCS) and greedy selection scheduling (GSS). As far as we know, there is currently no work considering the existence of a special task model of two-way transmission between tasks, nor has it considered task scheduling in two-way transmission. In order to evaluate and demonstrate its feasibility and practicability, we proposed a reference method and supplemented with large-scale system experiments. These experiments show that the scheduling efficiency of the proposed method is greatly improved.

关键词： Industries Job shop scheduling Systematics multicore processing Scheduling algorithms Propagation losses Data models

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Towards pervasive containerization of HPC job schedulers 32

Towards pervasive containerization of HPC job schedulers

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32nd ieee international Symposium on Computer Architecture and High-Performance computing (SBAC-PAD) / 11th workshop on Applications for multi-core Architectures (WAMCA)

作者： Cerin, Christophe Greneche, Nicolas Menouer, Tarek Univ Sorbonne Paris Nord LIPN UMR CNRS 7030 Villetaneuse France Umanis Res & Innovat Levallois Perret France

ISBN: (纸本)9781728199245

In cloud computing, elasticity is defined as "the degree to which a system is able to adapt to workload changes by provisioning and de-provisioning resources in an autonomic manner, such that at each point in time the available resources match the current demand as closely as possible". Adding elasticity to HPC (High Performance computing) clusters management systems remains challenging even if we deploy such HPC systems in today's cloud environments. This difficulty is caused by the fact that HPC jobs scheduler needs to rely on a fixed set of resources. Every change of topology (adding or removing computing resources) leads to a global restart of the HPC jobs scheduler. This phenomenon is not a major drawback because it provides a very effective way of sharing a fixed set of resources but we think that it could be complemented by a more elastic approach. Moreover, the elasticity issue should not be reduced to the scaling of resources issues. Clouds also enable access to various technologies that enhance the services offer to users. In this paper, our approach is to use containers technology to instantiate a tailored HPC environment based on the user's reservation constraints. We claim that the introduction and use of containers in HPC job schedulers allow better management of resources, in a more economical way. From the use case of SLURM, we release a methodology for 'containerization' of HPC jobs schedulers which is pervasive i.e. spreading widely throughout any layers of job schedulers. We also provide initial experiments demonstrating that our containerized SLURM system is operational and promising.

关键词： HPC and cloud computing Containers Security Operating system / middleware layers

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Heuristic contention-free scheduling algorithm for multi-core processor using LET model 20

Heuristic contention-free scheduling algorithm for multi-cor...

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Proceedings of the ieee/ACM 24th international Symposium on Distributed Simulation and Real Time Applications

作者： Shingo Igarashi Tasuku Ishigooka Tatsuya Horiguchi Ryotaro Koike Takuya Azumi Saitama University Hitachi Ltd.

Embedded systems, e.g., self-driving systems and advanced driver-assistance systems (ADAS), require computing platforms with high computing power and low power consumption. multi-/many-core platforms satisfy these requirements effectively. However, for hard real-time applications, multiple demands on shared resources can impede real-time performance, and memory is one resource that can impair the desired performance significantly. Therefore, it is important that memory access timing be deterministic to facilitate predictability. To realize this, the Logical Execution Time (LET) paradigm is currently attracting attention. This paper proposes a theoretical scheduling method for a model applying the LET paradigm to directed acyclic graph (DAG) nodes for a multi-/many-core platform. The proposed method considers communication timing between nodes and generates a schedule that does not cause communication contentions. In addition, the proposed method attempts to distribute tasks and reduce LET intervals to address increased execution times due to the implementation of the LET paradigm. In the evaluation, we observed that the proposed method improved the schedule length by up to 40%.

关键词： communication contention multi-/many-core multi-rate DAG list-scheduling logical execution time

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