检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

952 篇 会议
20 篇 期刊文献
2 册 图书

馆藏范围

974 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

653 篇 工学
- 595 篇 计算机科学与技术...
- 238 篇 软件工程
- 190 篇 电气工程
- 76 篇 电子科学与技术（可...
- 61 篇 信息与通信工程
- 31 篇 控制科学与工程
- 23 篇 动力工程及工程热...
- 11 篇 机械工程
- 11 篇 仪器科学与技术
- 8 篇 生物医学工程（可授...
- 7 篇 力学（可授工学、理...
- 7 篇 环境科学与工程（可...
- 6 篇 安全科学与工程
- 5 篇 材料科学与工程（可...
- 5 篇 建筑学
- 5 篇 交通运输工程
- 5 篇 生物工程
- 5 篇 网络空间安全
91 篇 理学
- 53 篇 数学
- 27 篇 系统科学
- 18 篇 物理学
- 8 篇 生物学
- 6 篇 统计学（可授理学、...
- 5 篇 化学
88 篇 管理学
- 76 篇 管理科学与工程(可...
- 31 篇 工商管理
- 14 篇 图书情报与档案管...
10 篇 经济学
- 10 篇 应用经济学
8 篇 法学
- 7 篇 社会学
6 篇 医学
4 篇 教育学
- 4 篇 教育学
3 篇 文学
2 篇 农学
2 篇 军事学

主题

75 篇 computer archite...
62 篇 hardware
60 篇 parallel process...
55 篇 multicore proces...
48 篇 computational mo...
37 篇 concurrent compu...
36 篇 high performance...
34 篇 instruction sets
34 篇 multi-core
33 篇 graphics process...
31 篇 scalability
31 篇 cloud computing
30 篇 parallel program...
29 篇 programming
29 篇 program processo...
29 篇 graphics process...
27 篇 kernel
25 篇 embedded systems
24 篇 conferences
24 篇 resource managem...

机构

9 篇 ohio state univ ...
5 篇 saitama univ gra...
4 篇 ohio state univ ...
3 篇 saitama universi...
3 篇 vienna universit...
3 篇 oak ridge natl l...
3 篇 graduate school ...
3 篇 fraunhofer igd t...
3 篇 center for compu...
3 篇 karlsruhe instit...
3 篇 oak ridge natl l...
3 篇 beihang univ sch...
2 篇 penn state univ ...
2 篇 uppsala univ upp...
2 篇 seoul natl univ ...
2 篇 coll william & m...
2 篇 china university...
2 篇 waseda univ dept...
2 篇 tsinghua univers...
2 篇 national univers...

作者

6 篇 takuya azumi
6 篇 panda d. k.
6 篇 azumi takuya
5 篇 subramoni hari
5 篇 shingo igarashi
5 篇 benini luca
4 篇 tatsuya horiguch...
4 篇 tasuku ishigooka
4 篇 petiton serge
4 篇 el-ghazawi tarek
4 篇 sato mitsuhisa
4 篇 amano hideharu
3 篇 liu bo
3 篇 klasky scott
3 篇 dongarra jack
3 篇 varbanescu ana l...
3 篇 qian depei
3 篇 sriram krishnamo...
3 篇 weichslgartner a...
3 篇 alam sadaf r.

语言

969 篇 英文
4 篇 其他
1 篇 中文

检索条件"任意字段=IEEE International Workshop on Multi-/Many-core Computing Systems"

共 974 条记录，以下是111-120 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

TASO: Time and Space Optimization for Memory-Constrained DNN Inference 32

TASO: Time and Space Optimization for Memory-Constrained DNN...

引用

32nd ieee international Symposium on Computer Architecture and High-Performance computing (SBAC-PAD) / 11th workshop on Applications for multi-core Architectures (WAMCA)

作者： Wen, Yuan Anderson, Andrew Radu, Valentin O'Boyle, Michael F. P. Gregg, David Trinity Coll Dublin Dublin Ireland Univ Edinburgh Edinburgh Midlothian Scotland

ISBN: (纸本)9781728199245

Convolutional neural networks (CNNs) are used in many embedded applications, from industrial robotics and automation systems to biometric identification on mobile devices. State-of-the-art classification is typically achieved by large networks, which are prohibitively expensive to run on mobile and embedded devices with tightly constrained memory and energy budgets. We propose an approach for ahead-of-time domain-specific optimization of CNN models, based on an integer linear programming (ILP) for selecting primitive operations to implement convolutional layers. We optimize the trade-off between execution time and memory consumption by: 1) attempting to minimize execution time across the whole network by selecting data layouts and primitive operations to implement each layer;and 2) allocating an appropriate workspace that reflects the upper bound of memory footprint per layer. These two optimization strategies can be used to run any CNN on any platform with a C compiler. Our evaluation with a range of popular ImageNet neural architectures (GoogleNet, AlexNet, VGG, ResNet and SqueezeNet) on the ARM Cortex-A15 yields speedups of 8x compared to a greedy algorithm based primitive selection, reduces memory requirement by 2.2x while sacrificing only 15% of inference time compared to a solver that considers inference time only. In addition, our optimization approach exposes a range of optimal points for different configurations across the Pareto frontier of memory and latency trade-off, which can be used under arbitrary system constraints.

关键词： neural network optimization computing operators primitive selection optimal convolutional layer memory-time trade-off

来源：评论

学校读者我要写书评

暂无评论

Numerical multi-loop integration on heterogeneous many-core processors 19

Numerical multi-loop integration on heterogeneous many-core ...

引用

19th international workshop on Advanced computing and Analysis Techniques in Physics Research (ACAT)

作者： de Doncker, E. Yuasa, F. Almulihi, A. Nakasato, N. Daisaka, H. Ishikawa, T. Western Michigan Univ Dept Comp Sci Kalamazoo MI 49008 USA High Energy Accelerator Res Org KEK Oho 1-1 Tsukuba Ibaraki 3050801 Japan Univ Aizu Aizu Wakamatsu Fukushima 9658580 Japan Hitotsubashi Univ 2-1 Naka Kunitachi Tokyo 1860801 Japan

We report on multi-loop integral computations executed on a PEZY/Exascaler large-scale (immersion cooling) computing system. The programming model requires a host program written in C++ with a PZCL (OpenCL-like) kernel. However the kernel can be generated by the Goose compiler interface, which allows parallelizing program loops according to compiler directives. As an advantage, the executable derived from a program instrumented with Goose pragmas can be run on multiple devices and multiple nodes without changes to the program. We use lattice rules and lattice copy (composite) rules on PEZY to approximate integrals for multi-loop self-energy diagrams with and without masses. GPU results are also given and the performnce on the different architectures is compared.

关键词： C++ (programming language)

来源：评论

学校读者我要写书评

暂无评论

multi-Level Edge computing System Architecture For V2X Technology 12

Multi-Level Edge Computing System Architecture For V2X Techn...

引用

12th international Congress on Ultra Modern Telecommunications and Control systems and workshops (ICUMT)

作者： Al-Bahri, Mahmood Muthanna, Ammar Dharamshi, Ravindra R. Al-shukail, Naeem Sazonov, Dmitriy Al-Wardi, Salim Univ Nizwa Dept Math & Phys Sci Nizwa Oman State Univ Telecommun Dept Commun & Data Networks St Petersburg Russia Univ Nizwa Dept Informat Syst Nizwa Oman

ISBN: (纸本)9781728192819

There are many issues when deploying self-driving car applications, such as unbalanced traffic flow in the network topology and inefficient network utilization, Therefore, open and flexible automotive architectures are key requirements to enable experimenters to test their solutions in a productive environment. Also improve the management of network resources, applications and users. In this work, simulation models for the automotive network based on MEC and SDN technologies were developed, on the basis of which their positive impact on the automotive network was investigated and proved. The architecture of the automobile network was developed and its functional components were described in detail. In the results, simulation models were developed: the first experiment demonstrated a model showing the positive effect of Edge and Fog computing on the load of the network core;a second experiment demonstrated the positive effect of SDN in load balancing between BS and RSU roadside units.

关键词： 5G Edge computing IoT SDN V2V&V2I

来源：评论

学校读者我要写书评

暂无评论

Predicting the Energy consumption of CUDA kernels using SimGrid 32

Predicting the Energy consumption of CUDA kernels using SimG...

引用

32nd ieee international Symposium on Computer Architecture and High-Performance computing (SBAC-PAD) / 11th workshop on Applications for multi-core Architectures (WAMCA)

作者： Boughzala, Dorra Lefevre, Laurent Orgerie, Anne-Cecile Univ Lyon EnsL UCBL INRIACNRSLIP Lyon France Univ Rennes INRIA CNRS IRISA Rennes France

ISBN: (纸本)9781728199245

Building a sustainable Exascale machine is a very promising target in High Performance computing (HPC). To tackle the energy consumption challenge while continuing to provide tremendous performance, the HPC community have rapidly adopted GPU-based systems. Today, GPUs have became the most prevailing components in the massively parallel HPC landscape thanks to their high computational power and energy efficiency. Modeling the energy consumption of applications running on GPUs has gained a lot of attention for the last years. Alas, the HPC community lacks simple yet accurate simulators to predict the energy consumption of general purpose GPU applications. In this work, we address the prediction of the energy consumption of CUDA kernels via simulation. We propose in this paper a simple and lightweight energy model that we implemented using the open-source framework SimGrid. Our proposed model is validated across a diverse set of CUDA kernels and on two different NVIDIA GPUs (Tesla M2075 and Kepler K20Xm). As our modeling approach is not based on performance counters or detailed-architecture parameters, we believe that our model can be easily approved by users who take care of the energy consumption of their GPGPU applications.

关键词： GPGPU computing CUDA kernels Energy modeling Simulation

来源：评论

学校读者我要写书评

暂无评论

Proceedings of the 11th workshop on Parallel Programming and Run-Time Management Techniques for many-core Architectures / 9th workshop on Design Tools and Architectures for multicore Embedded computing Platforms, PARMA-DITAM 2020

Proceedings of the 11th Workshop on Parallel Programming and...

引用

8th international Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, HEART 2017

ISBN: (纸本)9781450375450

The proceedings contain 5 papers. The topics discussed include: sparse matrix-dense matrix multiplication on heterogeneous CPU+FPGA embedded system;run-time power modeling in embedded GPUs with dynamic voltage and frequency scaling;fault-tolerant online scheduling algorithms for CubeSats;an OpenMP parallel genetic algorithm for design space exploration of heterogeneous multi-processor embedded systems;and automated precision tuning in activity classification systems: a case study.

关键词：

来源：评论

学校读者我要写书评

暂无评论

HPC@SCALE: A Hands-on Approach for Training Next-Gen HPC Software Architects

HPC@SCALE: A Hands-on Approach for Training Next-Gen HPC Sof...

引用

ieee international Conference on High Performance computing workshops (HiPCW)

作者： Tanzima Z. Islam Chase Phelps Computer Science Texas State University

ISBN: (纸本)9781665410380

High Performance computing (HPC) systems enable multi-scale simulations to gain meaningful insights into otherwise experimentally intractable phenomena such as climate change and destabilizing drug-protein interactions to cure cancer. High levels of parallelism and heterogeneous architectures in these systems offer unprecedented computational capability at the cost of complexity and dynamism. Recent efforts in workforce development have focused on preparing students with the background to write a program for these complex heterogeneous platforms successfully [1]. However, computing is only one of the three tasks an HPC application performs; the other two are communication and I/O. Since network bandwidth is not scaling proportionately with computational capabilities, moving the large volume of data generated by these applications through the network slows down scientific progress. A high-level datadriven analysis shows that most existing curricula do not prepare students to consider design choices to scale parallel I/O, which is a crucial building component of an end-to-end system. At its core, the problem of scaling data-intensive applications is common in both high-performance, high-throughput, and Cloud computing environments, so any training in that regard will have a broad impact. To fill this gap, we have designed a new course called HPC@SCALE to train students at Texas State University in building scalable end-to-end system software focusing on minimizing parallel I/O.

关键词： Training Costs File systems High performance computing Conferences Buildings Focusing

来源：评论

学校读者我要写书评

暂无评论

Optically Connected Memory for Disaggregated Data Centers 32

Optically Connected Memory for Disaggregated Data Centers

引用

32nd ieee international Symposium on Computer Architecture and High-Performance computing (SBAC-PAD) / 11th workshop on Applications for multi-core Architectures (WAMCA)

作者： Gonzalez, Jorge Gazman, Alexander Hattink, Maarten Palma, Mauricio G. Bahadori, Meisam Rubio-Noriega, Ruth Orosa, Lois Glick, Madeleine Mutlu, Onur Bergman, Keren Azevedo, Rodolfo Univ Estadual Campinas Campinas Brazil Columbia Univ New York NY 10027 USA Nokia Espoo Finland INICTEL UNI Lima Peru Swiss Fed Inst Technol Zurich Switzerland

ISBN: (纸本)9781728199245

Recent advances in integrated photonics enable the implementation of reconfigurable, high-bandwidth, and low energy-per-bit interconnects in next-generation data centers. We propose and evaluate an Optically Connected Memory (OCM) architecture that disaggregates the main memory from the computation nodes in data centers. OCM is based on micro-ring resonators (MRRs), and it does not require any modification to the DRAM memory modules. We calculate energy consumption from real photonic devices and integrate them into a system simulator to evaluate performance. Our results show that (1) OCM is capable of interconnecting four DDR4 memory channels to a computing node using two fibers with 1.07 pJ energyper-bit consumption and (2) OCM performs up to 5.5x faster than a disaggregated memory with 40G PCIe NIC connectors to computing nodes.

关键词： disaggregated computing disaggregated memory photonics data-centers DRAM memory systems

来源：评论

学校读者我要写书评

暂无评论

3rd workshop on Education for High Performance computing (EduHiPC - 2021)

3rd Workshop on Education for High Performance Computing (Ed...

引用

ieee international Conference on High Performance computing workshops (HiPCW)

作者： Sheikh Ghafoor Sushil K. Prasad

ISBN: (纸本)9781665410380

High Performance computing (HPC) and, in general, Parallel and Distributed computing (PDC) is ubiquitous. Every computing device, from a smartphone to a supercomputer, relies on parallel processing. Compute clusters of multicore and manycore processors (CPUs and GPUs) are routinely used in many subdomains of computer science, such as data science, parallel machine learning and high performance computing. Therefore, it is important for every computing professional (and especially every programmer) to understand how parallelism and distributed computing affect problem solving. It is essential for educators to impart a range of PDC and HPC skills and knowledge at multiple levels within the curriculum of Computer Science (CS), Computer Engineering (CE), and related disciplines such as computational data science. Software industry and research laboratories require people with these skills, more so now. Therefore, they now engage in extensive on-the-job training. Additionally, rapid changes in hardware platforms, languages, and programming environments increasingly challenge educators to decide what to teach and how to teach it, in order to prepare students for careers that are increasingly likely to involve PDC and HPC. EduHiPC aims to provide a forum that brings together academia, industry, government, and non-profit organizations - especially from India, its vicinity, and Asia - for exploring and exchanging experiences and ideas about the inclusion of high-performance, parallel, and distributed computing into undergraduate and graduate curriculum of Computer Science, Computer Engineering, Computational Science, Computational Engineering, and computational courses for STEM and business and other non-STEM disciplines.

关键词： High Performance computing Distributed computing PDC gene computer science Curriculum Nonprofit Organizations Education educators supercomputer Smartphone COMPUTER ENGINEERING Laboratory Research multi-core processors HIGH-PERFORMANCE career

来源：评论

学校读者我要写书评

暂无评论

PSU: A Framework for Dynamic Software Updates in multi-threaded C-Language Programs 32

PSU: A Framework for Dynamic Software Updates in Multi-threa...

引用

32nd ieee international Symposium on Computer Architecture and High-Performance computing (SBAC-PAD) / 11th workshop on Applications for multi-core Architectures (WAMCA)

作者： Karpoff, Marcus Amaral, Jose Nelson Wang, Kai-Ting Amy Ho, Rayson Dobry, Brice Amazon Vancouver BC Canada Univ Alberta Edmonton AB Canada Huawei Canada Res Ctr Markham ON Canada Futurewei Technol Baltimore MD USA

ISBN: (纸本)9781728199245

A Dynamic Software Update (DSU) system enables an operator to modify a running program without interrupting its execution. However, creating a DSU system to allow programs written in the C programming language to be modified while they are executing is challenging. This paper presents the Portable Software Update (PSU) system, a new framework that allows the creation of C-language DSU programs. PSU offers a simple programming interface to build DSU versions of existing C programs. Once a program is built using PSU, updates can be applied by background threads that have negligible impact on the execution of the program. PSU supports multi-threaded and recursive programs without the use of safe points or thread blocking. PSU uses function indirection to redirect DSU functions calls to the newest version of the function code. Once a DSU function is invoked in a PSU program, it executes to completion using the version of the function that was active when it was invoked. However, if a new version is installed, any future calls to the same function always execute the newest version. This simple mechanism allows for quick loading of updates in PSU. PSU unloads obsolete version of DSU functions after they are no longer executing. This mechanism makes PSU the first DSU system for C-language programs that is able to unload older versions of code. This efficient use of resources enables many patches to be applied to a long-running application. A suite of specialized custom synthetic programs, and a DSUenabled version of the MySQL database storage engine, are used to evaluate the overhead of the DSU-enabling features. The MySQL storage engine maintains over 95% of the performance of the non-DSU version and allows the entire storage engine to be updated while the database continues executing. PSU includes a simple and straightforward process for the modification of the storage engine that enables DSU.

关键词： Dynamic Software Update (DSU) multi-threading Update safety Update timeliness

来源：评论

学校读者我要写书评

暂无评论

Parallel Implementation of CNN on multi-FPGA Cluster

Parallel Implementation of CNN on Multi-FPGA Cluster

引用

ieee international Symposium on Embedded multicore Socs (MCSoC)

作者： Yasuyu Fukushima Kensuke Iizuka Hideharu Amano Keio University Yokohama Japan

ISBN: (纸本)9781728187525

We developed a PYNQ cluster called M-KUBOS that consists of economical Zynq boards that are interconnected through low-cost high-performance GTH serial links. For the software environment, we employed the PYNQ open-source software platform. The PYNQ cluster is anticipated to be a multi-access edge computing (MEC) server for 5G mobile networks. We implemented the ResNet-50 inference accelerator on the PYNQ cluster for image recognition of MEC applications. By estimating the execution time of each ResNet-50 layer, layers of ResNet-50 were divided into four boards so that the execution time of each board would be as equal as possible for efficient pipeline processing. Owing to the PYNQ cluster in which FPGAs were directly connected by high-speed serial links, stream processing without network bottlenecks and pipeline processing between boards were readily realized. The implementation achieved 292 GOPS performance, 75.1 FPS throughput, and 5.15 GOPS/W power efficiency. It achieved 17 times faster speed and 86 times more power efficiency compared to the implementation on the CPU, and 3.8 times more power efficiency compared to the implementation on the GPU.

关键词： Image recognition Quantization (signal) multi-access edge computing multicore processing Graphics processing units Throughput Servers

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共98页 << < 8 9 10 11 12 13 14 15 16 17 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：