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Ray-tracing domain decomposition methods for real-time simulation on multi-core and multi-processor systems

CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE 2016年第16期28卷 4352-4364页

作者： Magoules, Frederic Gbikpi-Benissan, Guillaume Callet, Patrick Technol Res Inst SystemX 8 Ave Vauve F-91120 Palaiseau France CentraleSupelec F-92295 Chatenay Malabry France

This paper describes the use of domain decomposition methods for accelerating wave physics simulation. Numerical wave-based methods provide more accurate simulation than geometrical methods, but at a higher computation cost as well. In the context of virtual reality, the quality of the results is estimated according to human perception, what makes geometrical methods an interesting approach for achieving real-time physically-based rendering. Here, we investigate a geometrical method based on both beams and rays tracing, which we enhance by two levels of parallel processing. Techniques from domain decomposition methods are coupled with classical parallel computing on both shared and distributed memory. Both optic and acoustic renderings are experimented to evaluate the acceleration impact of the domain decomposition scheme. Speedup measurements clearly show the efficiency of using domain decomposition methods for real-time simulation of wave physics. Copyright (C) 2015 John Wiley & Sons, Ltd.

关键词： ray-tracing beam-tracing parallel computing domain decomposition method wave propagation acoustic optic

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Dithering-based Power and Thermal Management on FPGA-based multi-core Embedded systems 13

Dithering-based Power and Thermal Management on FPGA-based M...

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13th international Conference on Embedded and Ubiquitous computing (EUC 2015)

作者： Christoforakis, Ioannis Tomoutzoglou, Othon Bakoyiannis, Dimitrios Kornaros, George Technol Educ Inst Crete Dept Informat Engn Iraklion Crete Greece

ISBN: (纸本)9781467382991

In this paper, we describe the design of a heterogeneous island-based network-on-chip to achieve a power- and thermal-aware coherent system. To this end we utilize different management techniques which employ dynamic frequency scaling circuitry and continuous monitoring through power and temperature sensors per node for dynamic control of workloads. Both monitoring functions and response mechanisms can be engaged in distributed and in centralized mode. The developed multi-core architecture on a multi-FPGA platform employes a hierarchical memory model and supports a multi-threaded general-purpose processor together with many soft-core accelerators per node with independent dynamic frequency scaling per core. Utilizing on-line monitoring we propose a novel response mechanism using a distributed power management algorithm to evenly reduce and normalize power transients.

关键词： Dynamic Power Thermal Management multi-core Embedded System Thermal management Reaction Mechanisms management technique Energy sources dynamic frequency Line of nodes dynamic control ON-LINE MONITORS Power (Psychology) Workload Temperature Sensor Device Component Distribute Continuous monitoring Embedded systems power

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Real-Time Power-Efficient Integration of multi-Sensor Occupancy Grid on many-core

Real-Time Power-Efficient Integration of Multi-Sensor Occupa...

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ieee international workshop on Advanced Robotics and its Social Impacts (ARSO)

作者： Rakotovao, Tiana Mottin, Julien Puschini, Diego Laugier, Christian CEA LETI MINATEC Campus17 Rue Martyrs F-38000 Grenoble France INRIA Grenoble Rhone Alpes F-38334 Saint Ismier France

ISBN: (纸本)9781467380294

Safe Autonomous Vehicles (AVs) will emerge when comprehensive perception systems will be successfully integrated into vehicles. Advanced perception algorithms based on occupancy grids were developed for AV prototypes. These algorithms estimate the position and speed of every obstacle in the environment by using data fusion from multiple sensors. Computational requirements of such fusion prevent their integration into AVs on current low-power embedded hardware. However, recent emerging many-core architectures offer opportunities to fulfill the automotive market constraints and efficiently support advanced perception applications. This paper explores the integration of the occupancy grid multi-sensor fusion algorithm into low power many-core architectures. The parallel properties of this function are used to achieve real-time performance with a power consumption less than 1W. The proposed implementation produces an occupancy grid of 500 x 300 cells within 6.26ms. The execution time is 6x faster than typical sensor output rates and 9x faster than previous embedded prototypes.

关键词： Integration

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Towards Parallel Mining of Closed Patterns from multi-Relational Data 8

Towards Parallel Mining of Closed Patterns from Multi-Relati...

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8th ieee international workshop on Computational Intelligence and Applications (IWCIA)

作者： Nagao, Masahiro Seki, Hirohisa Nagoya Inst Technol Dept Comp Sci Nagoya Aichi Japan

ISBN: (纸本)9781479998869

In multi-relational data mining (MRDM), there have been proposed many methods for searching for patterns that involve multiple tables (relations) from a relational database. In this paper, we consider closed pattern mining from a multi-relational database (MRDB). Closed patterns, a.k.a. concept intents, give the condensed representations of frequent patterns, without losing any information, and they would be of help to discover information on hidden relationship among a given database. Since the computation of MRDM is costly compared with the conventional itemset mining, we propose a parallel algorithm for computing closed patterns on multi-core processors. In particular, we present a new load-balancing strategy which tries to fully exploit the task-parallelism intrinsic in the search process of the problem, and give some experimental results, which show the effectiveness of the proposed method.

关键词： multi-relational data mining closed patterns parallel processing load-balancing FCA ILP

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Fast Convolution Operations on many-core Architectures 17

Fast Convolution Operations on Many-Core Architectures

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2015 ieee 17th international Conference on High Performance computing and Communications (HPCC)

作者： Li, Shigang Zhang, Yunquan Xiang, Chunyang Shi, Lei Chinese Acad Sci Inst Comp Technol State Key Lab Comp Architecture Beijing Peoples R China Zhengzhou Univ Sch Informat Engn Zhengzhou Peoples R China

ISBN: (纸本)9781479989379

Convolution operations have been widely used in many important application domains, such as deep learning and computer vision, in which convolution is always the most time-consuming part. High computational throughput and memory bandwidth make many-core architectures the promising targets to accelerate these applications. In this paper, we implement and optimize different convolution operations, including 1D convolution, 2D convolution and multi-channel 2D convolution executed in mini-batch mode, on both GPU and Intel MIC many-core architectures. We find out that the performance bottleneck of 1D and 2D convolutions is on registers rather than local memory or L1/L2 cache, and therefore, register tiling is used to improve the performance. In addition, we present a novel solution for multi-channel 2D convolution, in which convolution is conducted on images directly instead of being translated to matrix multiplication, and the data reuse of the algorithm is fully exploited. We further summarize the parameters of autotuning for multi-channel 2D convolution and prune the search space based on heuristics. The experimental results show that, for the large filter size, our solution gets up to 33% performance improvement over cuDNN-v2 and up to 28% over clBLAS-based implementation, on GTX TITAN and AMD W8000 respectively. On Intel MIC, our solution gets up to 25% of the theoretical peak performance.

关键词： Convolution GPU Intel MIC OpenCL Deep learning Computer vision

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Design Methodology and Run-time Management for Predictable many-core systems 18

Design Methodology and Run-time Management for Predictable M...

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ieee 18th international Symposium on Real-Time Distributed computing workshops

作者： Wildermann, Stefan Weichslgartner, Andreas Teich, Juergen Univ Erlangen Nurnberg Hardware Software Codesign Erlangen Germany

ISBN: (纸本)9781467377096

many-core systems provide a feasible means to build high-performance multi-application systems. They are increasingly exposed to dynamic changes due to varying and online modified application mixes, as well as unavailability of hardware resources due to thermal and power management or faults. Particularly, when applications with real-time requirements are executed, these constraints may become a problem. Here, self-adaptive mechanisms are a means to optimally and feasibly manage such a system at run-time. This paper gives an overview of a design flow for hybrid application mapping for predictable many-core systems. The idea behind this concept is to perform a complex timing analysis and verification of an application during design time and then exploit this information for run-time management (RM) of the system. We propose a novel optimization algorithm to perform RM, which statically calculates a set of application mappings that are guaranteed to fulfill real-time requirements while heuristically optimizing the system objectives. Here, minimization of the energy consumption is exemplary chosen. The algorithm achieves significantly better results than a state-of-the-art approach, especially for systems with a high resource congestion.

关键词： many-core systems design space exploration run-time management timing predictability Runtime Redmouth disease Design flow Optimization algorithms hardware resource design year time series analysis Space Exploration Time Management energy consumption MAPPING(MATHEMATICAL)

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Improving Application Performance by Efficiently Utilizing Heterogeneous many-core Platforms 15

Improving Application Performance by Efficiently Utilizing H...

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2015 15th ieee ACM international Symposium on Cluster Cloud and Grid computing (CCGrid 2015)

作者： Shen, Jie Varbanescu, Ana Lucia Sips, Henk Delft Univ Technol Parallel & Distributed Syst Grp NL-2600 AA Delft Netherlands Univ Amsterdam Inst Informat NL-1012 WX Amsterdam Netherlands

ISBN: (纸本)9781479980062

Heterogeneous platforms integrating different types of processing units (such as multi-core CPUs and GPUs) are in high demand in high performance computing. Existing studies have shown that using heterogeneous platforms can improve application performance and hardware utilization. However, systematic methods to design, implement, and map applications to efficiently use heterogeneous computing resources are only very few. The goal of my PhD research is therefore to study such heterogeneous systems and propose systematic methods to allow many (classes of) applications to efficiently use them. After 3.5 years of PhD study, my contributions are (1) a thorough evaluation of a suitable programming model for heterogeneous computing;(2) a workload partitioning framework to accelerate parallel applications on heterogeneous platforms;(3) a modeling-based prediction method to determine the optimal workload partitioning;(4) a systematic approach to decide the best mapping between the application and the platform by choosing the best performing hardware configuration (Only-CPU, Only-GPU, or CPU+GPU with the workload partitioning). In the near future, I plan to apply my approach to large-scale applications and platforms to expand its usability and applicability.

关键词： Heterogeneous platforms Workload partitioning Hardware configuration multi-core CPUs GPUs Accelerators

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Heterogeneous programming with Single Operation multiple Data

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JOURNAL OF COMPUTER AND SYSTEM SCIENCES 2015年第1期81卷 16-37页

作者： Paulino, Herve Marques, Eduardo Univ Nova Lisboa Fac Ciencias & Tecnol Dept Informat CITI P-2829516 Caparica Portugal

Heterogeneity is omnipresent in today's commodity computational systems, which comprise at least one Central Processing Unit (CPU) and one Graphics Processing Unit (GPU). Nonetheless, all this computing power is not being harnessed in mainstream computing, as the programming of these systems entails many details of the underlying architecture and execution models. Current research on parallel programming is addressing these issues but, still, the system's heterogeneity is exposed at language level. This paper proposes a uniform framework, grounded on the Single Operation multiple Data model, for the programming of such heterogeneous systems. We designed a simple extension of the Java programming language that embodies the model, and developed a compiler that generates code for both multi-core CPUs and GPUs. A performance evaluation attests that, despite being based on a simple programming model, the approach is able to deliver performance gains on par with hand-tuned data-parallel multi-threaded Java applications. (c) 2014 Elsevier Inc. All rights reserved.

关键词： Data parallelism Single Operation multiple Data multi-cores GPUs

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Evaluation of Emerging Energy-Efficient Heterogeneous computing Platforms for Biomolecular and Cellular Simulation Workloads

Evaluation of Emerging Energy-Efficient Heterogeneous Comput...

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ieee international Symposium on Parallel and Distributed Processing workshops and Phd Forum (IPDPSW)

作者： John E. Stone Michael J. Hallock James C. Phillips Joseph R. Peterson Zaida Luthey-Schulten Klaus Schulten Beckman Institute University of Illinois at Urbana-Champaign Urbana IL USA Department of Chemistry University of Illinois at Urbana-Champaign Urbana IL USA Department of Physics University of Illinois at Urbana-Champaign Urbana IL USA

ISBN: (纸本)9781509036837

many of the continuing scientific advances achieved through computational biology are predicated on the availability of ongoing increases in computational power required for detailed simulation and analysis of cellular processes on biologically-relevant timescales. A critical challenge facing the development of future exascale supercomputer systems is the development of new computing hardware and associated scientific applications that dramatically improve upon the energy efficiency of existing solutions, while providing increased simulation, analysis, and visualization performance. Mobile computing platforms have recently become powerful enough to support interactive molecular visualization tasks that were previously only possible on laptops and workstations, creating future opportunities for their convenient use for meetings, remote collaboration, and as head mounted displays for immersive stereoscopic viewing. We describe early experiences adapting several biomolecular simulation and analysis applications for emerging heterogeneous computing platforms that combine power-efficient system-on-chip multi-core CPUs with high-performance massively parallel GPUs. We present low-cost power monitoring instrumentation that provides sufficient temporal resolution to evaluate the power consumption of individual CPU algorithms and GPU kernels. We compare the performance and energy efficiency of scientific applications running on emerging platforms with results obtained on traditional platforms, identify hardware and algorithmic performance bottlenecks that affect the usability of these platforms, and describe avenues for improving both the hardware and applications in pursuit of the needs of molecular modeling tasks on mobile devices and future exascale computers.

关键词： Graphics processing units Hardware Computational modeling Power demand Central Processing Unit Operating systems Biological system modeling

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An Efficient Task-Based Execution Model for Stochastic Linear Solver on multi-core and many-core systems 18

An Efficient Task-Based Execution Model for Stochastic Linea...

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18th ieee international Conference on Computational Science and Engineering (CSE)

作者： Ye, Fan Calvin, Christophe Petiton, Serge CEA Saclay Maison Simulat CEA DEN DANS DM2S Gif Sur Yvette France CEA Saclay CEA DEN DANS DM2S Gif Sur Yvette France Univ Lille 1 Lab Informat Fondamentale Lille F-59655 Villeneuve Dascq France

ISBN: (纸本)9781467382977

Monte Carlo methods are a wide range of computational algorithms which depend on repeated random sampling to obtain numerical results. They are of great interest in parallel computing because the samplings are very often independent of one another, which expose abundant parallelism. Such parallelism is well suited for modern processors with large number of cores. In this study, we revisit the Monte Carlo technique for solving linear systems. The conventional implementation of this method, in spite of its abundant parallelism, still exhibits some fundamental bottlenecks which limit performance: (a) relatively large amount of time spent in random number generation, (b) serialized selection of new states, (c) lack of vectorization which leads to low SIMD efficiency for processors with wide vector units, and (d) variable results due to the stochastic nature of algorithm. We propose an efficient task-based execution model for tackling these problems. It provides a new perspective to interpret the theory so we can bypass the inevitable routines in conventional implementation of Monte Carlo method, such as random number generation. The new model also exploits the salient architectural features of modern multi-core system, such as wide vector units and hardware support for irregular memory access. Our work is built on the latest research on task-based scheduling. It shows very promising performance on both multi-core and many-core system. Compared with optimized conventional parallel implementation, we achieved significant speedups (up to 3.68x) on test matrices.

关键词： Monte Carlo method Linear algebra multi-core many-core Intel many Integrated core Architecture (Intel MIC)

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