检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

954 篇 会议
20 篇 期刊文献
2 册 图书

馆藏范围

976 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

655 篇 工学
- 597 篇 计算机科学与技术...
- 238 篇 软件工程
- 190 篇 电气工程
- 76 篇 电子科学与技术（可...
- 62 篇 信息与通信工程
- 31 篇 控制科学与工程
- 23 篇 动力工程及工程热...
- 12 篇 仪器科学与技术
- 11 篇 机械工程
- 8 篇 生物医学工程（可授...
- 7 篇 力学（可授工学、理...
- 7 篇 环境科学与工程（可...
- 7 篇 安全科学与工程
- 6 篇 网络空间安全
- 5 篇 材料科学与工程（可...
- 5 篇 建筑学
- 5 篇 交通运输工程
- 5 篇 生物工程
92 篇 理学
- 53 篇 数学
- 27 篇 系统科学
- 19 篇 物理学
- 8 篇 生物学
- 6 篇 化学
- 6 篇 统计学（可授理学、...
89 篇 管理学
- 77 篇 管理科学与工程(可...
- 32 篇 工商管理
- 14 篇 图书情报与档案管...
10 篇 经济学
- 10 篇 应用经济学
8 篇 法学
- 7 篇 社会学
7 篇 医学
4 篇 教育学
- 4 篇 教育学
3 篇 文学
2 篇 农学
2 篇 军事学

主题

75 篇 computer archite...
62 篇 hardware
60 篇 parallel process...
55 篇 multicore proces...
48 篇 computational mo...
37 篇 concurrent compu...
36 篇 high performance...
34 篇 instruction sets
34 篇 multi-core
33 篇 graphics process...
31 篇 scalability
31 篇 cloud computing
30 篇 parallel program...
29 篇 programming
29 篇 program processo...
29 篇 graphics process...
27 篇 kernel
25 篇 embedded systems
24 篇 conferences
24 篇 resource managem...

机构

9 篇 ohio state univ ...
5 篇 saitama univ gra...
4 篇 ohio state univ ...
3 篇 saitama universi...
3 篇 vienna universit...
3 篇 oak ridge natl l...
3 篇 graduate school ...
3 篇 fraunhofer igd t...
3 篇 center for compu...
3 篇 karlsruhe instit...
3 篇 oak ridge natl l...
3 篇 beihang univ sch...
2 篇 penn state univ ...
2 篇 uppsala univ upp...
2 篇 seoul natl univ ...
2 篇 coll william & m...
2 篇 china university...
2 篇 waseda univ dept...
2 篇 tsinghua univers...
2 篇 national univers...

作者

6 篇 takuya azumi
6 篇 panda d. k.
6 篇 azumi takuya
5 篇 subramoni hari
5 篇 shingo igarashi
5 篇 benini luca
4 篇 tatsuya horiguch...
4 篇 tasuku ishigooka
4 篇 petiton serge
4 篇 el-ghazawi tarek
4 篇 sato mitsuhisa
4 篇 amano hideharu
3 篇 liu bo
3 篇 klasky scott
3 篇 dongarra jack
3 篇 varbanescu ana l...
3 篇 qian depei
3 篇 sriram krishnamo...
3 篇 weichslgartner a...
3 篇 alam sadaf r.

语言

967 篇 英文
8 篇 其他
1 篇 中文

检索条件"任意字段=IEEE International Workshop on Multi-/Many-core Computing Systems"

共 976 条记录，以下是381-390 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

XGRID: A Scalable many-core Embedded Processor

XGRID: A Scalable Many-Core Embedded Processor

引用

ieee international Symposium on Cyberspace Safety and Security

作者： Volkan Gunes Tony Givargis Center for Embedded Computer Systems University of California

ISBN: (纸本)9781479989386

The demand for compute cycles needed by embedded systems is rapidly increasing. In this paper, we introduce the XGRID embedded many-core system-on-chip architecture. XGRID makes use of a novel, FPGA-like, programmable interconnect infrastructure, offering scalability and deterministic communication using hardware supported message passing among cores. Our experiments with XGRID are very encouraging. A number of parallel benchmarks are evaluated on the XGRID processor using the application mapping technique described in this work. We have validated our scalability claim by running our benchmarks on XGRID varying in core count. We have also validated our assertions on XGRID architecture by comparing XGRID against the Graphite many-core architecture and have shown that XGRID outperforms Graphite in performance.

关键词： multi-core many-core Embedded Processors System-on-Chip Architectures

来源：评论

学校读者我要写书评

暂无评论

Towards parallel mining of closed patterns from multi-relational data

Towards parallel mining of closed patterns from multi-relati...

引用

ieee international workshop on Computational Intelligence & Applications (IWCIA)

作者： Masahiro Nagao Hirohisa Seki Dept. of Computer Science Nagoya Institute of Technology Nagoya Japan

In multi-relational data mining (MRDM), there have been proposed many methods for searching for patterns that involve multiple tables (relations) from a relational database. In this paper, we consider closed pattern mining from a multi-relational database (MRDB). Closed patterns, a.k.a. concept intents, give the condensed representations of frequent patterns, without losing any information, and they would be of help to discover information on hidden relationship among a given database. Since the computation of MRDM is costly compared with the conventional itemset mining, we propose a parallel algorithm for computing closed patterns on multi-core processors. In particular, we present a new load-balancing strategy which tries to fully exploit the task-parallelism intrinsic in the search process of the problem, and give some experimental results, which show the effectiveness of the proposed method.

关键词： Data mining Itemsets multicore processing Heuristic algorithms Instruction sets Relational databases

来源：评论

学校读者我要写书评

暂无评论

Shared Write Buffer to Support Data Sharing Among Speculative multi-threading cores

Shared Write Buffer to Support Data Sharing Among Speculativ...

引用

ieee international Conference on High Performance computing and Communications (HPCC)

作者： John Ye Songyuan Li Tianzhou Chen College of Computer Science Zhejiang University Hangzhou P.R. China

Speculative multi-threading (SpMT), a.k.a Thread Level Speculation (TLS), is a most noticeable research direction of automatic extraction of thread level parallelism (TLP), which is growing appealing in the multi-core and many-core era. The SpMT threads are extracted from a single thread, and are tightly coupled with data dependences. Traditional private L1 caches with coherence mechanism will not suit such intense data sharing among SpMT threads. We propose a Shared Write Buffer (SWB) that resides in parallell with the private L1 caches, but with much smaller capacity, and short access delay. When a core writes a datum to L1 cache, it will write the SWB first, and when it reads a datum, it will read from the SWB as well as from the L1. Because the SWB is shared among the cores, it may probably return a datum quicker than the L1 if the latter needs to go through a coherence process to load the datum. This way the SWB improves the performance of SpMT inter-core data sharing, and mitigate the overhead of coherence.

关键词： Coherence multicore processing Delays Instruction sets Message systems Protocols

来源：评论

学校读者我要写书评

暂无评论

Real-time power-efficient integration of multi-sensor occupancy grid on many-core

Real-time power-efficient integration of multi-sensor occupa...

引用

ieee workshop on Advanced Robotics and its Social Impacts, ARSO

作者： Tiana Rakotovao Julien Mottin Diego Puschini Christian Laugier INRIA Grenoble Rhone-Alpes CEA-LETI MINATEC Campus Grenoble

Safe Autonomous Vehicles (AVs) will emerge when comprehensive perception systems will be successfully integrated into vehicles. Advanced perception algorithms based on occupancy grids were developed for AV prototypes. These algorithms estimate the position and speed of every obstacle in the environment by using data fusion from multiple sensors. Computational requirements of such fusion prevent their integration into AVs on current low-power embedded hardware. However, recent emerging many-core architectures offer opportunities to fulfill the automotive market constraints and efficiently support advanced perception applications. This paper explores the integration of the occupancy grid multi-sensor fusion algorithm into low power many-core architectures. The parallel properties of this function are used to achieve realtime performance with a power consumption less than 1W. The proposed implementation produces an occupancy grid of 500×300 cells within 6.26ms. The execution time is 6x faster than typical sensor output rates and 9x faster than previous embedded prototypes.

关键词： Computational modeling Mathematical model Hardware Laser radar Real-time systems Vehicles Computer architecture

来源：评论

学校读者我要写书评

暂无评论

Dithering-Based Power and Thermal Management on FPGA-Based multi-core Embedded systems

Dithering-Based Power and Thermal Management on FPGA-Based M...

引用

ieee/IFIP international Conference on Embedded and Ubiquitous computing, EUC

作者： Ioannis Christoforakis Othon Tomoutzoglou Dimitrios Bakoyiannis George Kornaros Informatics Engineering Department Technological Educational Institute of Crete Heraklion Crete Greece

In this paper, we describe the design of a heterogeneous island-based network-on-chip to achieve a power-and thermal-aware coherent system. To this end we utilize different management techniques which employ dynamic frequency scaling circuitry and continuous monitoring through power and temperature sensors per node for dynamic control of workloads. Both monitoring functions and response mechanisms can be engaged in distributed and in centralized mode. The developed multi-core architecture on a multi-FPGA platform employes a hierarchical memory model and supports a multi-threaded general-purpose processor together with many soft-core accelerators per node with independent dynamic frequency scaling per core. Utilizing on-line monitoring we propose a novel response mechanism using a distributed power management algorithm to evenly reduce and normalize power transients.

关键词： Thermal management Monitoring Clocks Temperature sensors Process control

来源：评论

学校读者我要写书评

暂无评论

Customizable Heterogeneous Acceleration for Tomorrow's High-Performance computing

Customizable Heterogeneous Acceleration for Tomorrow's High-...

引用

ieee international Symposium on Cyberspace Safety and Security

作者： Alessandro Cilardo Jose Flich Mirko Gagliardi Rafael T. Gavila DIETI - University of Naples Federico II GAP - Universitat Politecnica de Valencia

ISBN: (纸本)9781479989386

High-performance computing as we know it today is experiencing unprecedented changes, encompassing all levels from technology to use cases. This paper explores the adoption of customizable, deeply heterogeneous manycore systems for future QoS-sensitive and power-efficient high-performance computing. At the heart of the proposed architecture is a NoC-based many-core system embracing medium-end CPUs, GPU-like processors, and reconfigurable hardware regions. The paper discusses the high-level design principles inspiring this innovative architecture as well as the key role that heterogeneous acceleration, ranging from multicore processors and GPUs down to FPGAs, might play for tomorrow's high-performance computing.

关键词： High Performance computing PROCESSOR multi-core processors acceleration

来源：评论

学校读者我要写书评

暂无评论

Ensuring an Effective User Experience When Managing and Running Scientific HPC Software

Ensuring an Effective User Experience When Managing and Runn...

引用

ieee/ACM international workshop on Software Engineering for High Performance computing in Science (SE4HPCS)

作者： Jeremy Cohen David Moxey Chris Cantwell Peter Austing John Darlington Spencer Sherwin Department of Computing Department of Aeronautics Imperial College London London UK

With CPU clock speeds stagnating over the last few years, ongoing advances in computing power and capabilities are being supported through increasing multi- and many-core parallelism. The resulting cost of locally maintaining large-scale computing infrastructure, combined with the need to perform increasingly large simulations, is leading to the wider use of alternative models of accessing infrastructure, such as the use of Infrastructure-as-a-Service (IaaS) cloud platforms. The diversity of platforms and the methods of interacting with them can make using them with complex scientific HPC codes difficult for users. In this position paper, we discuss our approaches to tackling these challenges on heterogeneous resources. As an example of the application of these approaches we use Nekkloud, our web-based interface for simplifying job specification and deployment of the Nektar++ high-order finite element HPC code. We also present results from a recent Nekkloud evaluation workshop undertaken with a group of Nektar++ users.

关键词： Conferences Computational modeling Usability Complexity theory Data models Documentation

来源：评论

学校读者我要写书评

暂无评论

Fast Convolution Operations on many-core Architectures

Fast Convolution Operations on Many-Core Architectures

引用

ieee international Conference on High Performance computing and Communications (HPCC)

作者： Shigang Li Yunquan Zhang Chunyang Xiang Lei Shi State Key Laboratory of Computer Architecture Chinese Academy of Sciences Beijing China School of Information Engineering Zhengzhou University Zhengzhou China

ISBN: (纸本)9781479989386

Convolution operations have been widely used in many important application domains, such as deep learning and computer vision, in which convolution is always the most time-consuming part. High computational throughput and memory bandwidth make many-core architectures the promising targets to accelerate these applications. In this paper, we implement and optimize different convolution operations, including 1D convolution, 2D convolution and multi-channel 2D convolution executed in mini-batch mode, on both GPU and Intel MIC many-core architectures. We find out that the performance bottleneck of 1D and 2D convolutions is on registers rather than local memory or L1/L2 cache, and therefore, register tiling is used to improve the performance. In addition, we present a novel solution for multi-channel 2D convolution, in which convolution is conducted on images directly instead of being translated to matrix multiplication, and the data reuse of the algorithm is fully exploited. We further summarize the parameters of autotuning for multichannel 2D convolution and prune the search space based on heuristics. The experimental results show that, for the large filter size, our solution gets up to 33% performance improvement over cuDNN-v2 and up to 28% over clBLASbased implementation, on GTX TITAN and AMD W8000 respectively. On Intel MIC, our solution gets up to 25% of the theoretical peak performance.

关键词： Convolution Instruction sets Registers Computer architecture Microwave integrated circuits Filtering algorithms Neural networks

来源：评论

学校读者我要写书评

暂无评论

Design Methodology and Run-Time Management for Predictable many-core systems

Design Methodology and Run-Time Management for Predictable M...

引用

ieee international Symposium on Object/Component/Service-Oriented Real-Time Distributed computing workshops (ISORCW)

作者： Stefan Wildermann Andreas Weichslgartner Jürgen Teich Hardware/Software Co-Design Friedrich-Alexander-Universität Erlangen-Nürnberg Germany

many-core systems provide a feasible means to build high-performance multi-application systems. They are increasingly exposed to dynamic changes due to varying and online modified application mixes, as well as unavailability of hardware resources due to thermal and power management or faults. Particularly, when applications with real-time requirements are executed, these constraints may become a problem. Here, self-adaptive mechanisms are a means to optimally and feasibly manage such a system at run-time. This paper gives an overview of a design flow for hybrid application mapping for predictable many-core systems. The idea behind this concept is to perform a complex timing analysis and verification of an application during design time and then exploit this information for RM of the system. We propose a novel optimization algorithm to perform RM, which statically calculates a set of application mappings that are guaranteed to fulfill real-time requirements while heuristically optimizing the system objectives. Here, minimization of the energy consumption is exemplary chosen. The algorithm achieves significantly better results than a state-of-the-art approach, especially for systems with a high resource congestion.

关键词： Real-time systems Optimization Routing Energy consumption Clustering algorithms Design methodology Hardware

来源：评论

学校读者我要写书评

暂无评论

Big or Little: A Study of Mobile Interactive Applications on an Asymmetric multi-core Platform

Big or Little: A Study of Mobile Interactive Applications on...

引用

ieee international workshop/Symposium on Workload Characterization

作者： Wonik Seo Daegil Im Jeongim Choi Jaehyuk Huh KAIST School of Computing Samsung Electronics

ISBN: (纸本)9781467382410

This paper characterizes a commercial mobile platform on an asymmetric multi-core processor, investigating its available thread-level parallelism (TLP) and the impact of core asymmetry on applications. This paper explores three critical aspects of asymmetric mobile systems, asymmetric hardware platform, application behavior, and the impact of scheduling and power management. First, this paper presents the performance and energy characteristics of a commercial asymmetric multi-core architecture with two core types. The comparison between big and little cores shows the potential benefit of asymmetric multi-cores for improving energy efficiency. Second, the paper investigates the available thread-level parallelism and core utilization behaviors of mobile interactive applications. Using popular mobile applications for the Android system, this paper analyzes the distinct TLP and CPU usage patterns of interactive applications. Third, the paper explores the impact of power governor and CPU scheduler on the asymmetric system. multiple cores with heterogeneous core types complicate scheduling and frequency scaling schemes, since the scheduler must migrate threads to different core types, in addition to traditional load balancing. This study shows that the current mobile applications are not fully utilizing the asymmetric multi-cores due to the lack of TLP and low computational requirement for big cores.

关键词： multicore processing Mobile communication Mobile applications Parallel processing Power demand Clocks

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共98页 << < 35 36 37 38 39 40 41 42 43 44 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：