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检索条件"任意字段=IEEE International Workshop on Multi-/Many-core Computing Systems"

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Power system probabilistic and security analysis on commodity high performance computing systems 13

Power system probabilistic and security analysis on commodit...

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3rd Int'l workshop on High Performance computing, Networking and Analytics for the Power Grid, HiPCNA-PG 2013 - Held in Conjunction with the international Conference for High Performance computing, Networking, Storage and Analysis, SC 2013

作者： Cui, Tao Franchetti, Franz Carnegie Mellon University 5000 Forbes Ave. Pittsburgh PA 15213 United States

ISBN: (纸本)9781450325103

Large scale integration of stochastic energy resources in power systems requires probabilistic analysis approaches for comprehensive system analysis. The large-varying grid condition on the aging and stressed power system infrastructures also requires merging of offline security analyses into online operation. Meanwhile in computing, the recent rapid hardware performance growth comes from the more and more complicated architecture. Fully utilizing the computing power for specific applications becomes very difficult. Given the challenges and opportunities in both the power system and the computing fields, this paper presents the unique commodity high performance computing system solutions to the following fundamental tools for power system probabilistic and security analysis: 1) a high performance Monte Carlo simulation (MCS) based distribution probabilistic load flow solver for real-time distribution feeder probabilistic solutions. 2) A high performance MCS based transmission probabilistic load flow solver for transmission grid probabilistic analysis. 3) A SIMD accelerated AC contingency calculation solver based on Woodbury matrix identity on multi-core CPUs. By aggressive algorithm level and computer architecture level performance optimizations including optimized data structures, optimization for superscalar out-of-order execution, SIMDization, and multi-core scheduling, our software fully utilizes the modern commodity computing systems, makes the critical and computational intensive power system probabilistic and security analysis problems solvable in real-time on commodity computing systems. © 2013 ACM.

关键词： Computer architecture

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HotStream: Efficient Data Streaming of Complex Patterns to multiple Accelerating Kernels

HotStream: Efficient Data Streaming of Complex Patterns to M...

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25th international Symposium on Computer Architecture and High Performance computing (SBAC-PAD)

作者： Paiagua, Sergio Pratas, Frederico Tomas, Pedro Roma, Nuno Chaves, Ricardo Univ Tecn Lisboa INESC ID IST P-1100 Lisbon Portugal

ISBN: (纸本)9781479929276

Designing accelerating kernels is a comprehensive task that requires efficient coupling of hardware and software. In particular, the structures responsible for handling data transfers in multi-core accelerator-based systems play a crucial role in the resulting performance. This paper proposes a data streaming accelerator framework that provides efficient data management facilities that are easily tailored for any application and data pattern. This is achieved through an innovative and fully programmable data management structure, implemented with two granularity levels. The obtained results show that the proposed framework is capable of efficient address generation and data fetch for complex streaming data patterns, while significantly reducing the size occupied by the pattern description. A large matrices multiplication case-study, based on a streaming architecture with four sub-block multiplication cores, demonstrates that, by enabling data re-use, the proposed framework increases the available bandwidth by 4.2x, resulting in a performance speedup of 2.1x. Furthermore, it reduces the Host memory requirements and its intervention by more than 40x.

关键词： Stream computing Programmable Data (pre-)fetch Controller many-core Heterogeneous Architectures

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Using Graphical Models and multi-attribute Utility Theory for Probabilistic Uncertainty Handling in Large systems, with Application to the Nuclear Emergency Management

Using Graphical Models and Multi-attribute Utility Theory fo...

引用

29th ieee international Conference on Data Engineering (ICDE)

作者： Leonelli, Manuele Smith, James Q. Univ Warwick Dept Stat Coventry CV4 7AL W Midlands England

ISBN: (纸本)9781467353045;9781467353038

Although many decision-making problems involve uncertainty, uncertainty handling within large decision support systems (DSSs) is challenging. One domain where uncertainty handling is critical is emergency response management, in particular nuclear emergency response, where decision making takes place in an uncertain, dynamically changing environment. Assimilation and analysis of data can help to reduce these uncertainties, but it is critical to do this in an efficient and defensible way. After briefly introducing the structure of a typical DSS for nuclear emergencies, the paper sets up a theoretical structure that enables a formal Bayesian decision analysis to be performed for environments like this within a DSS architecture. In such probabilistic DSSs many input conditional probability distributions are provided by different sets of experts overseeing different aspects of the emergency. These probabilities are then used by the decision maker (DM) to find her optimal decision. We demonstrate in this paper that unless due care is taken in such a composite framework, coherence and rationality may be compromised in a sense made explicit below. The technology we describe here builds a framework around which Bayesian data updating can be performed in a modular way, ensuring both coherence and efficiency, and provides sufficient unambiguous information to enable the DM to discover her expected utility maximizing policy.

关键词： Soft computing crisis management utility theory Emergency Services Probability coherence Decision analysis Graphical models rationality Atomic nuclei EMERGENCY RESPONSE

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RECAP: Region-Aware Cache Partitioning

RECAP: Region-Aware Cache Partitioning

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31st ieee international Conference on Computer Design (ICCD)

作者： Sundararajan, Karthik T. Jones, Timothy M. Topham, Nigel P. Synopsys Inc Mountain View CA USA Univ Cambridge Comp Lab Cambridge CB2 1TN England Univ Edinburgh Sch Informat Edinburgh EH8 9YL Midlothian Scotland

ISBN: (纸本)9781479929870

In recent years, high performance computing systems have obtained more processing cores and share a last level cache (LLC). However, as their number grows, the core-to-way ratio in the LLC increases, presenting problems to existing cache partitioning techniques which require more ways than cores. Furthermore, effective energy management of the LLC becomes increasingly important due to its size. This paper proposes a Region Aware Cache Partitioning (RECAP), an LLC energy-saving scheme for high-performance, many-core processors. RECAP partitions the data within the cache into shared and private regions. Applications only access the ways containing the data that they require, realising dynamic energy savings. Any ways that are not within the shared or private regions can be turned off to save static energy. We evaluate our scheme using an 8-core CMP running multi-programmed workloads and show that it achieves 17% dynamic and 13% static energy savings in the shared LLC with a 15% performance gain. Across our multi-threaded applications, we achieve 17% dynamic and 41% static energy savings with no impact on performance.

关键词： cache storage energy conservation multi-threading parallel processing

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Efficient Implementation of Cryptographic Primitives on the GA144 multi-core Architecture

Efficient Implementation of Cryptographic Primitives on the ...

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ieee 24th international Conference on Application-Specific systems, Architectures and Processors (ASAP)

作者： Schneider, Tobias von Maurich, Ingo Gueneysu, Tim Ruhr Univ Bochum Horst Gortz Inst IT Secur Bochum Germany

ISBN: (纸本)9781479904945;9781479904938

With myriads of small and pervasive devices in our digital age, the availability of low-power and energy-efficient processing technology has become absolutely essential. Most of these constrained devices need to incorporate security services for confidentiality and privacy in addition to their primary tasks - typically involving computationally expensive cryptography. In the last years, many researchers have worked on novel lightweight cryptographic constructions to minimize the computational burden on the constrained devices. However, most of those alternative constructions sacrificed security for simplicity, potentially enabling just as simple attacks. In this work, we aim for another approach and implement standardized and well-established cryptography on a special but very lightweight platform, namely an asynchronous GA144 ultra-low-powered multicore processor with 144 simplistic cores. For the first time, we demonstrate that symmetric and asymmetric cryptography such as AES and RSA is even feasible on such a low-end and unclocked device. With energy consumption being as low as 0.63 mu J and 22.3 mJ, this platform achieves a performance of 38 mu s and 462.9 ms per AES and RSA operation, respectively. Both energy consumption as well as computation time are significantly lower than many lightweight implementations reported so far.

关键词： energy conservation energy consumption low-power electronics multiprocessing systems power aware computing public key cryptography

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Parallelizing bioinformatics and security applications on a low-cost multi-core system

Parallelizing bioinformatics and security applications on a ...

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ieee and Arab-computing-Society (ACS) international Conference on Computer systems and Applications (AICCSA)

作者： Tzanoudakis, Teodor Papaefstathiou, Ioannis Manifavas, Charalampos Tech Univ Crete Elect & Comp Engn Dept Microprocessor & Hardware Lab Khania Crete Greece Technol Educ Inst Crete Appl Informat & Multimedia Dept Iraklion Greece

ISBN: (纸本)9781479907922

Utilizing multi-cores is now the norm in order to increase performance while also saving energy. The need to break the physical limits of uniprocessing (by branch prediction or RAW dependencies etc.) while being cost and power effective at the same time were the motivation for the scientific and industrial communities to focus on multi-processor architectures. Howver, the parallelization of existing applications has very frequently proved to be a cumbersome task and in many cases the parallel application is slower than the original serial one. This work demonstrates the parallelization of one high-end bioinformatics application (multiple sequence alignment for amino acids or nucleotide sequences "MAFFT") as well as a novel security application (fingerprinting recognition "NBIS") on a highly parallel, yet a very low cost, system. We initially demonstrate the method for parallelizing the applications and then we focus on the end performance. One application is significantly accelerated when the 7 cores of the system are utilized whereas the other cannot get any gain when being ported to more than one cores;we also demonstrate certain optimization techniques. We believe that this paper can act as a guideline for programmers that need to port their serial code to a parallel machine.

关键词： bioinformatics multiprocessing systems parallel processing security of data

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Learning the optimal operating point for many-core systems with extended range voltage/frequency scaling

Learning the optimal operating point for many-core systems w...

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11th ACM/ieee international Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2013

作者： Juan, Da-Cheng Garg, Siddharth Park, Jinpyo Marculescu, Diana Electrical and Computer Engineering Carnegie Mellon University Pittsburgh PA United States Machine Learning Department Carnegie Mellon University Pittsburgh PA United States Samsung Electronics Giheung Kyonggi-Do Korea Republic of

ISBN: (纸本)9781479914173

Near-Threshold computing (NTC) has emerged as a solution that promises to significantly increase the energy efficiency of next-generation multi-core systems. This paper evaluates and analyzes the behavior of dynamic voltage and frequency scaling (DVFS) control algorithms for multi-core systems operating under near-threshold, nominal, or turbo-mode conditions. We adapt the model selection technique from machine learning to learn the relationship between performance and power. The theoretical results show that the resulting models satisfy convexity properties essential to efficiently determining optimal voltage/frequency operating points for minimizing energy consumption under throughput constraints or maximizing throughput under a given power budget. Our experimental results show that, compared with DVFS in the conventional operating range, extended range DVFS control including turbo-mode and near-threshold operation achieves an additional (1) 13.28% average energy reduction under isoperformance conditions, and (2) 7.54% average throughput increase under iso-power conditions. © 2013 ieee.

关键词： Convex optimization

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Application-to-core Mapping Policies to Reduce Memory System Interference in multi-core systems

Application-to-Core Mapping Policies to Reduce Memory System...

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19th ieee international Symposium on High Performance Computer Architecture (HPCA)

作者： Das, Reetuparna Ausavarungnirun, Rachata Mutlu, Onur Kumar, Akhilesh Azimi, Mani Univ Michigan Ann Arbor MI 48109 USA

ISBN: (纸本)9781467355872

Future many-core processors are likely to concurrently execute a large number of diverse applications. How these applications are mapped to cores largely determines the interference between these applications in critical shared hardware resources. This paper proposes new application-to-core mapping policies to improve system performance by reducing inter-application interference in the on-chip network and memory controllers. The major new ideas of our policies are to: I) map network-latency-sensitive applications to separate parts of the network from network-bandwidth-intensive applications such that the former can make fast progress without heavy interference from the latter, 2) map those applications that benefit more from being closer to the memory controllers close to these resources. Our evaluations show that, averaged over 128 multiprogrammed workloads of 35 different benchmarks running on a 64-core system, our final application-to-core mapping policy improves system throughput by 16.7% over a state-of-the-art baseline, while also reducing system unfairness by 22.4% and average interconnect power consumption by 52.3%.

关键词： Mapping

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Real Time Cache Performance Analyzing for multi-core Parallel Programs

Real Time Cache Performance Analyzing for Multi-core Paralle...

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international Conference on Cloud and Service computing (CSC)

作者： Wang, Rui Gao, Yuan Zhang, Guolu Beihang Univ Sch Comp Sci & Engn Beijing 100191 Peoples R China

ISBN: (纸本)9780769551579

Modern processors mostly use cache to hide the memory access latency, so cache performance is very important to application program. A detailed cache performance analysis will provide programmers a clear view of their program behaviors, which can help them to identify the performance bottleneck and to optimize the source code. As the chip industry turn to integrate multiple cores into one chip, multi-core/many-core processor becomes the new approach to maintain the Moor's Law. Therefore, Parallel programs turn to be more important even in the personal computers. In parallel programs, the interaction between tasks is the source of bugs and errors and is hard to handling for most of programmers. The detailed cache behaviors will greatly helpful to the programmer to find the errors and optimize the programs. However, the existing cache performance analysis tools, due to the limitations of the hardware performance counters they depend on to get data, cannot get as much data as we expected. Those tools cannot reveal the program routines characteristics on shared cache and the source of cache misses with limited metrics on cache misses In this paper, we propose a method to obtain and analysis real time cache performance with binary instrumentation and cache emulation. We instrument the parallel program while it is running, and get the trace data about memory access. Then we transport the trace data to an carefully configured cache emulation module to get the detailed cache behavior information. The emulation module can not only get more information than hardware performance counter but also can be configured to simulate different target hardware environment. Additionally, we use the performance data to form a group of cache performance metrics which can intuitively help programmers to optimize their codes. The accuracy of this method is demonstrated by comparing the summary result with the hardware performance counter. Finally, we design an cache performance analysis tool

关键词： cache storage multiprocessing systems parallel programming

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Dragonfly: Cloud assisted Peer-to-Peer Architecture for multipoint Media Streaming Applications

Dragonfly: Cloud assisted Peer-to-Peer Architecture for Mult...

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ieee 6th international Conference on Cloud computing (CLOUD)

作者： Korpeoglu, Erdinc Sahin, Cetin Agrawal, Divyakant El Abbadi, Amr Hosomi, Takeo Seo, Yoshiki UC Santa Barbara Santa Barbara CA USA NEC Corp Ltd Tokyo Japan

ISBN: (纸本)9780769550282

Technology trends are not only transforming the hardware landscape of end-user devices but are also dramatically changing the types of software applications that are deployed on these devices. With the maturity of cloud computing during the past few years, users increasingly rely on networked applications that are deployed in the cloud. In particular, new applications will emerge where user interactions will be based on real-time continuous media streams instead of the traditional request-response types of interfaces. Furthermore, many of these applications will be multi-user streaming media based interactions instead of a single user interaction with an application. In this paper, we propose a geographic location-aware, hybrid, scalable cloud assisted peer-to- peer (P2P) architecture to support such applications that targets low administration cost, reduced bandwidth consumption, low latency, low initial investment cost and optimized resource usage. The main objective is to develop an efficient media delivery system that leverages locality. We propose a 3-layer novel architecture that uses at the core the cloud for application management, 2-tier edge cloud for supporting geo-dispersed user groups, and at the lowest level peer-to-peer dynamic overlays for locally clustered user groups. The proposed architecture manages multiple streaming sessions simultaneously and each streaming session is an independent entity. Our experiments on PlanetLab show that the dynamic construction and maintenance of delivering streams at both the user-level P2P overlay and edge cloud are indeed feasible and effective.

关键词： Cloud computing Geometric Routing Hybrid Architecture Live Streaming multicast multipoint Media Streaming P2P Cloud Peer-to-Peer systems

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