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Fixed-Priority multiprocessor Scheduling: Critical Instant, Response Time and Utilization Bound

Fixed-Priority Multiprocessor Scheduling: Critical Instant, ...

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26th ieee international Parallel and Distributed Processing Symposium (IPDPS) / workshop on High Performance Data Intensive computing

作者： Guan, Nan Yi, Wang Uppsala Univ Uppsala Sweden

ISBN: (纸本)9780769546766

The rapid development of multi-core processors leads to a constantly increasing trend of deploying real-time systems on multi-core platforms, to satisfy the dramatically increasing high-performance and low-power requirements. This trend demands effective and efficient multiprocessor real-time scheduling techniques. The uniprocessor scheduling problem has been well studied during the last 40 years. However the multiprocessor scheduling problem to map tasks onto parallel architectures is a much harder challenge. In this work, we study several fundamental problems in multiprocessor scheduling, namely the critical instant, bounded responsiveness, and utilization bound.

关键词： Fixed-Priority multiprocessor Scheduling Critical Instant Utilization Bound scheduling of multiprocessor multi-core processors Parallel architectures Fixed Priority instant Reaction Time Religious Missions power requirement Bound HIGH-PERFORMANCE

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Autotuning wavefront abstractions for heterogeneous architectures

Autotuning wavefront abstractions for heterogeneous architec...

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3rd workshop on Applications for multi-core Architecture, WAMCA 2012

作者： Mohanty, Siddharth Cole, Murray Institute for Computing Systems Architecture University of Edinburgh 10 Crichton Street Edinburgh United Kingdom

ISBN: (纸本)9781467350259

We present our auto tuned heterogeneous parallel programming abstraction for the wave front pattern. An exhaustive search of the tuning space indicates that correct setting of tuning factors can average 37x speedup over a sequential baseline. Our best automated machine learning based heuristic obtains 92% of this ideal speedup, averaged across our full range of wave front examples. © 2012 ieee.

关键词： Wavefronts

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Convergence of Distributed Clouds, Grids and their Management-CDCGM2012

Convergence of Distributed Clouds, Grids and their Managemen...

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21st ieee international workshop on Enabling Technologies - Infrastructure for Collaborative Enterprises (WETICE)

作者： Mikkilineni, Rao Morana, Giovanni Kawa Objects Inc Los Altos CA 94022 USA Univ Catania DIEEI I-95124 Catania Italy

ISBN: (纸本)9780769547176

We restate the objective of the first workshop on Collaboration and Cloud computing" in WETICE 2009;"to analyze current trends in Cloud computing and identify long-term research themes and facilitate collaboration in future research in the field that will ultimately enable global advancements in the field that are not dictated or driven by the prototypical short term profit driven motives of a particular corporate entity." We are glad to report that the discussions started in 2009 have directly resulted in an alternative approach to self-managing distributed computing systems totally different from current industry trend showing a way to eliminate the complexity of virtual machines and Hypervisors. If this approach is proven to be theoretically sound (as a paper in this conference is investigating) and extend its usefulness (demonstrated through their feasibility in the form of two proofs of concepts in the last conference) to mission critical environments, the DIME network architecture may yet prove to be an important contribution to computer science. In addition to the two papers related to the DIME computing model, there are nine other long papers and two short papers selected out of twenty two submissions discussing various aspects of clouds, grids and their management.

关键词： component Cloud computing grid computing Distributed Intelligent Managed Element Networks Distributed Services Management Services Virtualization Parallel computing many-core Servers

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Software controlled memories for scalable many-core architectures

Software controlled memories for scalable many-core architec...

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18th ieee international Conference on Embedded and Real-Time computing systems and Applications, RTCSA 2012

作者： Bathen, Luis Angel D. Dutt, Nikil D. Center for Embedded Computer Systems University of California Irvine CA United States

ISBN: (纸本)9781467330176

Technology scaling along with the ever evolving demand for media-rich software stacks have motivated the need for many-core platforms. With the increase in compute power and its inherent demand for high memory bandwidth comes the need for vast amounts of on-chip memory space. Thus, designers must carefully provision the memory real-estate to meet their application's needs. It has been shown in the embedded systems domain that both software controlled memories (e.g., scratchpad memories) and hardware-controlled memories (e.g., caches) have their pros and cons, some application domains such as multimedia fit very well in the software-controlled memory model, while other domains such as databases work well with caches. As a result, efficient memory management is extremely critical as it has a great impact on the system's power consumption and throughput. Traditional memory hierarchies primarily consist of SRAM-based on-chip caches, however, with the emergence of non-volatile memories (NVMs) and mixed-criticality systems, on-chip memories will be heterogeneous, not only in type (cache vs. scratchpad) but also in technology (e.g., SRAM vs. NVM). This paper surveys the state of the art in memory subsystems for many-core platforms, and presents strategies for efficiently managing software-controlled memories in the many-core domain, while addressing the various challenges designers face in deploying such memory subsystems (e.g., sharing the memory resources, accounting for variations in the subsystem, etc.). © 2012 ieee.

关键词： Virtualization

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Visual Context Identification for Privacy-Respecting Video Analytics

Visual Context Identification for Privacy-Respecting Video A...

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14th ieee international workshop on multimedia Signal Processing (MMSP)

作者： Badii, Atta Einig, Mathieu Tiemann, Marco Thiemert, Daniel Lallah, Chattun Univ Reading Intelligent Syst Res Lab Reading RG6 2AH Berks England

ISBN: (纸本)9781467345729

With the growing need for privacy-aware and privacy-respecting CCTV systems, it becomes crucial to develop workflows and architectures that can support and enhance privacy protection. Recent advances in image processing enable the automation of many surveillance tasks, increasing the risks of privacy infringements. Fortunately, image processing and pattern recognition techniques can also be used for automatically evaluating the context in which video surveillance takes place, and can therefore be employed for applying context-specific privacy rules. This paper describes how Bag-of-Visual-Words algorithms as well as human tracking and gait analysis cane used for recognizing specific sub-contexts that necessitate the application of particular privacy protection rules in usage contexts such as ambient assisted living, public or workspace surveillanceWe explain how the data of a multi-modal surveillance system should be handled in order to avoid unnecessary processing of sensitive information through Image Quality Descriptors that will support visual classifications by computing reliability measures relating to the image quality such as noise or problems with respect to ambient conditions.

关键词： Image Processing multi-Modal Data Analysis Privacy System architecture Co-design

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Making Learning Parallel Processing Interesting

Making Learning Parallel Processing Interesting

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26th ieee international Parallel and Distributed Processing Symposium (IPDPS) / workshop on High Performance Data Intensive computing

作者： Liu, Jie Wu, Yanwei Marsaglia, John Western Oregon Univ Div Comp Sci Monmouth OR 97361 USA

ISBN: (纸本)9780769546766

The abundant availability of multi-core computers makes "parallel computers" a common place and teaching Computer Science students to be able to design and develop parallel algorithms an urgent task. Most students recognize the needs of developing skills in parallel programming. However, since their Computer Science related curriculum are mostly taught based on sequential computers, introducing a new way of analysis and solving problems can be difficult. Making students interested in the subject can have a pivotal effect in the learning outcomes. In this short paper, we show several approaches we have been using to excite our students about learning parallel processing at our Concurrent systems class, where parallel processing and parallel programming are taught. Some approach include showing students algorithms with an appeared impossible high performance, showing them simple steps to achieve 100% CPU utilization on multi-core computers, combining sequential algorithms they learned in the past to create new parallel algorithms, and challenging them with implementing some rather complex parallel algorithms.

关键词： parallel processing multi core algorithms students' interests curriculum

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Implementation of a Lattice Boltzmann Method for Large Eddy Simulation on multiple GPUs

Implementation of a Lattice Boltzmann Method for Large Eddy ...

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14th ieee international Conference on High Performance computing and Communications (HPCC) / ieee 9th international Conference on Embedded Software and systems (ICESS)

作者： Li, Qinjian Zhong, Chengwen Li, Kai Zhang, Guangyong Lu, Xiaowei Zhang, Qing Zhao, Kaiyong Chu, Xiaowen Northwestern Polytech Univ Ctr High Performance Comp Xian 710072 Peoples R China Northwestern Polytech Univ Natl Key Lab Sci & Technol Aerodynam Design & Res Xian 710072 Peoples R China Natl Key Lab High efficient Server Storage Techno Jian Jiangxi Peoples R China Hong Kong Baptist Univ Dept Comp Sci Inspur HKBU Joint Lab Heterogeneous Comp Hong Kong Peoples R China

ISBN: (纸本)9780769547497

Recently, the Graphic Processor Unit (GPU) has evolved into a highly parallel, multithreaded, many-core processor with tremendous computational horsepower and very high memory bandwidth. To improve the simulation efficiency of complex flow phenomena in the field of computational fluid dynamics, a CUDA-based simulation algorithm of large eddy simulation using multiple GPUs is proposed. Our implementation adopted the "collision after propagation" scheme and performed the propagation process by global memory reading transactions. The working set is split up into equal sub-domains and assigned to each GPU for simplicity. Using recently released hardware, up to four GPUs can be controlled by a single CPU thread and run in parallel. The results show that our multi-GPU implementation could perform simulations on a rather large scale (meshes: 10240 x 10240) even using double-precision floating point calculation and achieved 190X speedup over the sequential implementation on CPU.

关键词： CUDA Lattice Boltzmann method multi-GPU computing Large eddy simulation Parellel computing

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MCFlow: A real-time multi-core aware middleware for dependent task graphs

MCFlow: A real-time multi-core aware middleware for dependen...

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18th ieee international Conference on Embedded and Real-Time computing systems and Applications, RTCSA 2012

作者： Huang, Huang-Ming Gill, Christopher Lu, Chenyang Department of Computer Science and Engineering Washington University St. Louis MO United States

ISBN: (纸本)9781467330176

Driven by the evolution of modern computer architectures from uni-processor to multi-core platforms, there is an increasing need to provide light-weight, efficient, and predictable support for fine-grained parallel and distributed execution of soft real-time tasks with end-to-end timing constraints, modeled as directed a cyclic graphs whose edges capture dependences among their subtasks. At the same time, there is a need to support state of the art programming models such as distributed components, whose ability to encapsulate functionality and allow context-specific optimizations is essential to manage the increasing complexity of modern distributed real-time and embedded systems and systems-of-systems. Real-time distributed middleware such as RT-CORBA has not kept pace with these developments, and a new generation of middleware is needed that can map these dependent subtask graphs onto distributed hosts with multi-core architectures, efficiently and within a simple, lightweight, and intuitive component programming model. To overcome these limitations, we have designed and implemented MC Flow, a novel distributed real-time component middleware for dependent subtask graphs running on multi-core platforms. MC Flow provides three new contributions to the state of the art in real-time component middleware: (1) a very lightweight component model that facilitates system integration and deployment through automatic code generation at compile time from a deployment plan specification, (2) transparent optimization of inter-component communication, and (3) the use of interface polymorphism to separate functional correctness from data copying and other performance constraints so that they can be configured and enforced independently but in a type-safe manner. Empirical evaluations of our approach in comparison to the widely used TAO real-time middleware show that MC Flow performs comparably to TAO when only one core is used and outperforms TAO when multiple cores are involved

关键词： Middleware

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Proceedings of the 2nd international workshop on Runtime and Operating systems for Supercomputers, ROSS 2012 - In Conjunction with: ICS 2012

Proceedings of the 2nd International Workshop on Runtime and...

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2nd international workshop on Runtime and Operating systems for Supercomputers, ROSS 2012 - In Conjunction with: ICS 2012

ISBN: (纸本)9781450314602

The proceedings contain 10 papers. The topics discussed include: I/O threads to reduce checkpoint blocking for an electromagnetics solver on blue gene/P and cray XK6;a file I/O system for many-core based clusters;integrated in-system storage architecture for high performance computing;The RAMDISK storage accelerator - a method of accelerating I/O performance on HPC systems using RAMDISKs;optimizing latency and throughput for spawning processes on massively multicore processors;stepping towards noiseless Linux environment;using virtualization to improve compute node performance;and a design of hybrid operating system for a parallel computer with multi-core and many-core processors.

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Radio Astronomy Beam Forming on many-core Architectures

Radio Astronomy Beam Forming on Many-Core Architectures

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26th ieee international Parallel and Distributed Processing Symposium (IPDPS) / workshop on High Performance Data Intensive computing

作者： Sclocco, Alessio Varbanescu, Ana Lucia Mol, Jan David van Nieuwpoort, Rob V. Vrije Univ Amsterdam Fac Sci Amsterdam Netherlands Netherlands Inst Radio Astron ASTRON Dwingeloo Netherlands

ISBN: (纸本)9780769546759

Traditional radio telescopes use large steel dishes to observe radio sources. The largest radio telescope in the world, LOFAR, uses tens of thousands of fixed, omnidirectional antennas instead, a novel design that promises ground-breaking research in astronomy. Where traditional telescopes use custom-built hardware, LOFAR uses software to do signal processing in real time. This leads to an instrument that is inherently more flexible. However, the enormous data rates and processing requirements (tens to hundreds of teraflops) make this extremely challenging. The next-generation telescope, the SKA, will require exaflops. Unlike traditional instruments, LOFAR and SKA can observe in hundreds of directions simultaneously, using beam forming. This is useful, for example, to search the sky for pulsars (i.e. rapidly rotating highly magnetized neutron stars). Beam forming is an important technique in signal processing: it is also used in WIFI and 4G cellular networks, radar systems, and health-care microwave imaging instruments. We propose the use of many-core architectures, such as 48-core CPU systems and Graphics Processing Units (GPUs), to accelerate beam forming. We use two different frameworks for GPUs, CUDA and OpenCL, and present results for hardware from different vendors (i.e. AMD and NVIDIA). Additionally, we implement the LOFAR beam former on multi-core CPUs, using OpenMP with SSE vector instructions. We use auto-tuning to support different architectures and implementation frameworks, achieving both platform and performance portability. Finally, we compare our results with the production implementation, written in assembly and running on an IBM Blue Gene/P supercomputer. We compare both computational and power efficiency, since power usage is one of the fundamental challenges modern radio telescopes face. Compared to the production implementation, our auto-tuned beam former is 45-50 times faster on GPUs, and 2-8 times more power efficient. Our experimental results

关键词： radio astronomy many-core architectures beam forming auto tuning

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