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检索条件"任意字段=IEEE International Workshop on Multi-/Many-core Computing Systems"

共 976 条记录，以下是731-740 订阅

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Convergence of Distributed Clouds, Grids and their Management Track Report - CDCGM 2011

Convergence of Distributed Clouds, Grids and their Managemen...

引用

ieee international workshop on Enabling Technologies: Infrastructure for Collaborative Enterprises (WET ICE)

作者： Rao Mikkilineni Giovanni Morana Kawa Objects Inc. Los Altos CA USA DIEEI Universita Catania Catania Italy

The stated objective of the first workshop on Collaboration and Cloud computing" in WETICE 2009 was "to analyze current trends in Cloud computing and identify long-term research themes and facilitate collaboration in future research in the field that will ultimately enable global advancements in the field that are not dictated or driven by the prototypical short term profit driven motives of a particular corporate entity." This report describes the progress made within the span of three conferences which helped develop a new approach to the convergence of distributed clouds, grids and their management. This track presents a new computing model and its implementation which resulted directly from the collaboration of the two workshops, Collaboration and Cloud computing workshop and the Emerging Technologies for Next-Generation GRIDs sponsored under the Aegis of WETICE. In this paper we present some of the key issues that still need to be addressed to improve the efficiencies and utilize the new generation of many-core servers that are transforming the information technology landscape. We hope WETICE2011 will continue the tradition to forge new collaborations and lead to innovation without a short term agenda.

关键词： Computational modeling Servers Cloud computing Operating systems Collaboration Business Conferences

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Experience on Comparison of Operating systems Scalability on the multi-core Architecture

Experience on Comparison of Operating Systems Scalability on...

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ieee international Conference on Cluster computing

作者： Yan Cui Yingxin Wang Yu Chen Yuanchun Shi Computer Science and Technology Department Tsinghua University Beijing China Software Institute Tsinghua University Beijing China

multi-core processor architectures have become ubiquitous in today's computing platforms, especially in parallel computing installations, with their power and cost advantages. While the technology trend continues towards having hundreds of cores on a chip in the foreseeable future, an urgent question posed to system designers as well as application users is whether applications can receive sufficient support on today's operating systems for them to scale to many cores. To this end, people need to understand the strengths and weaknesses on their support on scalability and to identify major bottlenecks limiting the scalability, if any. As open-source operating systems are of particular interests in the research and industry communities, in this paper we choose three operating systems (Linux, Solaris and FreeBSD) to systematically evaluate and compare their scalability by using a set of highly-focused microbenchmarks for broad and detailed understanding their scalability on an AMD 32-core system. We use system profiling tools and analyze kernel source codes to find out the root cause of each observed scalability bottleneck. Our results reveal that there is no single operating system among the three standing out on all system aspects, though some system(s) can prevail on some of the system aspects. For example, Linux outperforms Solaris and FreeBSD significantly for file-descriptor and process-intensive operations. For applications with intensive sockets creation and deletion operations, Solaris leads FreeBSD, which scales better than Linux. With the help of performance tools and source code instrumentation and analysis, we find that synchronization primitives protecting shared data structures in the kernels are the major bottleneck limiting system scalability. Empowered by the knowledge obtained through targeted experiments and analysis on a small-scale system, we are able to project the scalability of an application on any of the investigated operating systems running

关键词： Scalability Benchmark testing Linux Throughput Kernel Libraries

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Parallel deblocking filter for H.264/AVC implemented on Tile64 platform

Parallel deblocking filter for H.264/AVC implemented on Tile...

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ieee international Conference on multimedia and Expo (ICME)

作者： Chenggang Yan Feng Dai Yongdong Zhang Yike Ma Licheng Chen Lingjun Fan Yasong Zheng Chinese Academy and Sciences Beijing China Institute of Computing Technology Chinese Academy and Sciences Beijing China Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China

ISBN: (纸本)9781612843483

For the purpose of accelerating deblocking filter, which accounts for a significant percentage of H.264/AVC decoding time, some researchers use multi-core platforms to achieve the required performance. We study the problem under the context of many-core systems. Parallelization of deblocking filter on many-core platform is challenging not only because deblocking filter has complicated data dependencies which provides insufficient parallelism for so many cores but also because parallelization may have significant synchronization overhead. We present a new method to exploit the implicit parallelism and reduce the synchronization overhead. We apply our implementation to the deblocking filter of the H.264/AVC reference software JM15.1 on Tile64 platform. The proposed method achieves up to 817%, 604% and 532% speedup for CIF, SD and HD videos compared to the well-known wavefront method using 62 cores, respectively.

关键词： Filtering Parallel processing Synchronization High definition video Decoding Program processors multicore processing

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CU2CL: A CUDA-to-OpenCL Translator for multi- and many-core Architectures

CU2CL: A CUDA-to-OpenCL Translator for Multi- and Many-Core ...

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international Conference on Parallel and Distributed systems (ICPADS)

作者： Gabriel Martinez Mark Gardner Wu-chun Feng Department of Computer Science Virginia Tech USA Office of IT Virginia Tech USA

The use of graphics processing units (GPUs) in high-performance parallel computing continues to become more prevalent, often as part of a heterogeneous system. For years, CUDA has been the de facto programming environment for nearly all general-purpose GPU (GPGPU) applications. In spite of this, the framework is available only on NVIDIA GPUs, traditionally requiring reimplementation in other frameworks in order to utilize additional multi- or many-core devices. On the other hand, OpenCL provides an open and vendor-neutral programming environment and runtime system. With implementations available for CPUs, GPUs, and other types of accelerators, OpenCL therefore holds the promise of a "write once, run anywhere" ecosystem for heterogeneous computing. Given the many similarities between CUDA and OpenCL, manually porting a CUDA application to OpenCL is typically straightforward, albeit tedious and error-prone. In response to this issue, we created CU2CL, an automated CUDA-to-OpenCL source-to-source translator that possesses a novel design and clever reuse of the Clang compiler framework. Currently, the CU2CL translator covers the primary constructs found in CUDA runtime API, and we have successfully translated many applications from the CUDA SDK and Rodinia benchmark suite. The performance of the automatically translated applications via CU2CL is on par with their manually ported counterparts.

关键词： Graphics processing unit Kernel Libraries Runtime Instruction sets Programming Memory management

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Reflex Barrier: A Scalable Network-Based Synchronization Barrier

Reflex Barrier: A Scalable Network-Based Synchronization Bar...

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international Conference on Parallel and Distributed systems (ICPADS)

作者： Ahmad Anbar Olivier Serres Tarek El-Ghazawi NSF Center of High-Performance Reconfigurable Computing (CHREC) Department of Electrical and Computer Engineering The George Washington University USA

High-performance computing is witnessing the proliferation of multi-core processors in parallel architectures, and the trend is expected to increase further with the emerging many-core technology, leading to hundreds of processing cores within each compute node in the near future. Along side with this trend, it is also clear that total number of cores within the whole system is increasing. To be able to harvest the fruits of this massive parallelism, inter-process synchronization and communication should be as lightweight as they can be, and should be relying on as limited involvement as possible of the participating processors/cores. The synchronization algorithms that target shared memory processors are expected not to be able to scale on many-cores as they rely on atomics, locks, and/or cache coherence protocols, which all should be very costly operations on many-cores. In the same time, some many core architectures provide user space networks on chip (NoCs) that operate similar to regular networks. In this paper, we are introducing the Reflex barrier, a new synchronization barrier algorithm that relies on fundamental networking concepts. As the barrier relies on the characteristics of the network, it requires very little intervention from the participating processors/cores. The algorithm can also be implemented as split phase, which furnish an opportunity to reduce the synchronization cost. We implemented the algorithm using Unified Parallel C (UPC), MPI and pThreads. We tested our implementation on TILE64, a 64-core processor. The performance of the Reflex barrier is also analyzed and compared to other algorithms using performance models.

关键词： Program processors Synchronization Message systems Tiles Coherence Computer architecture Routing

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A Case for Hardware Protection of Guest VMs from Compromised Hypervisors in Cloud computing

A Case for Hardware Protection of Guest VMs from Compromised...

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international Conference on Distributed computing systems workshop

作者： Jakub Szefer Ruby B. Lee Department of Electrical Engineering Princeton University USA

Cloud computing, enabled by virtualization technologies, is becoming a mainstream computing model. many companies are starting to utilize the infrastructure-as-a-service (IaaS) cloud computing model, leasing guest virtual machines (VMs) from the infrastructure providers for economic reasons: to reduce their operating costs and to increase the flexibility of their own infrastructures. Yet, many companies may be hesitant to move to cloud computing due to security concerns. An integral part of any virtualization technology is the all-powerful hyper visor. A hyper visor is a system management software layer which can access all resources of the platform. Much research has been done on using hypervisors to monitor guest VMs for malicious code and on hardening hypervisors to make them more secure. There is, however, another threat which has not been addressed by researchers - that of compromised or malicious hypervisors that can extract sensitive or confidential data from guest VMs. Consequently, we propose that a new research direction needs to be undertaken to tackle this threat. We further propose that new hardware mechanisms in the multi core microprocessors are a viable way of providing protections for the guest VMs from the hyper visor, while still allowing the hyper visor to flexibly manage the resources of the physical platform.

关键词： Virtual machine monitors Hardware Cryptography Software Microprocessors Servers

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Building a multi-kernel Embedded System with High Performance IPC Mechanism

Building a Multi-kernel Embedded System with High Performanc...

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ieee international Conference on High Performance computing and Communications (HPCC)

作者： Jing Chen Da-Wei Chang Chung-Ping Young Guan-Ying Huang Su-Lin Chu Chung-Yuan Ke Shih-Tun Yen Tsang-Shuo Kuo Department of Electrical Engineering National Cheng Kung University Tainan Taiwan Department of Computer Science and Information Engineering National Cheng Kung University Tainan Taiwan National Cheng Kung University Tainan Taiwan

many consumer embedded system products nowadays are built on platforms with System-On-a-Chip (SOC) in which two or more processor cores, which are not necessarily of the same type, are put into a single chip and form the architecture of Chip-level multi-Processor (CMP). Although such platform is capable of achieving high performance at relatively low cost, the system architecture of CMP brings new challenges in system development and increases complexity in developing embedded software especially at the level of kernel or operating system. This paper presents our experience and some preliminary results from building a multi-kernel embedded system with high performance Inter-Process Communication (IPC) mechanism for application software running on the platform of a newly developed multi-core SOC, namely PAC Duo SOC, which is the latest product from the PAC (short for Parallel Architecture core) Project implemented at Industry Technology Research Institute (ITRI) in Taiwan. PAC Duo SOC is a heterogeneous multi-processor SOC composed of one ARM926 core serving as the general purpose processor (GPP) and two ITRI PAC DSP cores serving as the special purpose processors (SPP). We ported Linux operating system to run on the ARM926 processor and ported the real-time kernel Micro-C/OS-II to run on one PAC DSP core, leaving the other PAC DSP core with the option of running either another Micro-C/OS-II or a different kernel. To address the issues in IPC, a high performance message-passing mechanism is developed. Its design not only takes application-specific requirements into account but also takes advantages of hardware features.

关键词： Digital signal processing Kernel System-on-a-chip Embedded systems multicore processing Hardware

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The 100∶100 challenge for computing in rescue robotics

The 100∶100 challenge for computing in rescue robotics

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ieee international workshop on Safety, Security, and Rescue Robotics (SSRR)

作者： Robin R. Murphy Center of Robot-Assisted Search and Rescue Texas A and M University College Station TX USA

Our vision of computing for rescue robotics is to achieve Metcalfe's Law sized effects, where the value of multiple heterogeneous robots (100) to diverse stakeholders (100) is proportional to the square of the connections. The more stakeholders who can access and use the data from more robots in real-time, the greater the expected value of robots to the emergency enterprise. This would shift the paradigm from the current state of the practice where a small set of operators and trained response professionals use robot data for local decisions to the desired state where many groups of remote stakeholders work directly with the data (both single source and aggregated) and may be unaware of the robotic source(s). The 100:100 Challenge encourages the computing community to continue existing research in increasing autonomy and mapping to help make the robots more reliable, easier to coordinate, and simplify data fusion and visualization; expand research in human-robot interaction and multi-robot coordination to engage new topics in remote presence, user interfaces, data visualization, training, remote manipulation, and victim management to make control of the robot “invisible” to stakeholders; and incorporate existing lines of research in artificial intelligence (especially planning, scheduling, reasoning) and networking to provide complete and efficient multi-agent coordination and distribution of data.

关键词： Robot kinematics Humans Robot sensing systems Conferences Real time systems Training

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Autonomic Resource Management with Support Vector Machines

Autonomic Resource Management with Support Vector Machines

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international workshop on Grid computing

作者： Oliver Niehorster Alexander Krieger Jens Simon Andre Brinkmann Paderborn Center of Parallel Computing Universität Paderborn Germany

The use of virtualization technology makes data centers more dynamic and easier to administrate. Today, cloud providers offer customers access to complex applications running on virtualized hardware. Nevertheless, big virtualized data centers become stochastic environments and the implification on the user side leads to many challenges for the provider. He has to find cost-efficient configurations and has to deal with dynamic environments to ensure service guarantees. In this paper, we introduce a software solution that reduces the degree of human intervention to manage cloud services. We present a multi-agent system located in the Software as a Service (SaaS) layer. Agents allocate resources, configure applications, check the feasibility of requests, and generate cost estimates. The agents learn behavior models of the services via Support Vector Machines (SVMs) and share their experiences via a global knowledge base. We evaluate our approach on real cloud systems with three different applications, a brokerage system, a high-performance computing software, and a web server.

关键词： Support vector machines Quality of service Knowledge based systems Servers Cloud computing Kernel

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multi-objective design of highly interpretable fuzzy rule-based classifiers with semantic cointension

Multi-objective design of highly interpretable fuzzy rule-ba...

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international workshop on Genetic and Evolving systems, GEFS

作者： R. Cannone J. M. Alonso L. Magdalena Department of Informatics University of Bari Bari Italy European Centre for Soft Computing Micros Mieres Spain

Although recently there has been many papers dealing with how to characterize and assess interpretability, there is still a lot of work to be done. Interpretability assessment is usually addressed by evaluating the complexity and/or readability of fuzzy rule-based systems. However, comprehensibility is usually not taken into account because it implies more cognitive aspects which are difficult to formalize and to deal with. In this work we show the importance of considering not only readability but also comprehensibility during the design process of fuzzy systems. We introduce the use of a novel index for evaluating comprehensibility in the context of a three-objective evolutionary framework for designing highly interpretable fuzzy rule-based classifiers. It is named as logical view index (LVI) and it is based on a semantic cointension approach. The proposed evolutionary algorithm consists of embedding the HILK (Highly Interpretable Linguistic Knowledge) fuzzy modeling methodology into the classical NSGA-II with the aim of maximizing accuracy, readability, and comprehensibility of the generated fuzzy rule-based classifiers. Our proposal is tested in the well-known PIMA benchmark problem which corresponds to a medical diagnosis problem where interpretability is a strong requirement.

关键词： Semantics Pragmatics Fuzzy systems Accuracy Evolutionary computation Minimization Measurement

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