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Xbar-Partitioning: A Practical Way for Parasitics and Noise Tolerance in Analog IMC circuits

ieee journal on emerging and selected topics in circuits and systems 2022年第4期12卷 867-877页

作者： Amin, Md Hasibul Elbtity, Mohammed E. Zand, Ramtin Univ South Carolina Dept Comp Sci & Engn Columbia SC 29201 USA

Conventional in-memory computing (IMC) architectures consist of analog memristive crossbars to accelerate matrix-vector multiplication (MVM), and digital functional units to realize nonlinear vector (NLV) operations in deep neural networks (DNNs). These designs, however, require energy-hungry signal conversion units which can dissipate more than 95% of the total power of the system. Fully-analog IMC circuits remove the need for signal converters by realizing both MVM and NLV operations in the analog domain leading to significant energy savings. However, they are more susceptible to errors caused by interconnect parasitic and noise. Here, we propose Xbar-partitioning, a practical approach to divide large IMC arrays into multiple partitions to alleviate the impacts of noise and parasitics while keeping the computation in the analog domain. The SPICE circuit simulation results for the deployment of a $400\times 120\times 84\times 10$ DNN model on various fully-analog IMC architectures with five different 2-terminal and 3-terminal resistive devices, six different bitcell layouts, and four different partitioning schemes show that the highest accuracy of 98.08% can be obtained for a design using phase-change memory (PCM) devices and 1T-1R bitcell with 13, 4, and 3 horizontal partitions, and 4, 3, and 1 vertical partition for the first, second, and third layers of the DNN, respectively. Finally, we provide a signal-to-noise ratio (SNR) analysis which shows that the IMC architectures can be made more noise-tolerant by using smaller-sized bitcells, higher partitions in the crossbar, and device technologies with higher R-off/R-on ratio.

关键词： Computer architecture Magnetic tunneling Resistance Neurons Electrodes Switches Phase change materials In-memory computing interconnect parasitics signal-to-noise ratio memristive technologies partitioning

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A Novel Control Scheme for High PF Buck LED Driver With Reduced Compensation Capacitance

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ieee journal OF emerging AND selected topics IN POWER ELECTRONICS 2023年第5期11卷 4630-4642页

作者： Yu, Dailing Xie, Xiaogao Dong, Hanjing Hangzhou Dianzi Univ Key Lab IOT & Informat Fus Technol Zhejiang Prov Hangzhou Zhejiang Peoples R China Hangzhou Dianzi Univ Sch Automat Hangzhou Zhejiang Peoples R China Zhejiang Ind Polytech Coll Dept Elect & Elect Engn Shaoxing 312000 Peoples R China

A novel control scheme for a high power factor (PF) Buck LED driver with a reduced compensation capacitor is proposed in this article. The proposed control scheme is composed of a novel output current estimation circuit based on an accumulator and a novel adaptive compensation circuit with a half-line-cycle step control. The proposed output current estimation circuit can achieve the information of the average output current by using the accumulator so that the capacitance of the capacitor in the RC filter can be reduced greatly. Meanwhile, the proposed adaptive half-line-cycle step control can further reduce the compensation capacitance greatly and increase the closed-loop bandwidth of the system under low input voltages. In this way, the control circuit can be fully integrated into a single chip with saved I/O pins and the dynamic response of the converter can also be improved. Detailed theoretical analysis has been presented and an 80-V/240-mA laboratory prototype of the high PF Buck LED driver was built up to verify the feasibility of the proposed control scheme.

关键词： Light emitting diodes Capacitors Capacitance Estimation Voltage control System-on-chip Switching circuits Half-line-cycle step control high power factor (PF) Buck LED driver output current estimation reduced compensation capacitance

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Design and Study of Radial Flux Dual-Rotor Permanent Magnet Synchronous Machine With Modular Stator

IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN INDUSTRIAL E...

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ieee journal OF emerging AND selected topics IN INDUSTRIAL ELECTRONICS 2024年第4期5卷 1409-1419页

作者： Yang, Minglei Wang, Yeqin Wang, Xiusen Zhong, Zaimin Tongji Univ Sch Automot Studies Shanghai 201804 Peoples R China

In this article, a design method of equal inner and outer flux applicable to radial flux dual-rotor permanent magnet synchronous machine (RFDR-PMSM) with a modular stator is proposed. Based on this design method, the power equation of the RFDR-PMSM with the modular stator is derived, which reveals the theoretical relationship between the main sizes and the power. In order to simplify the winding process of the modular stator, a fractional-slot concentrated winding is selected for RFDR-PMSM with the modular stator. Then, a 24-slots and 20-poles RFDR-PMSM with a modular stator is designed using the proposed design methodology. Through finite element analysis (FEA), it is found that the design RFDR-PMSM with the modular stator has higher power density and efficiency compared with the traditional RFDR-PMSM with a stator yoke. Moreover, a modular stator structure with a pin connection is proposed to solve the problem that the stator loses effective support after removing the stator yoke. Finally, a prototype of the RFDR-PMSM with the modular stator is manufactured. The back electromotive force (EMF), current-torque curve, and the efficiency map up to 10 kW of the RFDR-PMSM with the modular stator are tested, and the correctness of the finite element model and theoretical design is verified by comparing the experimental results with the FEA results.

关键词： Stator windings Rotors Magnetic circuits Magnetic flux Power system measurements Density measurement Windings Efficiency map electromagnetic performance modular stator power density radial flux dual-rotor permanent magnet synchronous machine (RFDR-PMSM)

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Current-Driven Bifrequency Resonant Dual Active Bridge Converter for Optimal Battery Charging

IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN INDUSTRIAL E...

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ieee journal OF emerging AND selected topics IN INDUSTRIAL ELECTRONICS 2024年第2期5卷 498-510页

作者： Khan, Warda Matin Singh, Rajeev Kumar Mahanty, Ranjit Indian Inst Technol BHU Varanasi Dept Elect Engn Varanasi 221005 India

This article proposes a current-driven bifrequency resonant dual active bridge converter for efficiently charging a battery in constant current-constant voltage (CC-CV) mode. The novel converter gives the freedom to operate without complex control, while ensuring stable voltage and current regulation to achieve CC-CV charging. In the proposed configuration, the switching states causes the converter to form an equivalent parallel resonant tank which facilitates the proposed converter to behave as a current source and a voltage source using single step change in frequency and thus, offering dual source property at its output. This results in reduction of control complexity and the associated cost. In addition, the problem of input current ripple is eliminated and converter reliability is improved due to replacement of electrolytic capacitor by a resonant film capacitor. The behavior of converter is analyzed through state-plane analysis and trajectory of each interval with the closed form solution is presented. To verify the behavior of the proposed converter a scaled-down 500 W experimental prototype is developed and the results are presented for both CC and CV charging mode.

关键词： Resonant frequency Capacitors Bridge circuits Switches Frequency conversion Batteries Voltage control Constant current-constant voltage (CC-CV) dual active bridge (DAB) optimal battery charging parallel resonant converter

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A Stationary-Frame Residual-Current-Based ITSC Localization Method for Induction Motors Considering Effect of Different Faulty Phase

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ieee journal OF emerging AND selected topics IN POWER ELECTRONICS 2025年第2期13卷 1710-1720页

作者： Ma, Chenwei Zhang, Baojie Song, Wensheng Jia, Zhen Huang, Wenqi Huang, Jingchun Southwest Jiaotong Univ Sch Elect Engn Chengdu 611756 Peoples R China Univ Ghent Dept Electromech Syst & Met Engn B-9000 Ghent Belgium Southwest Jiaotong Univ Sch Integrated Circuits Sci & Engn Chengdu 611756 Peoples R China

The diagnosis of interturn short circuit (ITSC) fault at an incipient stage is of importance for induction motor drives to achieve a reliable operation. Even though a lot of efforts had been made to detect ITSC, the fault localization has not been adequately considered in the existing works. In order to realize a fast ITSC detection and an accurate localization of the faulty phase, which is of benefit for postfault management, this article proposes a low-complexity residual current-based diagnosis method. In the proposed method, current residuals between the predicted and measured currents are obtained by a healthy current prediction model without complex observer. Rather than the conventional methods, which use current residuals in the rotary reference frame, the proposed method explores residuals in the stationary reference frame to construct fault indicators. An important benefit of this method is that it allows a direct transformation of the obtained residuals to the three-phase reference frame. As a result, a fault location indicator can be established simply by the relationship between the three-phase current residuals. A reliable fault localization is then achieved. The effectiveness of the proposed method on ITSC detection and localization has been demonstrated by experimental tests. Moreover, the robustness of the proposed method against variable operating conditions and parameter mismatches is also confirmed.

关键词： Observers Stator windings Location awareness Circuit faults Motors Mathematical models Power electronics Induction motor drives Feature extraction Rotors Fault diagnosis induction motors interturn fault

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A Novel Hypercube-Based Heuristic for Quantum Boolean Circuit Synthesis

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ieee journal on emerging and selected topics in circuits and systems 2022年第3期12卷 648-661页

作者： Jiang, Yu-Chi Tseng, Kuo-Chun Hua, Cheng-Yen Kuo, Shu-Yu Chou, Yao-Hsin Kuo, Sy-Yen Natl Taiwan Univ Dept Elect Engn Taipei 10617 Taiwan Natl Ilan Univ Dept Comp Sci & Informat Engn Yilan 26041 Taiwan Natl Chi Nan Univ Dept Comp Sci & Informat Engn Puli 54561 Taiwan Natl Chung Hsing Univ Dept Comp Sci & Engn Taichung 40227 Taiwan

Quantum computation has extraordinary capabilities for solving complicated problems. As quantum computations are reversible by nature, reversible circuits are important for the development of quantum computation techniques. Designing an effective and efficient method for synthesizing reversible circuits to reduce costs and stabilize circuit efficiency is crucial. The traditional synthesis methods of solving reversible circuits focus on the conversion efficiency rather than discussing the properties of the reversible function. Thus, this paper aims to propose a novel synthesis method that directly and efficiently optimizes reversible circuit synthesis with the properties of the reversible circuit. The proposed method converts the reversible function into a hypercube, allowing visual observations of the overall circuit. Two new indicators, the adjacent Hamming distance (AHD) and total cycle distance (TCD), aid in effective decision-making, generating shorter circuits. Furthermore, we use the generalized Toffoli gate set, which without requiring any additional ancilla bits and has applications in error correction and fault tolerance. The experimental results show that our method can find better solutions than traditional methods, significantly reducing the gate count, while the hypercube assists in synthesizing the reversible circuit.

关键词： Logic gates Hypercubes Quantum computing Circuit synthesis Wires Signal processing algorithms Quantum circuit Quantum computing quantum Boolean circuits reversible circuits synthesis algorithm hypercube generalized Toffoli gate

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S-DIGing: A Stochastic Gradient Tracking Algorithm for Distributed Optimization

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ieee TRANSACTIONS ON emerging topics IN COMPUTATIONAL INTELLIGENCE 2022年第1期6卷 53-65页

作者： Li, Huaqing Zheng, Lifeng Wang, Zheng Yan, Yu Feng, Liping Guo, Jing Southwest Univ Coll Elect & Informat Engn Chongqing Key Lab Nonlinear Circuits & Intelligen Chongqing 400715 Peoples R China Xinzhou Teachers Univ Dept Comp Sci Xinzhou 034000 Peoples R China

In this article, we study convex optimization problems where agents of a network cooperatively minimize the global objective function which consists of multiple local objective functions. The intention of this work is to solve large-scale optimization problems where the local objective function is complicated, and numerous. Different from most of the existing works, the local objective function of each agent is presented as the average of finite instantaneous functions. Integrating the gradient tracking algorithm with stochastic averaging gradient technology, a distributed stochastic gradient tracking (termed as S-DIGing) algorithm is proposed. At each time instant, only one randomly selected gradient of an instantaneous function is computed, and applied to approximate the local batch gradient for each agent. Based on a novel primal-dual interpretation of the S-DIGing algorithm, it is shown that the S-DIGing algorithm linearly converges to the global optimal solution when step-size do not exceed an explicit upper bound, and the instantaneous functions are strongly convex with Lipschitz continuous gradients. Numerical experiments are presented to demonstrate the practicability of the S-DIGing algorithm, and correctness of the theoretical results.

关键词： Optimization Convergence Linear programming Approximation algorithms Stochastic processes Machine learning algorithms Convex functions Distributed optimization gradient tracking stochastic averaging gradient multi-agent systems linear convergence

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An Overview of Processing-in-Memory circuits for Artificial Intelligence and Machine Learning

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ieee journal on emerging and selected topics in circuits and systems 2022年第2期12卷 338-353页

作者： Kim, Donghyuk Yu, Chengshuo Xie, Shanshan Chen, Yuzong Kim, Joo-Young Kim, Bongjin Kulkarni, Jaydeep P. Kim, Tony Tae-Hyoung Korea Adv Inst Sci & Technol KAIST Elect Engn Dept Daejeon 34141 South Korea Nanyang Technol Univ Elect & Elect Engn Dept Singapore 639798 Singapore ASTAR Inst Microelect Singapore 138634 Singapore Univ Texas Austin Elect & Comp Engn Dept Austin TX 78712 USA Natl Univ Singapore Elect & Comp Engn Dept Singapore 119077 Singapore Univ Calif Santa Barbara Elect & Comp Engn Dept Santa Barbara CA 93106 USA

Artificial intelligence (AI) and machine learning (ML) are revolutionizing many fields of study, such as visual recognition, natural language processing, autonomous vehicles, and prediction. Traditional von-Neumann computing architecture with separated processing elements and memory devices have been improving their computing performances rapidly with the scaling of process technology. However, in the era of AI and ML, data transfer between memory devices and processing elements becomes the bottleneck of the system. To address this data movement issue, memory-centric computing takes an approach of merging the memory devices with processing elements so that computations can be done in the same location without moving any data. Processing-In-Memory (PIM) has attracted research community's attention because it can improve the energy efficiency of memory-centric computing systems substantially by minimizing the data movement. Even though the benefits of PIM are well accepted, its limitations and challenges have not been investigated thoroughly. This paper presents a comprehensive investigation of state-of-the-art PIM research works based on various memory device types, such as static-random-access-memory (SRAM), dynamic-random-access-memory (DRAM), and resistive memory (ReRAM). We will present the overview of PIM designs in each memory type, covering from bit cells, circuits, and architecture. Then, a new software stack standard and its challenges for incorporating PIM with the conventional computing architecture will be discussed. Finally, we will discuss various future research directions in PIM for further reducing the data conversion overhead, improving test accuracy, and minimizing intra-memory data movement.

关键词： Computer architecture SRAM cells Standards Software Foundries Dynamic range Transistors Artificial intelligence machine learning processing-in-memory neural networks

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A Model-Data Hybrid Driven Diagnosis Method for Open-Switch Faults in Three-Phase T-Type Grid-Connected Converters

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ieee journal OF emerging AND selected topics IN POWER ELECTRONICS 2024年第4期12卷 3925-3935页

作者： Long, Bo He, ZhongLin Garcia, Cristian Rodriguez, Jose Chong, Kil To Univ Elect Sci & Technol China UESTC Sch Mech & Elect Engn Chengdu 611731 Peoples R China UESTC Yangtze Delta Reg Inst Huzhou Huzhou 313001 Peoples R China Inst Elect & Informat Engn UESTC Dongguan 52380 Guangdong Peoples R China Shenyang Univ Technol MOE Key Lab Special Machine & High Voltage Apparat Shenyang 110870 Peoples R China Univ Talca Fac Engn Dept Elect Engn Curico 3340000 Chile Univ Andres Bello Fac Engn Santiago 8370146 Chile Jeonbuk Natl Univ Dept Elect & Informat Engn Jeonju 54896 South Korea

With the widespread application of three-level T-type converters (3LT(2)Cs), fault diagnosis has become increasingly important. Existing diagnostic methods can be divided into two types: model-driven and data-driven. Model-driven diagnosis is fast and accurate, but defining diagnosis rules can be complicated and difficult, making it less feasible. On the other hand, using artificial neural networks (ANNs) for fault diagnosis is relatively easier, but it requires heavy calculations and a long diagnosis time. To combine the advantages of both methods, this article proposes a model-data hybrid-driven diagnosis method for open-circuit faults in 3LT(2)C. First, a model is constructed based on the circuit topology. Second, the input and output parameters of the neural network are determined. Finally, the constructed back-propagation neural network (BPNN) is trained using experimental data, based on which a three-layer BP neural network with three inputs and 13 outputs is constructed to achieve open-circuit fault diagnosis. The effectiveness of the proposed fault diagnostic algorithms is verified through experimental results.

关键词： Circuit faults Fault diagnosis Bridge circuits Integrated circuit modeling Topology Switches Costs Artificial neural network (ANN) fault diagnosis model-data hybrid driven three-level T-type converter (3LT(2)C)

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Cascade Hybrid Decoupling Control Scheme for Synchronous Reluctance Motor Current Dynamic With Adaptive Backstepping Disturbance Compensation

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ieee journal OF emerging AND selected topics IN POWER ELECTRONICS 2023年第5期11卷 4595-4605页

作者： Ren, Linjie Ren, Sizhe Wang, Huan Zhao, Yuanzhe Xu, Junqi Zhong, Zhihua Tsinghua Univ Sch Vehicle & Mobil Beijing 100084 Peoples R China Tongji Univ Key Lab Rd & Traff Engn State Minist Educ Shanghai 201804 Peoples R China Tongji Univ Inst Rail Transit Shanghai 201804 Peoples R China Tongji Univ Natl Maglev Transportat Engn Res & Dev Ctr Shanghai 200092 Peoples R China Chinese Acad Engn Beijing 100088 Peoples R China

The performance of synchronous reluctance motor (SynRMs) is strongly dependent on the current loop dynamic characteristics. However, existing drawbacks in simplifying the nonlinear behaviors restrict the complete decoupling of the dynamics, inducing current overshoot and oscillation. In this article, a cascade hybrid decoupling control scheme is proposed to mitigate the negative effects of magnetic circuit nonlinearity (MCN) on current dynamics. A nonlinear model is first established to describe the current dynamics with considerations of MCN. Then, the coupling mechanism between dq-axis current dynamics is classified and analyzed. The dynamic decoupling condition is derived involving both back electromagnetic force (EMF) and cross-induced electromotive force. Furthermore, an adaptive backstepping current controller is presented to cope with changes in operating point caused by self-saturation. Uncertainties caused by model errors and unmeasurable disturbances are adaptively compensated. Comprehensive experimental results demonstrate that the proposed scheme could reduce torque and current ripple while improving response performance.

关键词： Inductance Couplings Vehicle dynamics Backstepping Adaptation models Magnetic circuits Integrated circuit modeling Current dynamics model decoupling strategy self-saturation controller synchronous reluctance motor (SynRM)

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