The proceedings contain 57 papers. The topics discussed include: design tools and circuit solutions for degradation-resilient analog circuits in nanometer CMOS;cognitive self-adaptive computing and communication syste...
ISBN:
(纸本)9781424433391
The proceedings contain 57 papers. The topics discussed include: design tools and circuit solutions for degradation-resilient analog circuits in nanometer CMOS;cognitive self-adaptive computing and communication systems: test, control and adaptation;a scheme of logic self repair including local interconnects;comparison of different test strategies on a mixed-signal circuit;analysis and optimization of ring oscillator using sub-feedback scheme;improve clock gating through power-optimal enable function selection;an efficient fault simulation technique for transition faults in non-scan sequential circuits;self-timed full adder designs based on hybrid input encoding;asynchronous two-level logic of reduced cost;architecture model for approximate palindrome detection;and packet header analysis and field extraction for multigigabit networks.
The proceedings contain 30 papers. The topics discussed include: reliability-aware multi-vth domain digital design assessment;replication-based deterministic testing of 2-dimensional arrays with highly interrelated ce...
ISBN:
(纸本)9781538657546
The proceedings contain 30 papers. The topics discussed include: reliability-aware multi-vth domain digital design assessment;replication-based deterministic testing of 2-dimensional arrays with highly interrelated cells;contribution to automated generating of system power-management specification;a rare event based yield estimation methodology for analog circuits;two-stage bulk-driven variable gain amplifier for low-voltage applications;heuristic for page-based incremental reprogramming of wireless sensor nodes;tuning stochastic space compaction to faster-than-at-speed test;constraint-based pattern retargeting for reducing localized power activity during testing;and an integrated phase shifting frequency synthesizer for active electronically scanned arrays.
The proceedings contain 83 papers. The topics discussed include: self-repairing and tuning reconfigurable electronics for space;safety features of SOCs: how can they be re-used?;formal verification meets robustness ch...
ISBN:
(纸本)9781424466139
The proceedings contain 83 papers. The topics discussed include: self-repairing and tuning reconfigurable electronics for space;safety features of SOCs: how can they be re-used?;formal verification meets robustness checking - techniques and challenges;ensuring high testability without degrading security;advanced embedded memory testing: reducing the defect per million level at lower test cost;automated simulation-based verification of power requirements for systems-on-chips;noise determination of a current conveyor in an inverting voltage amplifier configuration;utilizing the bulk-driven technique in analog circuit design;instruction reliability analysis for embedded processors;self-adaptive mechanism for cache memory reliability improvement;reconfigurable hardware objects for image processing on FPGAS;modern fault tolerant architectures based on partial dynamic reconfiguration in FPGAs;and the novel approach to wideband RFIC receivers in standard CMOS process.
The proceedings contain 85 papers. The topics discussed include: optimized embedded memory diagnosis;optimized march test flow for detecting memory faults in SRAM devices under bit line coupling;statistical analysis o...
ISBN:
(纸本)9781424497560
The proceedings contain 85 papers. The topics discussed include: optimized embedded memory diagnosis;optimized march test flow for detecting memory faults in SRAM devices under bit line coupling;statistical analysis of 6T SRAM data retention voltage under process variation;decreasing test time by scan chain reorganization;a memetic algorithm for computing 3D capacitance in multiconductor VLSI circuits;max-fill: a method to generate high quality delay tests;measurement point selection for in-operation wear-out monitoring;validation and optimization of TMR protections for circuits in radiation environments;test vector overlapping based compression tool for narrow test access mechanism;comparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies;advanced fault tolerant bus for multicore system implemented in FPGA;and low-power quadrature VCO design for medical implant communication service.
The proceedings contain 63 papers. The topics discussed include: hardware-software co-visualization: developing systems in the holodeck;approximate computing for energy-efficient error-resilient multimedia systems;int...
ISBN:
(纸本)9781467361361
The proceedings contain 63 papers. The topics discussed include: hardware-software co-visualization: developing systems in the holodeck;approximate computing for energy-efficient error-resilient multimedia systems;interpolation-based model checking for efficient incremental analysis of software;cross-layer resilient system design;hardware acceleration in computer networks;fault-based attacks on cryptographic hardware;exploring processor parallelism: estimation methods and optimization strategies;on design of priority-driven load-adaptive monitoring-based hardware for managing interrupts in embedded event-triggered real-time systems;on the on-line functional test of the reorder buffer memory in superscalar processors;fault collapsing of multi-conditional faults;and efficient automated speedpath debugging.
The proceedings contain 78 papers. The topics discussed include: 3D integration: opportunities, design challenges and approaches;asynchronous circuit design: from basics to practical applications;automated synthesis a...
ISBN:
(纸本)9781467311854
The proceedings contain 78 papers. The topics discussed include: 3D integration: opportunities, design challenges and approaches;asynchronous circuit design: from basics to practical applications;automated synthesis and design error repair of systems;fault management in an ieee PI687 (IJTAG) environment;design methodology for fault tolerant ASICs;selective redundancy to improve reliability and to slow down delay degradation due to gate oxide breakdown;synthesis of petri nets into FPGA with operation flexible memories;an evaluation of the application dependent FPGA test method;AGATE - towards designing a low-power chip multithreading processor for mobile software defined radio systems;improving the iterative power of resynthesis;NAND/NOR gate polymorphism in low temperature environment;and current sensing completion detection in dual-rail asynchronous systems.
The proceedings contain 59 papers. The topics discussed include: TPG for crosstalk faults between on-chip aggressor and victim using genetic algorithms;LFSR reseeding based test compression respecting different contro...
ISBN:
(纸本)9781479967803
The proceedings contain 59 papers. The topics discussed include: TPG for crosstalk faults between on-chip aggressor and victim using genetic algorithms;LFSR reseeding based test compression respecting different controllability of decompressor outputs;compiler-centred microprocessor design (CoMet) - from C-code to a VHDL model of an ASIP;a design for the 178-MHz WXGA 30-fps optical flow processor based on the HOE algorithm;design-for-diagnosis architecture for power switches;a novel compact dual-band bandpass waveguide filter;fully differential difference amplifier for low-noise applications;SystemC-based loose models for simulation speed-up by abstraction of RTL IP cores;NoCDepend: a flexible and scalable dependability technique for 3D networks-on-chip;a synchronous mirror delay with duty-cycle tunable technology;triangular modulation using switched-capacitor scheme for spread-spectrum clocking;and application of evolutionary algorithms for regression suites optimization.
The proceedings contain 45 papers. The topics discussed include: system-level reliability evaluation through cache-aware software-based fault injection;a fault injection platform for the analysis of soft error effects...
ISBN:
(纸本)9781509024674
The proceedings contain 45 papers. The topics discussed include: system-level reliability evaluation through cache-aware software-based fault injection;a fault injection platform for the analysis of soft error effects in FPGA soft processors;comparison of gate-driven and bulk-driven current mirror topologies;multi-objective BDD optimization for RRAM based circuit design;FPGA architecture of multi-codeword LDPC decoder with efficient BRAM utilization;a general approach for comparing metastable behavior of digital CMOS gates;hardware implementation of a medium access control layer for industrial wireless LAN;comparative BTI analysis for various sense amplifier designs;impedance calculation based method for ac fault analysis of mixed-signal circuits;co-design of CML IO and interposer channel for low area and power signaling;bioSoC: highly integrated system-on-chip for health monitoring;an effective approach for functional test programs compaction;sequential test decompressors with fast variable wide spreading;built-in self-repair architecture generator for digital cores;and early-stage verification of power-management specification in low-power systemsdesign.
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