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检索条件"任意字段=IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems"
4789 条 记 录,以下是1-10 订阅
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Proceedings - 21st ieee International symposium on design and diagnostics of electronic circuits and systems, DDECS 2018
Proceedings - 21st IEEE International Symposium on Design an...
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21st ieee International symposium on design and diagnostics of electronic circuits and systems, DDECS 2018
The proceedings contain 30 papers. The topics discussed include: reliability-aware multi-vth domain digital design assessment;replication-based deterministic testing of 2-dimensional arrays with highly interrelated ce...
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Foreword to the special issue on 20th ieee international symposium on design and diagnostics of electronic circuits and systems (DDECS2017)
Foreword to the special issue on 20th IEEE international sym...
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作者: Zoran, Stamenkovic Ondrej, Novak Witold, Pleskacz
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Foreword to the special issue on 20th ieee international symposium on design and diagnostics of electronic circuits and systems (DDECS2017)
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MICROelectronicS RELIABILITY 2018年 81卷 287-287页
作者: Stamenkovic, Zoran Novak, Ondrej Pleskacz, Witold
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Proceedings - 2024 27th International symposium on design and diagnostics of electronic circuits and systems, DDECS 2024
Proceedings - 2024 27th International Symposium on Design an...
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27th International symposium on design and diagnostics of electronic circuits and Sytems, DDECS 2024
The proceedings contain 28 papers. The topics discussed include: evaluating the reliability of integer multipliers with respect to permanent faults;a ML-based approach for finding the product definition space of micro...
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Proceedings - 2023 26th International symposium on design and diagnostics of electronic circuits and systems, DDECS 2023
Proceedings - 2023 26th International Symposium on Design an...
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26th International symposium on design and diagnostics of electronic circuits and systems, DDECS 2023
The proceedings contain 35 papers. The topics discussed include: evaluating the hardware performance counters of an Xtensa virtual prototype;data-driven test generation for black-box systems from learned decision tree...
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Proceedings - 2022 25th International symposium on design and diagnostics of electronic circuits and systems, DDECS 2022
Proceedings - 2022 25th International Symposium on Design an...
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25th International symposium on design and diagnostics of electronic circuits and systems, DDECS 2022
The proceedings contain 30 papers. The topics discussed include: towards polynomial formal verification of complex arithmetic circuits;dependability of alternative computing paradigms for machine learning: hype or hop...
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QDI Binary Comparator Networks and their Application in Combinational Logic  27
QDI Binary Comparator Networks and their Application in Comb...
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27th International symposium on design & diagnostics of electronic circuits & systems (DDECS)
作者: Huemer, Florian TU Wien Inst Comp Engn Vienna Austria
Binary comparator networks have already been used in quasi delay-insensitive (QDI) circuit design for the construction of completion detectors. This paper demonstrates how they can also be utilized to implement a wide... 详细信息
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Adaptive Input Normalization for Quantized Neural Networks  27
Adaptive Input Normalization for Quantized Neural Networks
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27th International symposium on design & diagnostics of electronic circuits & systems (DDECS)
作者: Schmidt, Jan Fiser, Petr Skrbek, Miroslav Czech Tech Univ Dept Digital Design Prague Czech Republic
Neural networks with quantized activation functions cannot adapt the quantization at the input of their first layer. Preprocessing is therefore required to adapt the range of input data to the quantization range. Such... 详细信息
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The Impact of Well-Edge Proximity Effect on PMOS Threshold Voltage in Various Submicron CMOS Technologies  27
The Impact of Well-Edge Proximity Effect on PMOS Threshold V...
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27th International symposium on design & diagnostics of electronic circuits & systems (DDECS)
作者: Grochowska, Marika Pleskacz, Witold A. Cadence Design Syst Ul Emili Plater 28 PL-00688 Warsaw Poland Warsaw Univ Technol Inst Microelect & Optoelect Ul Koszykowa 75 PL-00662 Warsaw Poland
This paper explains the background of the well-edge proximity effect (WPE) and sums up its impact on pMOS threshold voltage (V-th) in the following CMOS technologies: 65nm (bulk), 40nm (bulk) from two different vendor... 详细信息
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A Comparison of Logic Extraction Methods in Hardware-Translated Neural Networks  27
A Comparison of Logic Extraction Methods in Hardware-Transla...
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27th International symposium on design & diagnostics of electronic circuits & systems (DDECS)
作者: Schmidt, Jan Fiser, Petr Skrbek, Miroslav Czech Tech Univ Dept Digital Design Prague Czech Republic
Small quantized neural networks with strong requirements on throughput and latency can be translated into logic circuits and synthesized by logic design tools. With networks having no state (memory), the circuits are ... 详细信息
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