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检索条件"任意字段=IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems"

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A Practical and design oriented approach to teaching circuits

A Practical and Design oriented approach to teaching circuit...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： Silva-Martinez, Jose Onabajo, Marvin Mayhugh, Ayesha Texas A&M Univ College Stn TX 77843 USA Northeastern Univ Boston MA 02115 USA Texas Instruments Inc Dallas TX USA

ISBN: (纸本)9781665484855

Teaching analog circuits courses in the current digital era is a significant challenge for instructors. The mathematics needed for the first course on electronics is basic and the analyses are not complicated either. However, it typically requires conceptual understanding and intuition that has to be conveyed in order to avoid frustration during the assembly and testing of amplifiers in the lab, especially when students design them from scratch. A number of excellent textbooks are available that cover the theory, but it is difficult to find compelling literature that extends this knowledge to practical applications. In this paper, basic amplifier theory is revisited and with attention to considerations related to non-idealities and variations. The concept of sensitivity and its use is emphasized as well as, using the benefits of source/emitter degeneration as an example. It is shown that this degeneration indeed corresponds to an effective negative feedback mechanism that improves linearity and accuracy in addition to increasing the amplifier input impedance, all at the expense of reduced voltage gain.

关键词： electronics design of electronic amplifiers amplifier sensitivity design for robustness

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Fault Diagnosis of Analog circuits Based on Multi-Scale 1D Convolutional Neural Network 32

Fault Diagnosis of Analog Circuits Based on Multi-Scale 1D C...

引用

32nd ieee Asian Test symposium (ATS)

作者： Wang, Weiwei Zhang, Yongchao You, Feng Yin, Zhigang Zhao, Ruilian Beijing Univ Chem Technol Beijing Peoples R China Chinese Acad Sci Inst Automat Beijing Peoples R China

ISBN: (纸本)9798350303100

Analog circuit is an important component of modern electronic systems. However, the soft fault diagnosis of analog circuits is challenging due to their large parameter variability and complex internal structure. So, this paper proposes an automatic fault diagnosis method based on Multi-Scale 1D Convolutional Neural Network (MS-1D-CNN) for analog circuits. Considering that faults may disappear or weaken during the propagation process and cannot be manifested in the output signals, the fault diagnosis model is trained and constructed based on an optimum set of test points with the maximum degree of fault isolation and least test points. Furthermore, because the data at different test points and time periods have different influences on fault diagnosis, a mixed attention mechanism combining both channel and spatial attention is adopted to extract more critical information in the fault diagnosis model, achieving a more accurate soft fault diagnosis for analog circuits. Experiments are conducted on four widely used benchmark circuits. The results show that our method has higher accuracy of fault diagnosis than the existing methods, and the fault diagnosis model based on multi-test points data has higher accuracy than that solely based on the output signals for analog circuits.

关键词： Analog circuit fault diagnosis multi-scale convolution mixed attention mechanism multi-test points

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A Low-Power Level-2 Discrete Haar Wavelet Transform with Approximate Adders for ECG Signal 16

A Low-Power Level-2 Discrete Haar Wavelet Transform with App...

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16th ieee Latin American symposium on circuits and systems, LASCAS 2025

作者： Seidel, Henrique Da Rosa, Morgana Lopes, Rodrigo Da Costa, Eduardo Soares, Rafael Graduate Program on Computing Pelotas Brazil Graduate Program on Electronic Engineering and Computing Pelotas Brazil

ISBN: (纸本)9798331522124

We present an energy-efficient implementation of the level-2 Pruned Discrete Haar Wavelet Transform (PDHWT-2) for R-peak detection in ECG signals. Approximate computing techniques were employed, including five well-established approximate adders (AxPPA, COPY, ETA-I, LOA, and Trunc) and bit truncation (T), to reduce energy consumption while maintaining accuracy above 99% for reliable R-peak detection. By focusing on the second-level detail coefficient (D2) for peak detection and pruning the approximation coefficient, the PDHWT-2 design achieves significant reductions in computational complexity. The architecture, evaluated with ECG signals from the MIT-BIH database, maintained accuracy above 99% even with aggressive bit truncation and approximation, ensuring reliable medical-grade analysis. Integration of approximate adders (AxAs) and truncation enabled significant power and area savings. Specifically, the use of the AxPPA demonstrated power savings of up to 40% with area reductions of around 45%, making the PDHWT-2 a highly efficient solution for low-power ECG monitoring systems. © 2025 ieee.

关键词： Image reconstruction

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Duality and resonance in RLC–circuits. Exact formulas for phase, amplitude resonance and bandwidth

Duality and resonance in RLC–circuits. Exact formulas for p...

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ieee design and diagnostics of electronic circuits and systems (DDECS)

作者： Daniel Blokhin Institute of Engineering and Information Technologies Kyiv National University of Technologies and Design Kyiv Ukraine

ISBN: (数字)9798331528010

ISBN: (纸本)9798331528027

The paper is devoted to the study of two-terminal electric circuits consisting of three elements - a resistor, a capacitor, and an inductor. There are eight different possible combinations of such circuits. We apply a standard and nonstandard duality (frequency duality). In this way, all possible circuits are divided into three groups: (2+ 2 +4). The first pair of circuits is extensively covered in most electrical engineering textbooks. The second pair is not interesting from the frequency point of view. We investigate in detail a third group of four circuits, which, by suitable substitution of variables, bring the finding of their frequency characteristics to the study of a single function. For them we find exact formulas for the frequency of phase resonance and amplitude resonance. The values of the minimum (maximum) amplitude at the corresponding resonance frequencies are found. Exact and approximate formulas for the cut-off frequency and bandwidth of the passband-stopband transition are derived.

关键词： Resistors circuits Resonant frequency RLC circuits Bandwidth Linear circuits Resonance Inductors Standards electronic circuits

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Millimeter-wave GaAs Rectifier with Differential Signal 4:1 Power Combiner for Simultaneous Wireless Information and Power Transmission 16

Millimeter-wave GaAs Rectifier with Differential Signal 4:1 ...

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16th ieee Latin American symposium on circuits and systems, LASCAS 2025

作者： Kikuchi, Masayuki Ide, Michihiro Mayeda, Jill Kato, Sena Yuasa, Keito Okada, Kenichi Shirane, Atsushi Institute of Science Tokyo Dept. Electrical and Electronic Engineering 2-12-1-S3-28Ookayama Meguro-ku Japan

ISBN: (纸本)9798331522124

This paper presents a rectifier with a power combiner for a millimeter-wave wireless power transmission system. The proposed circuit uses a diode fabricated in a 0.1 um GaAs process for rectification and mixing, and a metal layer create a transformer to synthesize the power. The rectifier and power synthesizer are integrated into a single chip. The chip has four input ports for 24 GHz WPT differential signals and 25 GHz RF differential signals, and one output port for DC and 1 GHz IF single-ended signals. The DC output can operate with a 100Ω load. For power generation, the most efficient DC conversion is achieved at 25.4GHz signal, where with a total input power of 26.2 dBm, DC conversion efficiency is 10.8%. The maximum DC power obtained is 51.8mW. As a mixer, it achieves a down-conversion gain of -15.6 dB. © 2025 ieee.

关键词： Antenna phased arrays

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EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC design 24

EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven I...

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24th International symposium on design and diagnostics of electronic circuits and systems (DDECS)

作者： Nagy, Lukas Arbet, Daniel Kovac, Martin Potocny, Miroslav Sovcik, Michal Stopjakova, Viera Slovak Univ Technol Bratislava Fac Elect Engn & Informat Technol Inst Elect & Photon Bratislava Slovakia

ISBN: (纸本)9781665435956

The paper addresses a development and evaluation of well-known EKV MOS transistor model with focus on the ultra low-voltage / ultra low-power analog IC design employing rather "exotic" bulk-driven technique. The presented contribution can be viewed as an extension of already established compact simulation model with modifications to the original parameter extraction flow. The article contains a brief description of EKV model fundamentals, a novel parameter extraction flow and most importantly, the comparison of developed EKV model with the foundry-provided BSIM model (v3.3) and the experimental measurement data obtained from prototype chip samples fabricated in 130 nm CMOS technology.

关键词： Bulk-Driven Ultra Low-Voltage Low-Power EKV Model Analog IC design

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Exploring Approximate Adders for Accuracy- and Energy-Quality VLSI Watermarking systems design 16

Exploring Approximate Adders for Accuracy- and Energy-Qualit...

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16th ieee Latin American symposium on circuits and systems, LASCAS 2025

作者： Da Rosa, Morgana Da Costa, Eduardo Soares, Rafael Graduate Program on Computing Pelotas Brazil Graduate Program on Electronic Engineering and Computing Pelotas Brazil

ISBN: (纸本)9798331522124

Approximate computing (AxC) has emerged as a viable alternative to enhance computational efficiency by leveraging the intrinsic error resilience of many applications. One of the leading strategies of AxC involves exploring different approximation adder (AxA) configurations as a viable form of reducing power consumption in many applications. This work explores the use of AxAs in a hybrid watermarking technique that combines discrete Haar-Wavelet (DHWT) and discrete cosine transforms (DCT). The proposed hybrid method, HyDHWCT, integrates these transforms to improve robustness and imperceptibility in watermarking systems while optimizing for energy efficiency. We evaluate the performance of various AxAs, including Copy, ETA, LOA, Truncation (Trunc), VLSPPAs, and the AxPPA, regarding energy consumption, circuit area, and error resilience. Our results demonstrate that the AxPPA-based HyDHWCT offers superior accuracy and energy-quality trade-offs over other state-of-the-art AxAs. Specifically, the AxPPA on HyDHWCT with K = 1 achieves up to 72.85% energy savings and 88.32% area savings compared to the exact HyDHWCT while maintaining high accuracy, with a normalized cross-correlation (NC) of 0.9949 and a structural similarity (SSIM) of 0.9920 for the extracted watermark. These results make the AxPPA-based HyDHWCT a highly effective solution for robust and energy-efficient watermarking systems. © 2025 ieee.

关键词： Energy efficiency

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Domain-Specific design Abstraction with Emphasis on Neural Networks

Domain-Specific Design Abstraction with Emphasis on Neural N...

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ieee design and diagnostics of electronic circuits and systems (DDECS)

作者： Maryam Rajabalipanah Zahra Hojati Zahra Jahanpeima Zainalabedin Navabi School of Electrical and Computer Engineering College of Engineering University of Tehran Tehran Iran

ISBN: (数字)9798331528010

ISBN: (纸本)9798331528027

The increasing complexity in digital system design has introduced significant challenges, particularly in maintaining productivity relative to the rapid advancement of technology. This paper addresses the issue by presenting a new level of abstraction, termed Data Transaction Level (DTL), which operates at a higher level than the traditional Register Transfer Level (RTL). The proposed DTL design methodology draws inspiration from RTL but is tailored for the growing complexity of modern systems, particularly in neural network implementations. As neural networks are becoming essential in various applications, this paper applies the DTL methodology to hardware implementations of these networks. A SystemC-based hardware description language is introduced to facilitate the design process. The results section evaluates the effectiveness of the proposed methodology, highlighting increased productivity using the new abstraction and description language.

关键词： Productivity Industries Digital systems design methodology Neural networks Register transfer level Hardware Complexity theory Hardware design languages electronic circuits

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A Comparison of Logic Extraction Methods in Hardware-Translated Neural Networks

A Comparison of Logic Extraction Methods in Hardware-Transla...

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ieee design and diagnostics of electronic circuits and systems (DDECS)

作者： Jan Schmidt Petr Fišer Miroslav Skrbek Dept. of Digital Design CTU in Prague Prague Czech Republic

Small quantized neural networks with strong requirements on throughput and latency can be translated into logic circuits and synthesized by logic design tools. With networks having no state (memory), the circuits are combinational. To capture the function of the network (or a part of it) as a logic function, two approaches have been taken. The first one observes the inputs and outputs, while the network predicts a training set, and uses them directly as specification. The response to activation values that have not occurred in the training set remains unspecified. The other approach uses a complete set of activation values at the input of the examined part. We measured accuracy, the influence of logic minimization, and their impact on the final synthesized circuit on dense neural networks in different stages of low-magnitude pruning on the MNIST and JSC datasets. The results show that the first method can be used for functions with fan-in below 10–12 while not working against generalization. We also document the quantitative changes in quantized networks.

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Analysis of State Corruption caused by Permanent Faults in WCHB-based Quasi Delay-Insensitive Pipelines 24

Analysis of State Corruption caused by Permanent Faults in W...

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24th International symposium on design and diagnostics of electronic circuits and systems (DDECS)

作者： El Shehaby, Raghda Steininger, Andreas TU Wien Inst Comp Engn Vienna Austria

ISBN: (纸本)9781665435956

Quasi delay-insensitive asynchronous circuits have the appealing property of stopping further operation in case of a permanent fault. This fail-stop behavior makes them attractive for on-line repair: after removal of the permanent fault, the circuit can, ideally, continue operating without the need for state recovery. However, it has been shown that in certain cases the state may get corrupted before the operation actually stops. In this paper we use the example of a weak-conditioned half-buffer template to investigate more closely which situations can lead to such state corruption. We explore implementation variants like double completion detection to mitigate that undesired effect. Based on extensive gate-level simulation experiments we quantify the probability for state corruption seen in the different circuits and identify the relevant dependences. As it turns out, the proposed extensions can reduce, but not completely eliminate, the risk of state corruption. At the same time detection of illegal code words promises to have great potential for countermeasures.

关键词： permanent faults QDI circuits WCHB fault injection

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