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检索条件"任意字段=IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems"
4789 条 记 录,以下是201-210 订阅
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A Rule-Based Approach for Minimizing Power Dissipation of Digital circuits  19
A Rule-Based Approach for Minimizing Power Dissipation of Di...
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ieee 19th International symposium on design and diagnostics of electronic circuits & systems (DDECS)
作者: Das, Subrata Dasgupta, Parthasarathi Fiser, Petr Ghosh, Sudip Das, Dehesh Kumar Jadavpur Univ Dept Comp Sci & Engn Kolkata India Indian Inst Management Calcutta MIS Grp Kolkata India Czech Tech Univ Fac Informat Technol Prague Czech Republic IIEST Sch VLSI Technol Sibpur Howrah India
Minimization of power dissipation of VLSI circuits is one of the major concerns of recent digital circuit design primarily due to the ever decreasing feature sizes of circuits, higher clock frequencies and larger die ... 详细信息
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Two-level logic synthesis for low power based on new model of power dissipation
Two-level logic synthesis for low power based on new model o...
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10th ieee International Workshop on design and diagnostics of electronic circuits and systems
作者: Brzozowski, I. Kos, A. AGH Univ Sci & Technol Al Mickiewicza 30 PL-30059 Krakow Poland
Accurate analysis of CMOS gate power dissipation shows that amount of consumed energy depends on a reason of the gate switching. Number of activated inputs and type of applied signals have an influence on dynamic powe... 详细信息
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Reliable Execution of Statechart-Generated Correct Embedded Software under Soft Errors  17
Reliable Execution of Statechart-Generated Correct Embedded ...
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ieee 17th International symposium on design and diagnostics of electronic circuits and systems (DDECS)
作者: Ferreira, Ronaldo R. Klotz, Thomas Voertler, Thilo da Roltl, Jean Nazar, Gabriel L. Moreira, Alvaro F. Carro, Luigi Einwich, Karsten Univ Fed Rio Grande do Sul Inst Informat Porto Alegre RS Brazil Fraunhofer Inst Integrated Circuits Dresden Germany
This paper proposes a design methodology for fault-tolerant embedded systems development that starts from software specification and goes down to hardware execution. The proposed design methodology uses formally verif... 详细信息
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A Scalable Technique to Identify True Critical Paths in Sequential circuits  20
A Scalable Technique to Identify True Critical Paths in Sequ...
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20th ieee International symposium on design and diagnostics of electronic circuits and systems (DDECS)
作者: Ubar, Raimund Kostin, Sergei Jenihhin, Maksim Raik, Jaan Tallinn Univ Technol Tallinn Estonia
The recent advancements in the implementation technologies have brought to the front a wide spectrum of new defect types and reliability phenomena. The conventional design techniques do not cope with the integration c... 详细信息
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Defect-Oriented Module-Level Fault Diagnosis in Digital circuits
Defect-Oriented Module-Level Fault Diagnosis in Digital Circ...
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14th ieee International symposium on design and diagnostics of electronic circuits and systems (DDECS)
作者: Kostin, Sergei Ubar, Raimund Raik, Jaan Tallinn Univ Technol Dept Comp Engn Tallinn Estonia
We propose a hierarchical approach for physical defect diagnosis in combinational or full scan-path digital circuits represented as module networks. As modules we may consider arbitrary subcircuits or library componen... 详细信息
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A design for the 178-MHz WXGA 30-fps Optical Flow Processor Based on the HOE Algorithm  18
A Design for the 178-MHz WXGA 30-fps Optical Flow Processor ...
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ieee 18th International symposium on design and diagnostics of electronic circuits and systems (DDECS)
作者: Matsumura, Tetsuya Kurokawa, Aoi Imamura, Kousuke Matsuda, Yoshio Nihon Univ Coll Engn Koriyama Fukushima Japan Kanazawa Univ Coll Sci & Engn Kanazawa Ishikawa Japan
We propose an optical flow processor, which allows real-time processing of WXGA 30-fps at 178.3 MHz. By introducing the SOR method and a pipeline operation for the Gauss-Seidel method to the iterative flow calculation... 详细信息
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Boolean Difference Technique for Detecting All Missing Gate Faults in Reversible circuits.  18
Boolean Difference Technique for Detecting All Missing Gate ...
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ieee 18th International symposium on design and diagnostics of electronic circuits and systems (DDECS)
作者: Mondal, Joyati Mondal, Bappaditya Kole, Dipak Rahaman, Hafizur KDas, Debesh Jadavpur Univ Dept Comp Sci & Engg Kolkata 32 India Indian Inst Engn Sci & Technol Dept Comp Sci & Engg Sibpur India
Quantum reversible circuit is a new emerging technology attracting the researchers. A reversible circuit is composed of reversible gates only. A reversible Toffoli gate has two components - the control and the target.... 详细信息
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An Indirect Technique for Estimating Reliability of Analog and Mixed-Signal systems during Operational Life
An Indirect Technique for Estimating Reliability of Analog a...
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ieee 16th International symposium on design and diagnostics of electronic circuits and systems (DDECS)
作者: Khan, Muhammad Aamir Kerkhoff, Hans G. Univ Twente Testable Design & Test Integrated Syst TDT Grp Ctr Telemat & Informat Technol CTIT NL-7500 AE Enschede Netherlands
Reliability of electronic systems has been thoroughly investigated in literature and a number of analytical approaches at the design stage are already available via examination of the circuit-level reliability effects... 详细信息
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design of a True Random Number Generator Based on Low Power Oscillator with Increased Jitter  22
Design of a True Random Number Generator Based on Low Power ...
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22nd ieee International symposium on design and diagnostics of electronic circuits and systems (DDECS)
作者: Derlecki, Mariusz Siwiec, Krzysztof Narczyk, Pawel Pleskacz, Witold A. Warsaw Univ Technol Inst Microelect & Optoelect Ul Koszykowa 75 PL-00662 Warsaw Poland
This paper presents the design of an oscillator-based true random number generator. The operation of the presented TRNG architecture is based on sampling a high-frequency oscillator output with a clock generated by a ... 详细信息
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FITTest_BENCH06:: A new set of benchmark circuits reflecting testability properties
FITTest_BENCH06:: A new set of benchmark circuits reflecting...
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9th ieee Workshop on design and diagnostics of electronic circuits and systems
作者: Pecenka, Tomas Kotasek, Zdenek Sekanina, Lukas Brno Univ Technol Fac Informat Technol Bozetechova 2 Brno 61266 Czech Republic
In the paper, the FITTest-BENCH06 set of synthetic benchmark circuits Is presented for the evaluation of diagnostic methods and tools. The structure of benchmark circuits together with their diagnostic properties is d... 详细信息
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