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检索条件"任意字段=IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems"
4883 条 记 录,以下是3921-3930 订阅
排序:
An ALU design using a novel asynchronous pipeline architecture
An ALU design using a novel asynchronous pipeline architectu...
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ieee International symposium on circuits and systems (ISCAS)
作者: Tin-Yau Tang Chiu-Sing Choy J. Butas Cheong-Fat Chan Department of Electronic Engineering Chinese University of Hong Kong Hong Kong China
This paper presents a design of a 16-bit pipeline ALU. The ALU is implemented by using a novel asynchronous pipeline architecture. The architecture has simple handshake cells and these cells are embedded in the pipeli... 详细信息
来源: 评论
A multiplier-free fixed-task digital CNN array for video segmentation system
A multiplier-free fixed-task digital CNN array for video seg...
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ieee International symposium on circuits and systems (ISCAS)
作者: A. Paasio J. Paakkulainen J. Isoaho Electronic Circuit Design Laboratory Helsinki University of Technology Finland Laboratory of Electronics and Information Technology University of Turku Finland
In this paper an alternative approach is given for implementing a fixed template cellular nonlinear network processor. The new concept is based on calculations in the digital domain to achieve accuracy not easily avai... 详细信息
来源: 评论
An objective measure of digital system design quality
An objective measure of digital system design quality
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ieee International symposium on Quality electronic design
作者: D. Protheroe F. Pessolano School of Electrical Electronic & Information EngineeringCentre for Concurrent Systems South Bank University London UK School of Computing Information Systems & MathematicsCentre for Concurrent Systems South Bank University London UK
This paper proposes a method for defining the quality of a digital system in terms of measurable parameters of both the specification and a subsequent implementation of the design. Initially, software quality metrics ... 详细信息
来源: 评论
A lattice-based adaptive IIR notch filter and its application to FSK demodulation
A lattice-based adaptive IIR notch filter and its applicatio...
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ieee International symposium on circuits and systems (ISCAS)
作者: S. Nishimura M. Aloys Department of Electronic and Control Systems Engineering Shimane University Japan
In this paper, an application of a simplified second-order lattice-based adaptive IIR notch filter to binary FSK demodulation is presented. The design method and performance evaluation of the demodulator, based on mea... 详细信息
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A parameterised block-level layout generation system for CMOS analog ICs
A parameterised block-level layout generation system for CMO...
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ieee International symposium on circuits and systems (ISCAS)
作者: P.B. Wu R.J. Mack R.E. Massara Department of Electronic Systems Engineering University of Essex Colchester UK
This paper presents a full-custom building-block layout generation system that substantially improves the process of analog IC design automation. The tool generates layout for primitive devices and building blocks. An... 详细信息
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On synthetic benchmark generation methods
On synthetic benchmark generation methods
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ieee International symposium on circuits and systems (ISCAS)
作者: P. Verplaetse J. Van Campenhout D. Stroobandt Department of Electronics and Information Systems Ghent University Belgium Universiteit Gent Gent BE
In the process of designing complex chips and systems, the use of benchmark designs is often necessary. However, the existing benchmark suites are not sufficient for the evaluation of new architectures and EDA tools; ... 详细信息
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Transitional filters based on the classical polynomial approximations
Transitional filters based on the classical polynomial appro...
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ieee International symposium on circuits and systems (ISCAS)
作者: A. Sanczczak Farias S. Noceti Filho R. Seara LINSE-Electronic Instrumentation Laboratory Circuits and Signal ProcessingDepartment of Electrical Engineering Federal University of Santa Catarina Florianopolis Santa Catarina Brazil
This paper proposes a design methodology for transitional low-pass filters using six classical approximations of polynomial filters. The design is achieved taking into account a prescribed specification, leading to a ... 详细信息
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C-log domain filters
C-log domain filters
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ieee International symposium on circuits and systems (ISCAS)
作者: D. Frey EECS Department Lehigh University Bethlehem PA USA
The idea of using FET, especially CMOS, circuitry to implement circuits similar to log domain filters is explored. Using ideas similar to those employed in the creation of log domain filters, an approximation leads to... 详细信息
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A multi-level netlist partitioning approach to hierarchical layout design of analog ICs
A multi-level netlist partitioning approach to hierarchical ...
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Midwest symposium on circuits and systems (MWSCAS)
作者: P.B. Wu R.J. Mack R.E. Massara Department of Electronic Systems Engineering University of Essex Colchester UK
An algorithmic netlist partitioning approach for the hierarchical design of analog layout is presented. In addition to considering routability, partitioning operates under analog performance and area efficiency constr... 详细信息
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Performance limits of planar and multi-layer integrated inductors
Performance limits of planar and multi-layer integrated indu...
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ieee International symposium on circuits and systems (ISCAS)
作者: Y. Koutsoyannopoulos Y. Papananos S. Bantas C. Alemanni Microelectronic Circuit Design Group National and Technical University of Athens Athens Greece RF Division DSG STMicroelectronics Catania Italy
The performance of integrated inductors is quantified, with respect to geometrical parameters and silicon process characteristics. A custom EDA tool is employed for modeling and simulating an assortment of inductor to... 详细信息
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