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Direct memory access frequency synthesizer for channel efficiency improvement in frequency hopping communication

Direct memory access frequency synthesizer for channel effic...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： C.M. Yuen K.F. Tsang W.H. Chan Department of Electronic Engineering City University of Hong Kong Kowloon Hong Kong China

A frequency synthesizer using the direct memory access (DMA) technique is designed for frequency hopping spread spectrum (FH-SS) communication systems. The frequency synthesizer provides fast channel acquisition by using simple memory table look-up technique. The technique simplify the frequency control process and reduces the channel switching time. As a result, the channel efficiency can be improved.

关键词： Frequency synthesizers Phase locked loops Spread spectrum communication Signal synthesis Energy consumption Channel spacing design engineering Frequency control Communication switching Interference

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design of multiplier free FIR filters using a LADF sigma-delta (/spl Sigma/-/spl Delta/) modulator

Design of multiplier free FIR filters using a LADF sigma-del...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： S.S. Abeysekera K.P. Padhi School of Electrical and Electronic Engineering Nanyang Technological University Singapore

Sigma-delta (/spl Sigma/-/spl Delta/) modulators have been widely used over the last few decades, and one of their many applications has been in the field of FIR filter design. In this paper, we investigate the performance of multiplier free FIR filter design using the Look Ahead Decision Feedback (LADF) /spl Sigma/-/spl Delta/ architecture. The LADF /spl Sigma/-/spl Delta/ architecture, which has not been used in FIR filter design before, is compared with other conventional /spl Sigma/-/spl Delta/ architectures. It is shown that the LADF architecture has relatively low noise power at low frequencies and is preferable over the other modulators in the design of multiplier free FIR filters. The selection of demodulator filters for reducing quantization noise due to the LADF /spl Sigma/-/spl Delta/ architecture is also addressed in the paper. Using low-pass FIR filter design examples, the appropriate filter design methodology is presented in the paper.

关键词： Finite impulse response filter Delta-sigma modulation Delta modulation circuits Feedback Quantization Signal processing Hardware Signal resolution Low-frequency noise

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Transparency-based hierarchical test generation for modular RTL designs

Transparency-based hierarchical test generation for modular ...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： Y. Makris J. Collins A. Orailoglu P. Vishakantaiah Reliable Syst. Synthesis Lab. California Univ. San Diego La Jolla CA USA Reliable Systems Synthesis Lab MC-0114CSE Department University of California San Diego La Jolla CA USA

We discuss a novel hierarchical test generation methodology for RTL designs, based on the concept of modular transparency. We introduce the channel notion, a powerful mechanism that captures modular transparency in terms of bijection functions defined on variable bitwidth signal entities. Through a recursive search algorithm, transparency channels are further combined into reachability paths suitable for translating local test vectors for each module into global design test. A divide and conquer hierarchical test generation methodology is described, resulting in significant test generation time speed-up and comparable fault coverage and vector count to complete circuit gate-level ATPG.

关键词： Circuit testing Circuit faults Performance evaluation Power system reliability Drives System testing design methodology Algorithm design and analysis System-on-a-chip electronic design automation and methodology

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An investigation on the parameters affecting total harmonic distortion in class D amplifiers

An investigation on the parameters affecting total harmonic ...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： Meng-Tong Tan Hock-Chuan Chua Bah-Hwee Gwee J.S. Chang School of Electrical and Electronic Engineering Nanyang Technological University Singapore

In this paper, we investigate two important and practical design parameters for the design of low-voltage low-power class D amplifiers that may affect the Total Harmonic Distortion (THD): the linearity of the carrier waveform and the impedance of the output stage. By means of a novel mathematical analysis method to model the carrier non-linearity, we show that this non-linearity should be mitigated to achieve low THD. Our mathematical analysis also provides an insight to the degree of non-linearity acceptable for a practical design. We show that the impedance of the output stage has little effect on THD. We verify our analysis by means of MATLAB and SPICE simulations.

关键词： Total harmonic distortion Pulse width modulation Impedance Pulse amplifiers Linearity Space vector pulse width modulation Filters Mathematical analysis MATLAB SPICE

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Mixed-signal VLSI for neural and fuzzy sequential processors

Mixed-signal VLSI for neural and fuzzy sequential processors

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ieee International symposium on circuits and systems (ISCAS)

作者： J. Madrenas E. Alarcon J. Cosp J.M. Moreno A. Poveda J. Cabestany Department of Electronic Engineering Universitat Poliltècnica de Catalunya Barcelona Spain

A sequentiality study for mixed-signal VLSI implementations of neuro/fuzzy feedforward algorithms is presented. Implications of sequential processing and mixed-signal operation are derived. Basic building blocks for sequential mixed-signal neural and fuzzy computing are proposed, and two example sequential processors are described. Feedback from designed processors and subcircuits allows consideration of the technology constraints for analysis and extension to different sequentiality degrees.

关键词： Very large scale integration Fuzzy control Neurofeedback Process design Neural network hardware Neural networks Fuzzy neural networks Circuit noise Temperature sensors Analog circuits

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design techniques for low-voltage VHF BiCMOS transconductance-filters with automatic tuning

Design techniques for low-voltage VHF BiCMOS transconductanc...

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ieee International symposium on circuits and systems (ISCAS)

作者： Tsung-Sum Lee Chun-Chieh Liu Department of Electronic Engineering National Yunlin University of Science and Technology Yunlin Taiwan

ISBN: (纸本)0780354826

A third-order Chebyshev low-pass filter with automatic tuning based on new BiCMOS low-voltage triode transconductors for applications in the very-high-frequency (VHF) range is presented. Simulation results of the filter and the automatic tuning circuitry are described. The complete system operates with supply voltages of /spl plusmn/1.5 V. The filter achieves a 42.8 MHz cutoff frequency. The filter total harmonic distortion (THD) stays lower than 1% for an input signal up to 1.061 V/sub pp/ at 8 MHz frequency. The dynamic range of the filter is 60 dB.

关键词： BiCMOS integrated circuits VHF circuits Low pass filters Circuit optimization Chebyshev approximation Tuning Transconductors Circuit simulation Voltage Cutoff frequency

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A 1-D local image velocity sensor using Gabor filtering

A 1-D local image velocity sensor using Gabor filtering

引用

ieee International symposium on circuits and systems (ISCAS)

作者： Kwok Kit Lau B.E. Shi Department of Electrical and Electronic Engineering Hong Kong University of Science and Technology Kowloon Hong Kong China

We propose gradient-based algorithm for local velocity estimation that uses a Gabor-type filter as a spatial pre-filtering stage. An integrated differentiation and division circuit extracts the local image velocity in continuous time. We describe the design, implementation and the simulation results of a 1-D velocity sensor consisting of 27 pixels. Each pixel generates two outputs: the local image velocity and the local motion direction.

关键词： Image sensors Gabor filters Gradient methods Band pass filters Noise reduction Laplace equations Filtering Circuit simulation Very large scale integration Correlation

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Efficient and accurate modeling of power supply noise on distributed on-chip power networks

Efficient and accurate modeling of power supply noise on dis...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： L.-R. Zheng B.-X. Li H. Tenlunen Department of Electronics Electronic System Design Laboratory Royal Institute of Technology Stockholm Sweden Kungliga Tekniska Hogskolan Stockholm SE

In this paper, we propose an efficient and accurate modeling technique for power supply noise estimation over on-chip power lines which are modeled as distributed RCL networks. With this model, peak noise on the power lines that includes on-chip resistive and inductive voltage drops, switching noise on packages, and on-chip decoupling effects, can be computed very efficiently and accurately. The model is verified by SPICE simulations.

关键词： Power supplies Network-on-a-chip Voltage Power system modeling Packaging Power distribution SPICE Circuit simulation Delay Clocks

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A parametric module design framework and its application to gate-level datapath/DSP module synthesis

A parametric module design framework and its application to ...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： Ming-Luen Liou Tzi-Dar Chiueh Department of Electrical Engineering National Taiwan University Taipei Taiwan

ISBN: (纸本)0780354826

The paper presents a parametric module design framework that is suitable for datapath/DSP soft-IP design. This framework is based on the integration of various frequently used parametric module generators. Under this design framework, system or circuit designers specify the structural information of the modules in C++, and then compile and co-simulate with any C/C++ programs/algorithms. Furthermore, they can manually adjust the simulation model whenever necessary. Once the system design is completed, an efficient gate-level Verilog code can soon be generated automatically. By examining the system functionality using high-level language and automatically translating the design entries into gate-level description, we can easily keep our design effort at system level while maintaining a tight consistency between different levels of abstraction. Therefore the proposed framework yields a fast, robust, and cost-effective solution to high-complexity datapath/DSP module design.

关键词： Digital signal processing Algorithm design and analysis High level languages Parameter estimation Circuit simulation Hardware design languages Robustness Digital signal processing chips Very large scale integration electronic design automation and methodology

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Prototype filter design for subband adaptive filtering structures with critical sampling

Prototype filter design for subband adaptive filtering struc...

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ieee International symposium on circuits and systems (ISCAS)

作者： M.R. Petraglia P.B. Batalheriro COPPE EE-Department of Electronic Engineering Federal University of Rio de Janeiro Brazil

In adaptive filtering, new structures and algorithms are frequently proposed with the objective of increasing the convergence speed and/or reducing the computational complexity of the conventional algorithms, mainly for applications which require a large number of adaptive coefficients. In such applications, adaptive subband structures are specially attractive since the adaptation and filtering are performed at a reduced sampling rate. Recently, a new adaptive filtering structure with critical sampling was proposed, which is able to model exactly any finite impulse response system. In this paper we propose optimization procedures to select the filter bank coefficients for the improvement of the convergence behavior of adaptive subband algorithms.

关键词： Adaptive filters Prototypes Sampling methods Filter bank Finite impulse response filter Convergence Filtering algorithms Computational complexity Least squares approximation design methodology

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