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Implementing RF broadband chaotic oscillators: design issues and results

Implementing RF broadband chaotic oscillators: Design issues...

引用

Proceedings of the 1998 ieee International symposium on circuits and systems, ISCAS. Part 5 (of 6)

作者： Silva, Christopher P. Young, Albert M. Aerospace Corp Los Angeles United States

The recent discovery of chaotic synchronization has spawned a flurry of activity in applying chaos to communications. These efforts have sought to explore the potential capabilities/benefits of the three basic elements in a chaos-based communications system: the chaotic carrier, the synchronization process, and the carrier modulation. The heart of these systems is the chaos generator that must be configured to produce the generalized carrier. Several generator implementations have been developed, including low-frequency analog and digital circuits, and high-frequency analog phase-locked loops and negative-resistance-based oscillators. This paper surveys efforts to push chaos generation from baseband to a wideband high-frequency regime, forming the basis for a broadband microwave chaos-based communications system. Several key circuit implementation issues involving this frequency migration will be identified and discussed. Accomplishment highlights will be presented, including the invention of a novel wideband high-frequency chaotic oscillator design approach.

关键词： Oscillators (electronic)

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Power calculation and modeling in deep submicron 98

Power calculation and modeling in deep submicron

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International symposium on Low Power electronics and design

作者： Abraham, J Silicon Integrat Initiat Si2 Austin TX 78759 USA

ISBN: (纸本)1581130597

Over the past few years it has become increasingly apparent that modern IC design is no longer bounded by timing and area constraints. Power has become significantly more important. In an era of hand held devices ranging from mobile computing to wireless communication systems, managing and controlling power takes on an important role. Several benefits are realized with low power designs in addition to extended battery life. Low power devices often run at lower junction temperatures and this leads to high reliability and low cost cooling systems [1,2,3,6]. Calculation and modeling of power (and delay) in deep-submicron (less then 0.25 microns) designs poses several challenges. This paper discusses the use of the Delay and Power Calculation System (DPCS) as a means by which EDA (electronic design Automation) tools can accurately calculate and model power.

关键词： integrated circuit design Energy sources Modeling Wireless communication systems Battery Life energy component Mobile Computing powered models delay Power control

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New GHz CMOS Cellular Oscillator Network

New GHz CMOS Cellular Oscillator Network

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Proceedings of the 1998 ieee International symposium on circuits and systems, ISCAS. Part 5 (of 6)

作者： Moon, Gyu Kim, Hong-Sun Ismail, Mohammed Hwang, Changku Hallym Univ Chunchon Korea Republic of

The design of a new CMOS Cellular Oscillator Network (CON) architecture is presented. With its simple cellular and fractal structure, this architecture can theoretically be spread in 2D or, possibly 3D with infinite number of feedback loops. Given a local disturbance from outside, these feedbacks, in turn, guarantee a uniformly distributed change in the global state as the network is based on the same cellular structure. Choosing the oscillation frequency as our state variable, and adopting a very high speed basic cell based on today's submicron CMOS technology, we present, in this paper, possibilities of using this architecture for GHz oscillators in RF communication systems. Potential benefits of this oscillator including accurate quadrature signal generation are discussed, and simulations in 0.5 μm CMOS are presented to verify the dynamics of this architecture.

关键词： Oscillators (electronic)

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Simple CMOS digital controlled oscillator with high resolution and linearity

Simple CMOS digital controlled oscillator with high resoluti...

引用

Proceedings of the 1998 ieee International symposium on circuits and systems, ISCAS. Part 5 (of 6)

作者： To, Cheuk-Him Chan, Cheong-Fat Choy, Oliver Chiu-Sing Chinese Univ of Hong Kong Shatin Hong Kong

This paper presents a new DCO (digital controlled oscillator) circuit which has a very simple structure with high resolution and linearity. For example, a six bit DCO only requires seventeen MOS transistors. As a result of the simple structure, the new DCO also consumes less power compared to other DCO designs. Another added feature of this new design is that the output signal can be phase-locked to an external input signal. A four bit DCO test circuit was fabricated with a 0.7μm CMOS technology. The test circuit has a die size of 0.024mm2 and an operating frequency range from 13MHz to 50MHz.

关键词： Oscillators (electronic)

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design of a 3.3 V 12 bit CMOS D/A converter with a high linearity

Design of a 3.3 V 12 bit CMOS D/A converter with a high line...

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1998 Midwest symposium on circuits and systems, MWSCAS 1998

作者： Ryu, Ki-Hong Yoon, Kwang Sub Min, Hong Ki Dept. of Electronic Engineering Inha University 253 Yonghyun-Dong Nam-Ku Inchon402-751 Korea Republic of Dept. of Electronic Engineering University of Inchon 253 Yonghyun-Dong Nam-Ku Inchon402-751 Korea Republic of

ISBN: (纸本)0818689145

This paper describes a 3.3 V, 65 MHz 12 bit CMOS current-mode DAC designed with a 8 MSB current matrix stage and a 4 LSB binary weighting stage. The linearity errors caused by a voltage drop of the ground line and a threshold voltage mismatch of transistors have been reduced by the symmetrical routing method with a ground line and the tree structure bias circuit, respectively. In order to realize a low glitch energy, a cascode current switch has been employed. The simulation results of the designed DAC show a conversion rate of 65 MHz, a power dissipation of 71.7 mW, a DNL of ±0.2 LSB and an INL of ±0.8 LSB with a single power supply of 3.3 V for a 0.6 μm n-well CMOS technology. © 1999 ieee.

关键词： Threshold voltage

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New generation thin plastic packages delivers higher levels of power and reliability performance for power IC devices 23

New generation thin plastic packages delivers higher levels ...

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23rd ieee/CPMT International electronics Manufacturing Technology (IEMP) symposium

作者： Kasem, M Vishay Siliconix Inc Santa Clara CA 95054 USA

ISBN: (纸本)0780345231

As the advances in device scaling continue, the developments of miniaturized surface mount plastic packages are challenged with heat dissipation and reliability problems. Therefore, the advancement of power packaging technology is expected to have influence on the pace of power electronic systems progress through the next millennium. At Siliconix several new generations of power surface mount packages have emerged for power semiconductor devices and ICs. Thermal design and characteristics of one of these new packages, 48-lead TQFP, will be discussed. Special leadframe properties and thermal design guidelines, that provide quantitative understanding for package temperature distribution and key thermal variables, will be summarized. Stress and qualification test results indicate that this package has an excellent reliability performance when compared to the current industry standard requirements. An improvement by a factor of 6 in die attach shear strength has been achieved. In addition, C-SAM analysis of parts exposed to preconditioning and HAST tests revealed that these new packages have very high cracking and moisture penetration resistance characteristics. This enhancement in package thermal performance and reliability has been achieved with no increase in manufacturing cost or change in package outline.

关键词： Timing circuits

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Establishing ASIC fault-coverage guidelines for high-reliability systems

Establishing ASIC fault-coverage guidelines for high-reliabi...

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Proceedings of the 1998 Reliability and Maintainability symposium

作者： Willing, Walter Helland, Arden Northrop Grumman ESSD Baltimore United States

electronic systems are being designed with increasing levels of digital logic integration, quite often in the form of digital Application Specific Integrated circuits (ASICs). The level of integration in these devices (10,000 to greater than 100,00 primitive logic elements such as `gates' and/or flip flops) presents a difficult challenge to design engineers for the development of a comprehensive set of test vectors to verify that all of the elements within the ASIC operate correctly. The percentage of possible logic elements (gates, flip flops, etc.) tested by the test vectors is known as fault coverage (FC). Although 100% fault coverage is a desired goal, quite often the complexity of the ASICs preclude reaching that goal. The hazards of insufficient fault coverage are magnified in complex systems with many ASICs, for if an untested defective logic element were to be exercised in any one ASIC, a system failure would occur. This paper presents a mathematical model to develop digital ASIC fault coverage guidelines for complex electronic systems. The model is based on established probabilistic relationships between integrated circuit fabrication yields, fault coverage and the resulting device defect level, combined with an estimated probability that untested logic elements will be exercised in use. The results of this model can be used to allocate the ASIC fault coverage requirements necessary to achieve high system mission success rates.

关键词： Application specific integrated circuits

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Hermetic coplanar waveguide-to-HDI microstrip microwave feedthrough

Hermetic coplanar waveguide-to-HDI microstrip microwave feed...

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Proceedings of the 1998 ieee MTT-S International Microwave symposium. Part 1 (of 3)

作者： Holzman, E. Teti, R. Dufour, B. Miller, S. Lockheed Martin Government Electronic Systems Moorestown United States

We describe the design, construction and performance of a novel hermetic, multi-layer ceramic feedthrough for microwave modules. In particular, the feedthrough takes a coplanar waveguide input and provides a three-via output compatible with a microstrip module utilizing High Density Interconnect (HDI) microstrip or coplanar transmission lines. The same feedthrough also carries DC and logic signals. We designed the feedthrough using a commercial finite element analysis tool. The feedthrough was fabricated from multiple layers of ceramic using the HTCC process. Measurements of two feedthroughs in a fixture show wide band performance: less than 1 dB of insertion loss (including 0.5 dB from the fixture) from 2 to 3.6 GHz, and less than 2 dB insertion loss up to 5 GHz.

关键词： Microwave integrated circuits

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Initial design of the 60 Megawatt rotating magnetic field (RMF) oscillator system for the University of Washington "TCS" field reversed configuration experiment

Initial design of the 60 Megawatt rotating magnetic field (R...

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17th ieee/NPSS symposium on Fusion Engineering

作者： Reass, WA Miera, DA Wurden, GA Univ Calif Los Alamos Natl Lab Los Alamos NM 87545 USA

ISBN: (纸本)0780342267

This paper presents the initial electrical and mechanical design of two phase-locked 30 Megawatt RMS, 150 kHz oscillator systems used for current drive and plasma sustainment of the "Translation, Confinement, and Sustainment" (TCS) field reversed configuration (FRC) plasma. By the application of orthogonally-placed saddle coils on the surface of the glass vacuum vessel, the phase-controlled rotating magnetic field perturbation will induce an electric field in the plasma which should counter the intrinsic ohmic decay of the plasma and maintain the FRC. Each system utilizes a bank of 6 parallel magnetically beamed ML8618 triodes. These devices are rated at 250 Amperes cathode current and a 45 kV plate voltage. An advantage of the magnetically beamed triode is their extreme efficiency, requiring only 2.5 kW of filament and a few amps and a few kV of grid drive. Each 3.5 uH saddle coil is configured with an adjustable tank circuit (for tuning). Assuming no losses and a nominal 18 kV plate voltage, the tubes can circulate about 30 kV and 9 kA (pk to pk) in the saddle coil antenna, a circulating power of over 33 megawatts RMS. On each cycle the tubes can kick in up to 1500 Amperes, providing a robust phase control. DC high-voltage from the tubes is isolated from the saddle coil antennas and tank circuits by a 1:1 coaxial air-core balun transformer. To control the ML8618's phase and amplitude, fast 150 Ampere "totem-pole" grid drivers, an "on" hot-deck and an "off" hot-deck are utilized. The hot-decks use up to 6 each 3CPX1500A7 slotted radial beam triodes. By adjusting the conduction angle, amplitude may be regulated, with inter-pulse timing, phase angle can be controlled. A central feedback timing chassis monitors each systems' saddle coil antenna and appropriately derives each systems timing signals. Fiber-optic cables are used to isolate between the control room timing chassis and the remote power oscillator system. Complete system design detail will be presented in ad

关键词： Oscillators (electronic)

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Complex holographic module for vibrodiagnostic and forecasting of reliability of quartz resonators

Complex holographic module for vibrodiagnostic and forecasti...

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ieee International Frequency Control symposium

作者： P. Borovtsov Perm State Technical University PSTU Russia

Vibro-diagnostics of electronic products used in automatic control of space vehicles is dealt with. In particular, the diagnostic of quartz resonators is considered with the aim to improve their reliability. The vibro-diagnostics was carried out in the frequency range from 5Hz up to 10kHz. A mathematical model of a holographic interferometer used for the diagnostics is presented.

关键词： Holography Optical resonators Fluctuations circuits Lighting Reliability engineering systems engineering and theory Frequency Automatic control Control systems

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