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A three-port adiabatic register file suitable for embedded applications 98

A three-port adiabatic register file suitable for embedded a...

引用

International symposium on Low Power electronics and design (ISLPED)

作者： S. Avery M. Jabri University of New South Wales Australia University of Sydney Australia

ISBN: (纸本)9781581130591

Adiabatic logic promises extremely low power consumption for those applications where slower clock rates are acceptable. However, there have been very few adiabatic memory designs, and any circuit of even moderate complexity requires some form of RAM. This paper presents a register file implemented entirely with adiabatic logic, and fabricated using a 1.2 /spl mu/m CMOS technology. Comparison with a conventional CMOS logic implementation, using both measured and simulated results, indicates significant power savings have been realised.

关键词： Registers Random access memory Energy consumption Clocks Read-write memory CMOS logic circuits CMOS technology Circuit simulation Permission CMOS memory circuits

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An age-controlled evolutionary algorithm for optimization problems in physical layout

An age-controlled evolutionary algorithm for optimization pr...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： A. Huber D.A. Mlynski Institut fur Theoretische Elektrotechnik und Messtechnik Universitat Karlsruhe Karlsruhe Germany

We present the first evolutionary approach using an age-controlled population model for solving layout problems. In this approach the age is counted individually. Age-intrinsic information and possible conclusions are discussed elaborately. The age-intrinsic information is exploited to improve and accelerate the optimization. Selection and mutation benefit from this approach. Due to industrial needs the optimization characteristic is controlled by a single strategy variable /spl sigma/. This strategy is best-suited to discrete and combinatorial optimization problems. It facilitates efficient controlling of genetic operators. The presented strategy has been implemented and successfully applied to the assignment problem on analog transistor arrays. This paper focuses on the general problem-independent aspects.

关键词： Evolutionary computation Genetic mutations Resistors Equivalent circuits electronic mail Accelerated aging Physics computing Integrated circuit interconnections Signal design Process design

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An extension of the classical feedback theory

An extension of the classical feedback theory

引用

ieee International symposium on circuits and systems (ISCAS)

作者： M. Neag O. McCarthy Electronic and Computer Engineering Department University of Limerick Limerick Ireland

The classical feedback theory (CFb theory) is a useful tool for circuit analysis but has some limitations: it deals with one-input one-output circuits only; in order to simplify the calculations the signal fed forward by the feedback network is usually neglected but a thorough analysis of the resulting errors is not provided. Moreover, it supplies a degree of traditionalism in the feedback circuits' analysis and design. This paper presents an extension of the CFb theory that provides a unitary approach to the analysis of feedback circuits, dealing with both voltage and current as input and output signals. The new analysis method is no more difficult to use than the classical one and it spotlights the elements that control the circuit parameters, such as the ideal closed loop gain and the bandwidth. The method was verified by comparision with a direct analysis, at Kirchhoff's laws level, for circuits having a /spl Pi/ and a T feedback network. Thus its validity was demonstrated for any reciprocal two-port feedback network; also, an estimation of its errors when compared with the direct (i.e. accurate) analysis is provided.

关键词： Output feedback Circuit analysis Voltage Feedback circuits Signal analysis Impedance Circuit topology Signal processing electronic mail Bandwidth

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Path resizing based on incremental technique

Path resizing based on incremental technique

引用

ieee International symposium on circuits and systems (ISCAS)

作者： S. Cremoux N. Azemard D. Auvergne Laboratoire d'lnformatique de Robotique et de Microflectronique de Montpellier UMR 5506 Universite Montpellier II //CNRS Montpellier France

Based on an incremental path search algorithm, this paper addresses the problem of longest combinational paths selection for performance optimization at the physical level. A realistic evaluation of gate delay and controlled sizing techniques are used to manage the circuit path sizing alternatives, such as delay or power/area constraints. The efficiency of this technique is demonstrated and also illustrated on several ISCAS'85 benchmark circuits. A comparison is given between sizing alternatives to local optimization steps controlled by specific indicators.

关键词： Propagation delay Robots electronic mail Circuit optimization design optimization Circuit synthesis Timing Central Processing Unit CMOS process Robustness

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An improved architecture for the interconnections in a multi-chip CNN system

An improved architecture for the interconnections in a multi...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： M. Salerno F. Sargeni V. Bonaiuto Department of Electronic Engineering University of Roma Tor Vergata Rome Italy Universita degli Studi di Roma La Sapienza Roma Lazio IT

The design and realisation of reliable hardware CNN systems with a high number of cells is a key point in research in this field. On this topic, several different solutions have been proposed in VLSI implementations. In previously published papers, the authors presented current-mode interconnection-oriented integrated circuits to realise wide CNN networks. The multi-chip architecture shows the drawback to be a pad-limited structure because of the growing number of the pads required by the interconnections. In this paper a technique to improve the interconnection architecture without any lack of functionality will be presented. This approach will drastically cut the interconnection requirements by 75%. Some simulation results are presented together with experimental results.

关键词： Cellular neural networks Integrated circuit interconnections Very large scale integration Joining processes Neural network hardware Manufacturing Silicon Time division multiple access Surges Reliability engineering

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Feedforward compensation techniques in the design of low voltage opamps and OTAs

Feedforward compensation techniques in the design of low vol...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： S. Setty C. Toumazou Ericsson Components AB Swindon UK Information Engineering Department of Electrical & Electronic Engineering Imperial College London London UK

This paper presents feedforward compensation techniques for low voltage fully differential folded cascode amplifiers and OTAs. Fully differential folded cascode cells have been fabricated and tested with different feedforward configurations in order to demonstrate and compare the usefulness of these techniques for broadbanding the gain-bandwidth product of low voltage, low power CMOS amplifiers and for providing high quality low voltage CMOS OTA integrators.

关键词： Low voltage Frequency Poles and zeros Broadband amplifiers Operational amplifiers Differential amplifiers Parasitic capacitance Educational institutions Testing High power amplifiers

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The Petrol approach to high-level power estimation 98

The Petrol approach to high-level power estimation

引用

International symposium on Low Power electronics and design (ISLPED)

作者： R.P. Llopis K. Goossens Philips Research Laboratories Eindhoven Netherlands

ISBN: (纸本)9781581130591

High-level power estimation is essential for designing complex low-power ICs. However, the lack of flexibility, or restriction to synthesizable code of previously presented high-level power estimation approaches limits their use. In this paper we present a novel, more general and flexible high-level power estimation approach, that avoids these limitations. Petrol, as we call it, is not limited to specialized application domains, synthesizable VHDL, or data path parts of a design. We show that glitches can be usefully modeled at higher levels of abstraction. The Petrol approach shows good correlation with gate-level power estimates. It is currently used for commercial designs.

关键词： Petroleum Power dissipation Circuit synthesis Libraries Permission Laboratories Power system modeling Digital integrated circuits Decoding Batteries

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Multiple 1:N interpolation FIR filter design based on a single architecture

Multiple 1:N interpolation FIR filter design based on a sing...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： In Kang Kwang-Il Yeon Han-Cheol Jo Jong-Wha Chong Kyungsoo Kim Communication Circuits Section Electronics and Telecommnications Research Institute Taejon South Korea Software Engineering DooWon Technical College Ansong Gyeonggi South Korea Electronic Engineering Hanyang University Seoul South Korea

A VLSI architecture for the multiple 1:N interpolation FIR filter is proposed for QPSK modulation in WLL (Wireless Local Loop). Multiple filters are operated synchronously and N outputs are generated in case of 1:N interpolation. But the architecture and the operating frequency are the same as those of single FIR filter architecture except having pipeline registers. Because of using a single architecture, the proposed architecture can be implemented with less chip area. The power consumption is not increased because its operating frequency is the same as that of single architecture. When N is 4, the four-output 1:4 interpolation filter is designed using VHDL logic synthesis. The number of gates and operating frequency are compared with those of transversal FIR filter design method and look-up table design method.

关键词： Interpolation Finite impulse response filter Frequency design methodology Very large scale integration Quadrature phase shift keying Synchronous generators Pipelines Registers Energy consumption

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Generation of quasi-optimal FBDDs through paired Haar spectra

Generation of quasi-optimal FBDDs through paired Haar spectr...

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ieee International symposium on circuits and systems (ISCAS)

作者： Chip-Hong Chang B.J. Falkowski Electronics Design Centre French-Singapore Institute Singapore School of Electrical and Electronic Engineering Nanyang Technological University Singapore

A polynomial Haar expansion for unnormalized Haar transform of incompletely specified Boolean function has been derived. Based on the Haar expansion, the entropy and equivocation in probability theory have been formulated in terms of some subsets of coefficients from the recently introduced paired Haar spectrum. A unified and systematic method founded on the concept of entropy has been developed to exploit the don't care sets of incompletely specified Boolean functions for the heuristic minimization of Free Binary Decision Diagrams. The approach is general and can be extended to other combinatorial decision problems.

关键词： Boolean functions Entropy Data structures Binary decision diagrams Circuit testing Input variables Polynomials Minimization methods Logic functions Digital circuits

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A 3-V RF CMOS bandpass amplifier using an active inductor

A 3-V RF CMOS bandpass amplifier using an active inductor

引用

ieee International symposium on circuits and systems (ISCAS)

作者： A. Thanachayanont A. Payne Department of Electrical & Electronic Engineering Imperial College of Science Technology and Medicine London UK

This paper presents the design of a 3-V RF CMOS bandpass amplifier using the recently proposed CMOS active inductor. Negative feedback is used with a cascode amplifier to realise a grounded inductance as a frequency selective element and achieve power amplification simultaneously. The proposed bandpass amplifier, which includes an input matching network and an output voltage buffer for a 50-/spl Omega/ environment, is designed and simulated with a commercial 0.8-/spl mu/m n-well BiCMOS process using HSPICE. Simulation results of the bandpass amplifier tuned at a centre frequency of 1 GHz with a quality factor of 56 illustrate that a power gain of 23 dB, and a noise figure of 4.3 dB can be achieved with a power dissipation of 57 mW from a single 3 V supply.

关键词： Radio frequency Radiofrequency amplifiers Active inductors Power amplifiers Negative feedback Inductance Impedance matching Voltage BiCMOS integrated circuits Q factor

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