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Multiple 1:N interpolation FIR filter design based on a single architecture

Multiple 1:N interpolation FIR filter design based on a sing...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： In Kang Kwang-Il Yeon Han-Cheol Jo Jong-Wha Chong Kyungsoo Kim Communication Circuits Section Electronics and Telecommnications Research Institute Taejon South Korea Software Engineering DooWon Technical College Ansong Gyeonggi South Korea Electronic Engineering Hanyang University Seoul South Korea

A VLSI architecture for the multiple 1:N interpolation FIR filter is proposed for QPSK modulation in WLL (Wireless Local Loop). Multiple filters are operated synchronously and N outputs are generated in case of 1:N interpolation. But the architecture and the operating frequency are the same as those of single FIR filter architecture except having pipeline registers. Because of using a single architecture, the proposed architecture can be implemented with less chip area. The power consumption is not increased because its operating frequency is the same as that of single architecture. When N is 4, the four-output 1:4 interpolation filter is designed using VHDL logic synthesis. The number of gates and operating frequency are compared with those of transversal FIR filter design method and look-up table design method.

关键词： Interpolation Finite impulse response filter Frequency design methodology Very large scale integration Quadrature phase shift keying Synchronous generators Pipelines Registers Energy consumption

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Generation of quasi-optimal FBDDs through paired Haar spectra

Generation of quasi-optimal FBDDs through paired Haar spectr...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： Chip-Hong Chang B.J. Falkowski Electronics Design Centre French-Singapore Institute Singapore School of Electrical and Electronic Engineering Nanyang Technological University Singapore

A polynomial Haar expansion for unnormalized Haar transform of incompletely specified Boolean function has been derived. Based on the Haar expansion, the entropy and equivocation in probability theory have been formulated in terms of some subsets of coefficients from the recently introduced paired Haar spectrum. A unified and systematic method founded on the concept of entropy has been developed to exploit the don't care sets of incompletely specified Boolean functions for the heuristic minimization of Free Binary Decision Diagrams. The approach is general and can be extended to other combinatorial decision problems.

关键词： Boolean functions Entropy Data structures Binary decision diagrams Circuit testing Input variables Polynomials Minimization methods Logic functions Digital circuits

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A 3-V RF CMOS bandpass amplifier using an active inductor

A 3-V RF CMOS bandpass amplifier using an active inductor

引用

ieee International symposium on circuits and systems (ISCAS)

作者： A. Thanachayanont A. Payne Department of Electrical & Electronic Engineering Imperial College of Science Technology and Medicine London UK

This paper presents the design of a 3-V RF CMOS bandpass amplifier using the recently proposed CMOS active inductor. Negative feedback is used with a cascode amplifier to realise a grounded inductance as a frequency selective element and achieve power amplification simultaneously. The proposed bandpass amplifier, which includes an input matching network and an output voltage buffer for a 50-/spl Omega/ environment, is designed and simulated with a commercial 0.8-/spl mu/m n-well BiCMOS process using HSPICE. Simulation results of the bandpass amplifier tuned at a centre frequency of 1 GHz with a quality factor of 56 illustrate that a power gain of 23 dB, and a noise figure of 4.3 dB can be achieved with a power dissipation of 57 mW from a single 3 V supply.

关键词： Radio frequency Radiofrequency amplifiers Active inductors Power amplifiers Negative feedback Inductance Impedance matching Voltage BiCMOS integrated circuits Q factor

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Evolutionary optimization in the search for intrinsically robust circuit designs

Evolutionary optimization in the search for intrinsically ro...

引用

ieee International symposium on Industrial electronics (ISIE)

作者： M.A. Owadally J. Greene Department of Electrical Engineering University of Cape Town Cape Town South Africa

A hybrid genetic algorithm is developed that allows the variability of components to be included in the design of analogue electronic circuits. During the local search stage of the hybrid genetic algorithm, the Taguchi method is used to determine the sensitivity of the neighbourhood of a proposed trial solution. The information gathered during local learning is used to guide the stochastic search towards intrinsically robust circuit designs. An example is given showing that circuit designs obtained from this method outperform those obtained from a traditional genetic algorithm.

关键词： design optimization Robustness Genetic algorithms Cities and towns Stochastic processes electronic circuits Circuit synthesis Africa Hybrid power systems Sampling methods

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A phase detector with no dead zone and a very wide output voltage range chargepump

A phase detector with no dead zone and a very wide output vo...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： R. Ahola J. Routama S. Lindfors K. Halonen Electronic Circuit Design Laboratory Helsinki University of Technology Finland Aalto-yliopisto Insinooritieteiden korkeakoulu Aalto FI

This paper discusses the effects of the so-called dead zone in the phase detector on the phase-noise behavior of phase-locked loop frequency synthesizers. A novel phase detector that completely overcomes the dead zone problem is introduced. Also, a chargepump with a very wide output voltage range is presented. This chargepump allows the use of a VCO with a wider tuning range and, thus, also a lower noise sensitivity. Measurement results that verify the proper operation of these blocks are also presented.

关键词： Phase detection Voltage Frequency synthesizers Pulse generation Voltage-controlled oscillators Phase noise Phase frequency detector Radio frequency Space vector pulse width modulation Phase locked loops

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Realization of general 2-D linear-phase FIR filters using singular-value decomposition

Realization of general 2-D linear-phase FIR filters using si...

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ieee International symposium on circuits and systems (ISCAS)

作者： Wei-Ping Zhu M.O. Ahmad M.N.S. Swamy Center for Signal Processing and Communications Department of Electrical and Computer Engineering Concordia University Montreal QUE Canada

In this paper, the singular-value decomposition (SVD) technique is investigated for the realization of 2-D linear-phase FIR filters with arbitrary magnitude responses. A parallel realization structure consisting of a number of 1-D FIR filters is obtained by applying the SVD to the impulse response of a 2-D filter. By using the symmetry property of the 2-D impulse response and by developing an appropriate unitary transform, a singular-value decomposition yielding 1-D linear-phase constituent filters is obtained. It is shown that the number of parallel sections can be reduced significantly by neglecting the smaller singular values and allowing only a very small error in the magnitude response of the realized 2-D filter.

关键词： Finite impulse response filter IIR filters Signal processing electronic mail Signal design Convolution Matrix decomposition Symmetric matrices Nonlinear filters design methodology

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design and analysis of quasi-switched-capacitor step-up DC/DC converters

Design and analysis of quasi-switched-capacitor step-up DC/D...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： H. Chung Department of Electronic Engineering City University of Hong Kong Kowloon Hong Kong China

A new switched-capacitor (SC)-based step-up DC/DC converter is proposed. It has the prominent features of continuous input current waveform and having better regulation capability than the traditional SC converters. The problem of conducted electromagnetic interference (EMI) with the supply network is minimized. Concept of energy transfer is achieved by using dual basic SC step-up converter cells operating in antiphase. The voltage conversion ratio is controlled by a current control scheme in order to adjust the charging profile of the capacitors. A generalized n-stage converter is presented and is analyzed by a simplified third order state-space equation set. The static and dynamic behaviors and the design constraints of the proposed converter are derived. A prototype of 30 W, 5 V/12 V, 2-stage converter has been built, giving an overall efficiency of 78% with power density of 15 W/in/sup 3/.

关键词： DC-DC power converters Voltage Capacitors Switches Electromagnetic interference Equations Prototypes Pulse width modulation Switching converters Energy exchange

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A VLSI architecture design with lower hardware cost and less memory for separable 2-D discrete wavelet transform

A VLSI architecture design with lower hardware cost and less...

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ieee International symposium on circuits and systems (ISCAS)

作者： Ming-Hwa Sheu Ming-Der Shieh Sheng-Wel Liu Department of Electronic Engineering National Yunlin University of Science and Technology Yunlin Taiwan

This paper presents an efficient architecture for 2-D image decomposition of discrete wavelet transform. Our design approach reduces the transpose storage size and hardware cost efficiently, based on the input data reuse methodology and fully parallel pipelined architecture. The main characteristics of this architecture include: (1) lower hardware cost; (2) smaller transpose storage size; (3) shorter latency; (4) suitable VLSI implementation. Finally, all components in our architecture are simulated based on the accuracy requirement and realized as a single chip physically. The chip area is about 7600*8400 um/sup 2/ and its working frequency is 25 MHz.

关键词： Very large scale integration Hardware Costs Discrete wavelet transforms Computer architecture Filters Filtering Systolic arrays Concurrent computing Image decomposition

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A novel ring-oscillator with a very small process and temperature variation

A novel ring-oscillator with a very small process and temper...

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ieee International symposium on circuits and systems (ISCAS)

作者： J. Routama K. Koli K. Halonen Electronic Circuit Design Laboratory Helsinki University of Technology Finland

This paper describes a new ring-oscillator circuit, the conversion gain of which has only a 92% variation with all process variations over the temperature range of 0/spl deg/ to 100/spl deg/C. The operating range of the oscillator is 180 to 380 MHz. The circuit uses a 3-stage ring-oscillator for low speed conditions and a 4-stage oscillator for high speed conditions. The division between low and fast conditions is based on the transconductance of the MOS-transistors. The oscillator has also a process and temperature dependent control current. The circuit has been designed with a standard 0.5 /spl mu/m CMOS-process.

关键词： Transconductance Ring oscillators Temperature control Circuit topology Voltage-controlled oscillators Resistors Temperature distribution Temperature dependence Phase locked loops Circuit optimization

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Array architecture and design for image window operation processing ASICs

Array architecture and design for image window operation pro...

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ieee International symposium on circuits and systems (ISCAS)

作者： D. Li L. Jiang T. Isshiki H. Kunieda Department of Electrical and Electronic Engineering Tokyo Institute of Technology Meguro Tokyo Japan

In this paper, we present a novel architecture named as Window-MSPA architecture which targets window operations in image processing, as an extension of MSPA architecture. We have previously developed a memory sharing processor array (MSPA) for fast array processing with regular iterative algorithms. Window-MSPA consists of Window-PEs which performs window operations. It minimizes the data I/O ports and the number of Window-PEs. The image data input scheme is restricted to row by row input lines which simplifies the I/O architecture. Under this practical I/O restriction, the fastest processings are achieved. The architecture can be used for not only conventional image filtering, but practical window operations such as motion vector search in MPEG2. The derived architecture is flexible enough to adjust user's requirements for either area or speed.

关键词： Application specific integrated circuits Image processing Hardware Costs Memory Broadcasting design methodology Iterative algorithms Filtering Pixel

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