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Proceedings of the 1995 4th Asian Test symposium

作者： Shieh, Yeong-Ruey Wu, Cheng-Wen Natl Tsing Hua Univ Hsinchu Taiwan

As the complexity of electronic circuits and systems increases, so does the complexity of testing them. The level-sensitive scan-design (LSSD) structure used in a digital circuit enhances the controllability and observability of the circuit under test. For analog circuits, there also are several approaches proposed to improve their observability, based on the LSSD concept. However, none of these approaches provide control and observation capability for all test points simultaneously. In this paper, we propose two control and observation structures for analog circuits without using extra power supply. Using our approach, one is able to observe and control the DC voltage levels of all test points simultaneously, which is the basic diagnosis capability for the analog circuit under test. A calibration process is presented to ensure the accuracy of the excitation and read-out voltage levels.

关键词： Integrated circuit testing

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A DISTRIBUTED MEDIA ACCESS PROTOCOL FOR PACKET RADIO NETWORKS AND PERFORMANCE ANALYSIS .2. NETWORK SET-UP TIME AND DATA RATE

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INTERNATIONAL JOURNAL OF COMMUNICATION systems 1995年第1期8卷 49-63页

作者： POND, LC LI, VOK Communication Sciences Electrical Engineering Systems University of Southern California Los Angeles CA 90089-2565 U.S.A. Lawrence C. Pond received the M.Sc. and Ph.D. degrees in electrical engineering from the University of Southern California in 1983 and 1990 respectively. Dr. Pond is currently a scientist at Hughes Space and Communications Company having joined in 1980. He has worked in the fields of communication system design mobile communication network and spacecraft payload design. He is currently working on the development of satellite-based ATM transport and switching architectures for BISDN and Defense Information System Network amlications. Dr. Pond is a member of IEEE. Victor O. K. Li was born in Hong Kong in 1954. He received his SB SM and Sc.D. degrees in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology Cambridge Massachusetts in 1977 1979 and 1981 respectively. Since February 1981 he has been with the University of Southern California (USC) LOS Angeles California where he is Professor of Electrical Engineering and Director of the USC Communication Sciences Institute. He has published 150 technical papers and has lectured and consulted extensively around the world. His research interests include high-speed communication networks personal communication networks intelligent networks distributed databases queueing theory graph theory and applied probability. Dr. Li is very active in the Institute of Electrical and Electronic Engineers (IEEE) having been a member of the Computer Communications Technical Committee since 1983 and having served as Chairman from 1987–1989. He served as Chairman of the Los Angeles Chapter of the IEEE Information Theory Group from 1983–1985. He is the Steering Committee Chair of the International Conference on Computer Communications and Networks (IC3 N) General Chair of the 1st Annual IC3N held in San Diego California in June 1992 General Chair and Technical Program Chair of the 4th IEEE Workshop on Comp

In this, the second part of a two-part paper, the required time for establishing a mobile packet radio network using the virtual circuit and time division multiple access protocol developed in Part 1 is analysed. Tools are developed to determine the virtual circuit and network set-up times in terms of the channel bandwidth allocated to establish and maintain the network. The tools are then extended to include the effects of user mobility. Then these results are combined with the network capacity results of Part 1 to analyse the trade-off between the data rate and set-up time of the network. Next a hierarchical architecture is proposed and the network data rate versus set-up time trade-off of this architecture is analysed using these tools. This architecture is shown to both provide a higher data rate and establish faster than flat networks of the same number of nodes.

关键词： PACKET RADIO NETWORK EPLRS DISTRIBUTED NETWORK TDMA VIRTUAL circuits MULTIHOP NETWORK BOUNDED DELAY MOBILITY NETWORK SET-UP TIME HIERARCHICAL NETWORK NETWORK DATA RATE

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From circuit to mechatronic system tolerance optimization

From circuit to mechatronic system tolerance optimization

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ieee International symposium on circuits and systems (ISCAS)

作者： J. Wojciechowski L. Opalski K. Zamlynski Institute of Electronics Fundamentals Warsaw Poland

This paper introduces a method for the worst case design of engineering systems, provided that the design problem is formulated in an algorithmic manner. Applicability of the Piecewise Ellipsoidal Approximation (PEA) to the constraint region, originally developed for electronic circuits, is extended in this paper. A two level algorithm for the worst case design, exploiting the properties of ellipsoidal functions, is introduced. A benchmark example of the worst case design of the fourth order servomechanism is effectively solved.

关键词： Mechatronics Algorithm design and analysis design optimization design engineering electronic circuits Servomechanisms systems engineering and theory Software design Integrated circuit yield Mass production

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design of a compact cluster structure by using genetic algorithms

Design of a compact cluster structure by using genetic algor...

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ieee International symposium on circuits and systems (ISCAS)

作者： Hong Lan Jin Y. Miyanaga K. Tochinai Electronic Engineering Faculty of Engineering Hokkaido University Sapporo Japan

Cluster nodes produced in the experiments of our handwritten Japanese character recognition involve the enormous increasement of computation quantity. It is necessary to delete unnecessary cluster nodes to get the compact cluster structure. A compress algorithm using genetic algorithms (GA) is employed in this report to reduce redundant cluster nodes. The results of the handwritten Japanese character recognition using GA are also shown.

关键词： Algorithm design and analysis Genetic algorithms Biological cells Covariance matrix Pattern recognition Supervised learning Clustering algorithms

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Power complementary and linear phase filter banks

Power complementary and linear phase filter banks

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ieee International symposium on circuits and systems (ISCAS)

作者： K. Kurosawa N. Yamashita Department of Electrical and Electronic Engineering Tokyo Institute of Technology Meguro Tokyo Japan

We show a necessary and sufficient condition for power complementary and linear phase filter banks. As a design example, a 3 channel such filter bank is presented.

关键词： Channel bank filters Filter bank Finite impulse response filter Sufficient conditions Nonlinear filters Power engineering and energy electronic mail Hydrogen

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Chaos as a design tactic: broadening the capture range of the phase-locked loop

Chaos as a design tactic: broadening the capture range of th...

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ieee International symposium on circuits and systems (ISCAS)

作者： E. Bradley D.E. Straub Department of Electrical and Computer Engineering University of Colorado Boulder CO USA

In this paper, we present and discuss some circuit experiments that demonstrate how chaos can be used to broaden the capture range of the common phase-locked loop circuit.

关键词： Chaos Phase locked loops Chaotic communication Frequency Phase modulation Circuit topology Voltage-controlled oscillators design engineering Communication system control electronic circuits

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Responsive visualisation-a tool for analog designers

Responsive visualisation-a tool for analog designers

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ieee International symposium on circuits and systems (ISCAS)

作者： R. Spence R. Bhogal L. Tweedie Hua Su Department of Electrical and Electronic Engineering Imperial College of Science Technology and Medicine London UK

The authors illustrate the potential benefits, for analog circuit design, of responsive visualisation. By means of the visualisations presented, they advocate an approach to tool design that appears to offer considera... 详细信息

关键词： Visualization Circuit simulation Large screen displays Voltage Data engineering design engineering Educational institutions Paper technology Medical diagnostic imaging Analog circuits

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Tool management in an electronic CAD framework

Tool management in an electronic CAD framework

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ieee International symposium on circuits and systems (ISCAS)

作者： J. Camara H. Sarmento INESC Portugal IST/INESC USA

To set designers free from needing to become expert users of a baffling array of complex CAD fools, design environments, including simplified mechanisms to view and control CAD fools, emerged. designers only need to be concerned with higher-level design tasks. In this paper we address CAD framework services, with special emphasis on tool management. We present three new tools: AUTOCAP, which deals with tool characterisation, invocation and encapsulation; STAR, which makes the task of controlling tool status trivial; and BALANCE, which offers automatic dynamic load balancing.

关键词： design automation Consumer electronics Encapsulation Automatic control Load management electronic design automation and methodology Time to market Operating systems Computer aided software engineering Data handling

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Application of genetic algorithm for response surface modeling in optimal statistical design

Application of genetic algorithm for response surface modeli...

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ieee International symposium on circuits and systems (ISCAS)

作者： Y. Shen R.M.M. Chen Department of Electronic Engineering City Polytechnic of Hong Kong Hong Kong China Dept. of Electron. Eng. City Polytech. of Hong Kong Kowloon Hong Kong

In this paper, a new approach for optimal statistical design to achieve 100% yield at minimum cost is introduced. A kind of genetic algorithm together with a boundary sampling strategy is proposed for the selection of the response surface model function to achieve better accuracy of the model representation and improved computation speed due to reduced number of circuit simulations. The complete optimum statistic design also involves the solution procedure of design centering fixed and variable optimum tolerance assignment. A numerical example is presented to show the effectiveness of the new technique.

关键词： Genetic algorithms Response surface methodology Algorithm design and analysis Sampling methods Circuit simulation Polynomials Cost function Yield estimation Monte Carlo methods design engineering

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On the design of active GaAs multipliers

On the design of active GaAs multipliers

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ieee International symposium on circuits and systems (ISCAS)

作者： T.L. Lim D.G. Haigh D.R. Webster Depaltment of Electronic Engineering Nanyang Technological University Singapore Department of Electronic and Electrical Engineering University College London London UK

This paper is concerned with the design of high performance analogue multipliers using GaAs MESFET technology which use compact entirely active circuits and avoid the need for off-chip transformers or large on-chip baluns using coupled structures. A study by theory and simulation is made of various interface stages which drive the push-pull output FETs and some complete multipliers using various input signal splitters are compared. The need is identified for an improved signal splitter which can be realised in compact MMIC form.

关键词： Gallium arsenide MESFET circuits Active circuits Transformers Impedance matching Coupling circuits Circuit simulation FETs Signal processing MMICs

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