A new design method for IIR filters used in phased array radars for clutter rejection is presented in this paper. The design criteria is the maximisation of the clutter rejection while maintaining adequate bandwidth. ...
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A new design method for IIR filters used in phased array radars for clutter rejection is presented in this paper. The design criteria is the maximisation of the clutter rejection while maintaining adequate bandwidth. This will improve the radar capability of detecting slow moving targets with good clutter rejection by utilising zero frequency initialisation. The superiority of the new filters over current IIR filters optimised for a finite number of samples will be demonstrated by considering their transient frequency responses and improvement factors.< >
A program for the design of leaf cells for silicon compilers of digital VLSI circuits, is being developed. It uses rule based modules to put together basic circuits, check design rules, check designs constraints and t...
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A program for the design of leaf cells for silicon compilers of digital VLSI circuits, is being developed. It uses rule based modules to put together basic circuits, check design rules, check designs constraints and to control each of these constituent tasks. An optimization algorithm, in this case a genetic algorithm, optimizes the layout, under the control of the rule system. The program is divided into modules that can run together using a client-server model.< >
The routing of modern sea-of-gates circuits is a very hard to solve combinatorial problem. The use of three or more layers of metal allows for channelless designs, where area routers are used to connect the pins of a ...
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The routing of modern sea-of-gates circuits is a very hard to solve combinatorial problem. The use of three or more layers of metal allows for channelless designs, where area routers are used to connect the pins of a net. In this paper, we present a new router that aims at combining the good quality of the traditional global/final routing approach with the high efficiency of strictly hierarchical routers. This is achieved by reducing the routing problem until its complexity is manageable. The reduced problem is then solved hierarchically by well-known maze-running algorithms using the divide-and-conquer paradigm. In addition to the ability to handle big circuits efficiently, this approach allows the parallel solution of subproblems, yielding significant speedups even when using workstation networks.< >
An analytic approach to the design of high efficiency tuned power oscillator is presented. By employing large-signal S-parameters, theoretical conditions for optimum operation of the oscillator have been formulated an...
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An analytic approach to the design of high efficiency tuned power oscillator is presented. By employing large-signal S-parameters, theoretical conditions for optimum operation of the oscillator have been formulated and discussed. Loss due to non-zero switching time, saturation resistance etc. of the transistor employed is accounted for. Various oscillators at 900 MHz were designed using the derived theory. Experimental results showed that the measured data are in good agreement with the predicted data.< >
The power consumption and dissipation of electronicsystems is linked to many elements such as display devices, disk drives and even fans; however, the focus of this paper is on the electronic sub-system and specifica...
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The power consumption and dissipation of electronicsystems is linked to many elements such as display devices, disk drives and even fans; however, the focus of this paper is on the electronic sub-system and specifically the power dissipation of integrated circuits. This paper will first briefly motivate the topical concerns about power consumption and dissipation in integrated circuits and will then outline the automated techniques that are currently being developed to reduce power consumption.
To design a 32-bit logarithmic number system (LNS) processor, this paper presents two novel techniques: Digit-Partition (DP) to design log/sub 2/(1.x) function and Iterative Difference by Linear Approximation (IDLA) t...
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To design a 32-bit logarithmic number system (LNS) processor, this paper presents two novel techniques: Digit-Partition (DP) to design log/sub 2/(1.x) function and Iterative Difference by Linear Approximation (IDLA) to design 2/sup 0.x/ function. The experimental result reveals that the proposed design is more attractive than the previous researches in the LNS processor.< >
Present paper deals with the problem of automatic design of the implicit state model (in its decomposed parametric form) of any one-dimensional piecewise-linear (PWL) system. This model consists of the internal and th...
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Present paper deals with the problem of automatic design of the implicit state model (in its decomposed parametric form) of any one-dimensional piecewise-linear (PWL) system. This model consists of the internal and the external parts which provides the possibility of finding the model parameters, i.e. to solve separately the two main problems of an one-dimensional PWL model design: (i) existence of the individual breakpoints of the resultant PWL characteristic (determined by the internal block), (ii) setting of the breakpoint co-ordinates (determined by the external block).< >
The design and simulation of nonlinear switched capacitor autonomous circuits containing nonlinear active resistor is described in this paper. First, a new kind of SC nonlinear active resistor circuit is proposed. The...
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The design and simulation of nonlinear switched capacitor autonomous circuits containing nonlinear active resistor is described in this paper. First, a new kind of SC nonlinear active resistor circuit is proposed. Then the novel SC nonlinear active resistor is used in the design of nonlinear SC autonomous circuits, in particular, a N/sub R/LC SC oscillator circuit and an autonomous circuit derived from Chua's circuit. Finally the computer simulation of N/sub R/LC SCO and chaotic oscillation of the three order SC autonomous circuit are discussed and some results are presented in this paper.< >
Linear multistep (LMS) integration formulas are frequently applied to the numerical solution of differential equations. If the used LMS integration formula complies with a particular kind of numerical stability, so-ca...
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Linear multistep (LMS) integration formulas are frequently applied to the numerical solution of differential equations. If the used LMS integration formula complies with a particular kind of numerical stability, so-called A-stability, the simulation algorithm of a physical system will be stable. A-stability turns out to be contrary to a most used definition of mathematical accuracy for these formulas. Moreover, LMS integration formulas may also be considered from the point of view of electrical network theorems. This approach leads to a new approximation, which is similar to the filter design problem and which is not in contradiction to the A-stability requirement of integration formulas.< >
This paper presents rigorous conditions, without the independence assumption on the input signal, for the first and second moment convergence of the gradient adaptive algorithms including FIR and IIR (equation error m...
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This paper presents rigorous conditions, without the independence assumption on the input signal, for the first and second moment convergence of the gradient adaptive algorithms including FIR and IIR (equation error method) LMS and IV algorithms.< >
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