Complex hardware systemsdesign demands the effective use of organized approaches to design. The VHSIC hardware description language (VHDL) was developed for use in the design process. Traditionally, engineers have de...
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Complex hardware systemsdesign demands the effective use of organized approaches to design. The VHSIC hardware description language (VHDL) was developed for use in the design process. Traditionally, engineers have developed hardware descriptions based on schematic circuit diagrams, which are a visual notation. When using VHDL, designers are hampered by the cumbersome nature of the language syntax. The authors have developed a visual hardware description language, Visual VHDL (vVHDL), that incorporates the major features of VHDL. This paper presents the syntax of vVHDL and the design system used for developing vVHDL programs.< >
The authors have implemented a modular digital coincidence detection circuit in VLSI, which drastically reduces the size and increases the performance of the coincidence detection logic required in a PET (positron emi...
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The authors have implemented a modular digital coincidence detection circuit in VLSI, which drastically reduces the size and increases the performance of the coincidence detection logic required in a PET (positron emission tomography) scanner. Important acquisition features contained within this integrated solution include: (1) prompt and delayed processing channels for each event-pair, with programmable coincidence time windows; (2) event time difference mode, which allows for a fast and accurate system timing calibration algorithm; (3) programmable axial event acceptance, which provides acquisition flexibility from conventional 2-D through fully 3-D sinogram sets; and (4) programmable transaxial field of view, which provides an electronic collimator to ignore event-pairs outside of the desired field of view. The modularity of the design allows it to be used on various system geometries.< >
Factory automation requires that programmable controllers should be very fast and easily designed and that their errors should be analyzed precisely during design and can be detected during operations. As the Petri ne...
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Factory automation requires that programmable controllers should be very fast and easily designed and that their errors should be analyzed precisely during design and can be detected during operations. As the Petri net has a theoretical foundation, such as reachability tree analysis, it is suitable for the description and analysis of sequential control. This paper proposes an error checking hardware scheme for a Petri net sequence controller. The Petri net is very useful to represent parallel events and this controller has realized very high speed sequential control based on the Petri net graph.< >
The performance of an ASIC facility is analyzed f:rom various points of view. The performance is defined as the product of resources and turn-around-time normalized by the throughput. The resources required for the fa...
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The performance of an ASIC facility is analyzed f:rom various points of view. The performance is defined as the product of resources and turn-around-time normalized by the throughput. The resources required for the facility, the amount of equipment and human resources, are estimated using a queueing system model. The ASIC facility has to deliver various kinds of LSIs with different technologies on time to the customers. This requirement makes ASICs more expensive than memory LSIs. In order to improve the performance and reduce the cost, centralized manufacturing and a cell-type shift is proposed. The human resources and their skill are key factors both on the performance and on the turn-around time. The queueing system model is concluded to be applicable to the fundamental design of ASIC manufacturing systems.
The authors present the design and performance of a complete monolithic upconverter macrocell using 0.2- mu m InGaAs/GaAs pseudomorphic high electron mobility transistor (HEMT) technology. Individual components, inclu...
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The authors present the design and performance of a complete monolithic upconverter macrocell using 0.2- mu m InGaAs/GaAs pseudomorphic high electron mobility transistor (HEMT) technology. Individual components, including a 2-10-GHz IF amplifier, a V-band upconverting mixer, and a V-band amplifier are also described. Both linear and nonlinear circuit simulations were performed during the design to predict the circuit performance. The measured results demonstrated a conversion gain of 10 dB at V-band by injecting the 2-10-GHz IF frequency with a local oscillator drive of 10 dBm at 54 GHz.< >
As the sizes of electronic products grow larger, the process of diagnosing failed components becomes increasingly complex. The problem is compounded by the fact that there exists no unified system with which to diagno...
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As the sizes of electronic products grow larger, the process of diagnosing failed components becomes increasingly complex. The problem is compounded by the fact that there exists no unified system with which to diagnose problems at all levels of the product design-integrated circuit (IC), printed circuit board (PCB), and system. This paper presents the results of an industrial experiment with techniques for automating the diagnosis process. The authors have developed a prototype automated fault diagnosis (AFD) system which can input a fault dictionary from either of two different commercial ATPG systems along with results from test pattern application and produce a list of candidate defect sites within a given circuit. The authors ran the prototype against simulated single and multiple stuck-at faults in a portion of a commercial floating point unit and at the PCB level using a special test PCB. Results have been encouraging in that the authors have obtained fairly accurate diagnoses with relatively low coverage stuck-at fault sets and in the presence of simulated non-classical defects. It is possible to produce a uniform methodology for AFD at the IC and PCB levels.< >
This volume contains 193 papers. Some of the topics discussed are: digital filters;neural network architecture;novel electroniccircuits;digital image processing;modeling and simulation;adaptive signal processing;powe...
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This volume contains 193 papers. Some of the topics discussed are: digital filters;neural network architecture;novel electroniccircuits;digital image processing;modeling and simulation;adaptive signal processing;power systems and electronics;VLSI design and applications;and computer aided design.
A semi-random searching algorithm is presented. This algorithm can be used for global optimization problems which can reduce the number of objective function evaluations significantly via a deterministic criterion and...
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A semi-random searching algorithm is presented. This algorithm can be used for global optimization problems which can reduce the number of objective function evaluations significantly via a deterministic criterion and can find a global optimum via a stochastic criterion. The utility of this algorithm is demonstrated by several numerical examples.
The authors present a technique for circuit structure optimization which can be used in an analog design process. The symbolic simulator used in this process can greatly enhance the performance of the proposed method....
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The authors present a technique for circuit structure optimization which can be used in an analog design process. The symbolic simulator used in this process can greatly enhance the performance of the proposed method. An organizational structure is proposed to implement a design strategy to solve specific design problems. The method is a heuristic one and in general provides satisfactory solutions when a class of topologies is constrained. An example is presented in order to show how the proposed technique permits minimization of the cost function while fulfilling the circuit specifications in the class of accepted topologies.
The design of high-frequency GaAs analog sampled data systems using switched capacitor circuit techniques is reviewed including op-amp and switch design and optimization of the circuit for maximum clock-rate. A second...
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The design of high-frequency GaAs analog sampled data systems using switched capacitor circuit techniques is reviewed including op-amp and switch design and optimization of the circuit for maximum clock-rate. A second order switched capacitor bandpass filter example with high precision measured response characteristics for a clock-rate of 500 MHz is discussed. Possible op-amp and switch designs to allow clock-rates around 1 GHz are presented.
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