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EarFDA: A Lightweight and Energy-Efficient Fall Detection Accelerator for Ear-Worn Devices

EarFDA: A Lightweight and Energy-Efficient Fall Detection Ac...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： Zhaodong Lv Hao Sun Yuhao Shu Yajun Ha School of Information Science and Technology ShanghaiTech University China United Imaging Microelectronics Technology Corporation China School of Electronic Science and Engineering Southeast University Nanjing China Shanghai Engineering Research Center of Energy Efficient and Custom AI IC China

ISBN: (数字)9798350330991

ISBN: (纸本)9798350331004

Fall detection systems are crucial in preventing severe injuries among people with limited mobility. However, current systems either employ multiple sensors and redundant features, or adopt computation-intensive detection methods, resulting in a high computational burden and inefficient energy consumption. To address this issue, we propose a lightweight and energy-efficient fall detection accelerator for ear-worn devices, utilizing only one sensor and limited features. First, we propose an accurate and robust pre-processing method that employs a wider overlapping sliding window to extract a superior feature combination. Second, based on the extracted features, we develop a lightweight detection network with low-bit quantization, integrating hybrid convolutions. Third, we design a full-dataflow hardware accelerator for the proposed network to enhance energy efficiency. Experimental results on a public dataset show that the proposed FPGA accelerator achieves superior accuracy compared to the state-of-the-art algorithms running on the CPU, with a speed improvement of at least 31.4 times. Additionally, our accelerator significantly boosts energy efficiency by at least 274 times.

关键词： Accuracy Quantization (signal) Neural networks Sensor phenomena and characterization Feature extraction Energy efficiency Sensor systems

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A programmable DCO-based fast-locking clock generator

A programmable DCO-based fast-locking clock generator

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ieee International symposium on Intelligent Signal Processing and Communication systems (ISPACS)

作者： Fei Qiao Yuan Zhou Xiang Xie Huazhong Yang Tsinghua National Laboratory for Information Science and Technology Department of Electronic Engineering Tsinghua University Beijing China Institute of Microelectronics Tsinghua University Beijing China

A programmable DCO-based fast-locking clock generator is presented. With a resettable DCO, the clock generator achieves similar jitter performance as conventional MDLL and avoids the initial delay constraints by resetting the output clock every two reference cycles. Compared with the previous work, a shorter locking time is obtained. The proposed clock generator is simulated with generic 1.8 V-0.18 ¿m CMOS process. The clock multiplication ratio can be programmed from 2 to 15. The frequency range of the input and output clock are 16.7 ~ 212.5 MHz and 250 ~ 425 MHz, respectively, dissipating less than 32 mW at all operating frequencies.

关键词： Clocks Jitter circuits Phase locked loops Delay lines Frequency Approximation algorithms Signal generators Ring oscillators Algorithm design and analysis

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A PYNQ Evaluation Platform for FPGA Architectures of the Line Hough Transform

A PYNQ Evaluation Platform for FPGA Architectures of the Lin...

引用

Midwest symposium on circuits and systems (MWSCAS)

作者： David Northcote Louise H. Crockett Paul Murray Robert W. Stewart Department of Electronic and Electrical Engineering University of Strathclyde Glasgow Scotland UK

ISBN: (数字)9781728180588

ISBN: (纸本)9781728180595

The Line Hough Transform (LHT) is an effective line detection algorithm for digital images. To meet real-time requirements, Field Programmable Gate Arrays (FPGAs) are often chosen to accelerate the LHT. However, many LHT architectures select different design parameters and discretisation steps for the Hough Parameter Space (HPS). The work presented in this paper describes a novel evaluation platform for FPGA architectures of the LHT. Our system is named the Hough Evaluation Platform (HEP) and can be used to visualise and inspect the HPS produced from LHT architectures that use different design parameters. Architectures are compared by evaluating the HPS using a unique measurement named the Peak to Mean Vote Ratio (PMVR). Our system employs the PYNQ framework on a Xilinx Zynq MPSoC device for the visualisation of the HPS and also determines the processing time of a given LHT architecture. The HEP has been implemented on a XCZU7EV-2e device and can operate up to a target frequency of 250 MHz.

关键词： Computer architecture Image edge detection Field programmable gate arrays Visualization Software Hardware Transforms

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A novel prescaler for silicon bipolar multi-Gigahertz applications

A novel prescaler for silicon bipolar multi-Gigahertz applic...

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ieee symposium on Radio Frequency Integrated circuits (RFIC)

作者： T. Copani S.A. Smerzi G. Palmisano Facola di Ingegneria Universita di Catania Catania Italy STMicroelectronics Inc. Catania Italy

High-speed prescalers are critical blocks when designing circuits for multi-GHz applications as well as for new optical-fiber networks. In this paper, an enhancement technique is shown for Si-bipolar E/sup 2/CL dividers. The proposed circuit allows high-speed operation despite a low supply voltage while it avoids using emitter followers which could lead to dangerous unwanted oscillations. A divide-by-8 prescaler was fabricated in a 46-GHz-f/sub T/ Si-bipolar technology to work within a 10-GHz output frequency PLL. Measurements show the circuit works reliably up to 12 GHz and can still operate at 11 GHz with a supply voltage as low as 2.7 V.

关键词： Silicon circuits Phase locked loops CMOS technology Frequency conversion Frequency synthesizers Flip-flops Digital video broadcasting electronic mail Optical design

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High-power hybrid quasi-optical Ka-band amplifier design

High-power hybrid quasi-optical Ka-band amplifier design

引用

Microwave, MTT-S International symposium

作者： J. Hubert J. Schoenberg Z.B. Popovic Electronic Systems Martin Marietta Orlando FL USA Department of Electrical and Computer Engineering University of Colorado Boulder USA

We report the first demonstration of a quasi-optical millimeter-wave amplifier. The cell consists of a MMIC driver followed by a two-stage high power amplifier chip. Input as well as output antennas are anti-resonant slots fabricated on a GaAs monolithic antenna array. A 6/spl times/6 array is designed for an output power in excess of 8 Watts. The array allows a variety of MMIC amplifier chips to populate any number of cells up to the full array size. An absolute power gain of 6 dB was achieved at 29 GHz. A liquid-cooled test fixture was designed to remove excess heat from the amplifiers. Amplifiers of this type could be used in communication or radar systems to produce high power with reduced size, weight, and lower system cost.< >

关键词： High power amplifiers MMICs Slot antennas Millimeter wave communication Millimeter wave radar Driver circuits Gallium arsenide Antenna arrays Power generation Power amplifiers

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A Convolutional Neural Network Accelerator Architecture with Fine-Granular Mixed Precision Configurability

A Convolutional Neural Network Accelerator Architecture with...

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ieee International symposium on circuits and systems (ISCAS)

作者： Xian Zhou Li Zhang Chuliang Guo Xunzhao Yin Cheng Zhuo College of Information Science and Electronic Engineering Zhejiang University Hangzhou China

ISBN: (数字)9781728133201

ISBN: (纸本)9781728133218

Convolutional neural networks (CNNs) have been widely deployed in deep learning applications, especially on power hungry GP-GPUs. Recent efforts in designing CNN accelerators are considered as a promising alternative to achieve higher energy efficiency. Unfortunately, with the growing complexity of CNN, the demanded computational and storage resources for accelerators keep increasing, hindering its wider applications in mobile devices. On the other hand, many quantization algorithms have been proposed for efficient CNN training, which brings many small or zero weights. This is a unique opportunity for accelerator designers to employ much fewer bits, e.g., 4 bits, in both arithmetic core and storage, thereby saving significant design cost. However, such a single precision strategy inevitably compromises the accuracy as some key operations may demand a higher precision. Thus, this paper proposes a low power CNN accelerator architecture that can simultaneously conduct computations with mixed precisions and assign the appropriate arithmetic cores to operation with different precision demands. This proposed architecture can achieve significant area and energy savings, without accuracy compromise. The experimental results show that the proposed architecture implemented on FPGA can reduces almost half of the weight storage and MAC area, and lower the dynamic power by 12.1% when compared with a state-of-the-art CNN accelerator design.

关键词： Accelerator architectures Arrays Indexes Registers Convolutional neural networks

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Series connection of power switches for very high power applications and zero voltage switching

Series connection of power switches for very high power appl...

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ieee International symposium on Industrial electronics (ISIE)

作者： E.H. Watanabe M. Aredes L.F.W. de Souza M.D. Bellar Programa de Engenharia Eleétrica Universidade Federal do Rio de Janeiro Rio de Janeiro Brazil Centro de Pesq.de Enérgia Eleéctrica CEPEL Rio de Janeiro Brazil Department of Electrical Engineering Texas A and M University USA Faculdade de Engenharia Departamento de Eletrônica University do Estado do Rio de Janeiro Rio de Janeiro Brazil

The basic theoretical analysis for series connection of semiconductor power switches (valve) for zero voltage switching (ZVS) is presented. The influence of the switching devices parameters on the switches voltage distribution during steady- and transient-state conditions are analyzed. It is shown that when ZVS technique is used the design of the voltage equalization elements is easier than when hard switching is used. Simulated results are presented to validate the analysis and design methodology. This work is supposed to be important for very high-power soft-switching valves and converter designs.

关键词： Zero voltage switching Valves Thyristors circuits Power semiconductor switches electronic mail Flexible AC transmission systems Insulated gate bipolar transistors Resonance Transient analysis

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Analytical dynamic time delay model of strongly coupled RLC interconnect lines dependent on switching

Analytical dynamic time delay model of strongly coupled RLC ...

引用

ieee International symposium on Quality electronic design

作者： Seongkyun Shin Yungseon Eo W.R. Eisenstadt Jongin Shim Department of Electrical and computer Engineering Hanyang University Ansan Kyunggi South Korea Department of Electrical and computer Engineering University of Florida Gainesville FL USA

In today's UDSM(ultra-deep-sub-micron)-process-technology-based ICs, dynamic delay variations of strongly coupled lines (due to neighboring net switching activity) make static timing analysis problematic. In this paper, new analytical timing models for RLC coupled lines are presented and their accuracy is verified. Coupled interconnect lines are decoupled into an effective single line model by using effective capacitances and effective inductances corresponding to switching activity. Their signal transient waveforms of the effective single line models are determined by exploiting the TWA (Traveling-wave-based Waveform Approximation) technique. This is followed by single line analytical timing model development. It is shown that the models have excellent agreement with SPICE simulations for various circuit performance parameters such as line pitch, line length, driver/receiver size, IMD-thickness, and aspect ratio.

关键词： Coupled mode analysis Delay effects Timing Integrated circuit interconnections Analytical models Capacitance SPICE Circuit simulation Circuit optimization Driver circuits

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An LMI criterion for chaos synchronization via the linear-state-feedback approach

An LMI criterion for chaos synchronization via the linear-st...

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ieee International symposium on Computer Aided Control System design (CACSD)

作者： Guo-Ping Jiang Wei Xing Zheng Electronic Engineering Department Nanjing University of Posts and Telecommunications Nanjing China School of Quantitative Methods and Mathematical Sciences University of Western Ontario Penrith NSW Australia

Based on the Lyapunov stability theory in control theory, a new sufficient condition is proposed in this paper for chaos synchronization by the linear-state-feedback approach for a class of chaotic systems. By using Schur theorem and some matrix technique, this criterion is then transformed into the linear matrix inequality (LMI) form, which can be easily verified and resolved using the MATLAB LMI Toolbox. It is shown that under the proposed criterion chaos synchronization can be achieved at an exponential convergence rate. The effectiveness of the criterion proposed herein is verified and demonstrated by the chaotic Murali-Lakshmanan-Chua circuit

关键词： Chaos Chaotic communication Linear matrix inequalities Convergence Australia Stability criteria Control systems MATLAB circuits Communication system control

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Thin film battery recharging from micropower energy harvesting sources

Thin film battery recharging from micropower energy harvesti...

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ieee International symposium on Applications of Ferroelectrics (ISAF)

作者： Chris Townsend Steve Arms Mike Hamel Jake Galbreath David Churchill MicroStrain Inc. USA

Energy harvesting systems can eliminate the need for battery maintenance. However, in many cases the amount of instantaneously available harvested energy may not be sufficient to power an electronic circuit. Therefore, it is desirable to efficiently accumulate and store energy until enough energy is available to do something practical, such as power a wireless sensor. We conducted a review of energy storage options to allow wireless circuitry to operate in the presence of intermittent ambient energy and to provide an energy reserve for operation when the source of ambient energy has subsided, i.e. the machine is Ç⨍⋅offÇ⨍˘.Ü We found that conventional battery chemistries are not compatible with the low power outputs provided by energy harvesters. However, thin film lithium batteries have nearly ideal characteristics for use as an energy storage element in energy harvesting circuits. Thin film lithium batteries have high energy density per unit volume (450 WHh/L), low loss due to self discharge (<1%/year), and are extremely thin (<20 microns thick) and flexible. Furthermore, they can be trickle charged at extremely low currents, they can tolerate more than 60,000 charge/discharge cycles, and they exhibit high charging efficiency. However, thin film batteries have several downsides, including low capacity and strict recharging requirements once the battery has been fully depleted. Successful use of these batteries requires careful design of the recharging and application load disconnect circuitry. This paper will review charging circuitry requirements and present several practical energy harvesting wireless sensor applications utilizing thin film batteries.

关键词： Transistors Batteries Thin film circuits Wireless sensor networks Energy storage Lithium Thin film sensors electronic circuits Chemical sensors Chemistry

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