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The design of a low-power low-noise phase lock loop

The design of a low-power low-noise phase lock loop

引用

ieee International symposium on Quality electronic design

作者： Abishek Mann Amit Karalkar Lili He Morris Jones Department of Electrical Engineering San Jose State University Foundation CA USA

ISBN: (纸本)9781424464548

A phase lock loop is a closed-loop system that causes one system to track with another. More precisely, a PLL can be perceived as a circuit synchronizing an output signal with a reference or input signal in frequency as well as phase. High-performance phase lock loops are widely used within a digital system for clock generation, timing recovery, and to efficiently sequence operations and synchronize between function units and ICs As the digital system grows the role of phase lock loop increases. Achieving low jitter and phase noise in phase lock loop with less area and power consumption is challenging. The present research relates to characterization and redesign of individual blocks of Phase lock loop (PLL) to improve its characteristics. More specifically redesigning of individual blocks like: Phase Frequency Detector to reduce area and static phase error, Voltage to Current converter to linearly increase the current input to the current controlled oscillator, Current Controlled Oscillator to reduce phase noise, amplitude distortion, area and power consumption. We also introduce an additional feedback loop to increase the gain of the charge pump in a manner that linearizes the overall loop gain over wide bandwidth. The Results are substantial improvements in the PLL characteristics such as low jitter, phase noise, area and power consumption.

关键词： Phase locked loops Phase noise Energy consumption Frequency synchronization Digital systems Jitter Voltage control Oscillators Tracking loops circuits

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A compact DC and AC model for circuit simulation of high voltage VDMOS transistor

A compact DC and AC model for circuit simulation of high vol...

引用

ieee International symposium on Quality electronic design

作者： Y.S. Chauhan C. Anghel F. Krummenacher R. Gillon A. Baguenier B. Desoete S. Frere A.M. Ionescu M. Declercq Ecole Polytechnique Fédérale de Lausanne Switzerland AMI Semiconductors Inc. Belgium Cadence Design Systems Inc. France

A modeling strategy for high voltage VDMOS transistors based on the intrinsic drain voltage and the use of EKV MOSFET model as a core for the intrinsic MOS channel is presented. The proposed charge based model correctly reproduces the special effects of high voltage devices like the quasi saturation, impact ionization and self heating. The accuracy of the model is better than 5% for DC I-V and g-V characteristics. We also report the accurate simulation of the intrinsic drain voltage, V K , which represents the basis of the AC model. The unique peaks on C gs and C gd characteristics peculiar to high voltage devices are accurately simulated by this charge based model. It is demonstrated that this model provides excellent trade-off between speed, convergence and accuracy, being suitable for circuit simulation in any operation regime of HV MOSFETs including all special effects of these devices

关键词： Circuit simulation MOSFET circuits Low voltage Convergence Ambient intelligence Impact ionization Heating Multichip modules Integrated circuit technology Robustness

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Fast Beam Steering Control of Arrays Using Low-Cost Single Board Computers

Fast Beam Steering Control of Arrays Using Low-Cost Single B...

引用

ieee International symposium on Phased Array systems and Technology

作者： William Stevers Daniel Paradis Brett Ryan Air Force Research Laboratory Communication Transmission Section Rome NY USA

ISBN: (数字)9798350392142

ISBN: (纸本)9798350392159

Modern active electronically steered arrays (AESAs) enable highly directional electronic beamforming techniques with an aperture that has a fixed, physically small footprint. By utilizing beamforming radio frequency integrated circuits (RFICs) instead of a digital beamformer, such AESAs can be manufactured in a modular form factor with an industry standard control interface. Modern analog beamforming AESA architecture also decouples the array panel and controller from the radio, greatly reducing communication system complexity. The current practice for designing AESA controllers involves the creation of unique firmware-based controllers that must be designed for a specific AESA panel. Such controllers are expensive to develop and inhibit the modularity of the panel while offering limited functionality to the end-user and hindering future system upgrades. By moving AESA control from firmware to software with a commercial of the shelf (COTS) single-board computer (SBC), the expense of an AESA controller can be greatly reduced in terms of both the non-recurring engineering (NRE) and controller hardware cost. This design approach also creates a reusable software framework that can be quickly modified for controlling different AESA panels with the same low-cost controller. This paper explains how to implement AESA beam steering in software and then demonstrates the performance of a SBC AESA controller that was created with a Raspberry Pi 4 and a low-cost printed circuit board (PCB) daughter card.

关键词： Phased arrays Beam steering Array signal processing Printed circuits Universal Serial Bus Software Radiofrequency integrated circuits Hardware Central Processing Unit Standards

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Development and Test of a Data Framework for Prediction of Soldering Quality in Selective Wave Soldering Applying K-Nearest Neighbors

Development and Test of a Data Framework for Prediction of S...

引用

International symposium for design and Technology of electronics Packages (SIITME)

作者： Reinhardt Seidel Nils Thielen Konstantin Schmidt Christian Voigt Jörg Franke Institute for Factory Automation and Production Systems (FAPS) Friedrich-Alexander University Erlangen-Nürnberg (FAU) Nürnberg Germany

ISBN: (数字)9781728175065

ISBN: (纸本)9781728175072

Machine Learning has been proven to be a powerful tool to model and predict complex applications. Selective wave soldering is a widely applied interconnection technology for THT components. It is mostly used if components are not substitutable by surface mount devices due to high thermal load or mechanical stress. Especially in power electronic circuit boards, large copper layers or high thermal mass components lead to critical soldering situations. This paper suggests a Machine Learning framework to identify thermally challenging solder joints. The hybrid approach consisting of an analytical thermal description of THT components and solder joints in the multilayer circuit board and the ML analysis allows the prediction of arbitrarily complex solder joint configurations. The data framework represents electronic components and solder joints. Utilizing solder joint, component and soldering process parameters as input, the K-Nearest Neighbors algorithm predicts the probable hole fill following IPC-A-610 with an overall accuracy of about 75%.

关键词： Soldering Copper Printed circuits Pins Thermal resistance electronic packaging thermal management Machine learning

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Collaborative visual analysis with RCloud

Collaborative visual analysis with RCloud

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ieee symposium on Visual Analytics Science and Technology (VAST)

作者： Stephen North Carlos Scheidegger Simon Urbanek Gordon Woodhull Infovisible University of Arizona AT&T Labs

Consider the emerging role of data science teams embedded in larger organizations. Individual analysts work on loosely related problems, and must share their findings with each other and the organization at large, moving results from exploratory data analyses (EDA) into automated visualizations, diagnostics and reports deployed for wider consumption. There are two problems with the current practice. First, there are gaps in this workflow: EDA is performed with one set of tools, and automated reports and deployments with another. Second, these environments often assume a single-developer perspective, while data scientist teams could get much benefit from easier sharing of scripts and data feeds, experiments, annotations, and automated recommendations, which are well beyond what traditional version control systems provide. We contribute and justify the following three requirements for systems built to support current data science teams and users: discoverability, technology transfer, and coexistence. In addition, we contribute the design and implementation of RCloud, a system that supports the requirements of collaborative data analysis, visualization and web deployment. About 100 people used RCloud for two years. We report on interviews with some of these users, and discuss design decisions, tradeoffs and limitations in comparison to other approaches.

关键词： Data visualization Data analysis Visual analytics Production Collaboration Organizations electronic mail

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Application of radial line slot antenna to millimeter-wave systems at 60 GHz band

Application of radial line slot antenna to millimeter-wave s...

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Antennas and Propagation Society International symposium

作者： T. Yamamoto M. Ando N. Goto M. Takahashi Department of Electrical and Electronic Engineering Faculty of Engineering Tokyo Institute of Technology Tokyo Japan Department of Electronics and Communication Engineering Faculiy of Engineering Musashi Institute of Technology Tokyo Japan

In recent years, various types of system in millimeter-wave band have been developed. In a millimeter-wave system, it is suitable to make use of an antenna without feed loss. A radial line slot antenna (RLSA) is a slotted waveguide planar antenna proposed for direct broadcast from satellite (DBS) subscribers in the 12 GHz band. Since this antenna utilizes a waveguide as a feed circuit, a high efficiency is theoretically expected irrespective of the frequency. This paper presents the design of RLSA at 60 GHz band and predicts its performance.

关键词： Slot antennas Satellite broadcasting Antenna feeds Millimeter wave circuits Satellite antennas Planar waveguides Planar arrays Antenna theory Waveguide theory Frequency

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Machine Learning based Surrogate Modeling for Wave Impedances in Rectangular Dielectric Waveguides

Machine Learning based Surrogate Modeling for Wave Impedance...

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Microwave, MTT-S International symposium

作者： Robin Schmitz Birk Hattenhorst Christoph Baer Thomas Musch Ilona Rolfes Institute of Microwave Systems Ruhr University Bochum Germany Institute of Electronic Circuits Ruhr University Bochum Germany

Even though the behavior of rectangular dielectric waveguides (RDWGs) can be evaluated accurately using numerical simulations, limited time and computational resources generally do not allow an extensive exploration of the design space. Thus, in this paper we present a way to develop a fast-to-evaluate surrogate model for the wave impedance of the fundamental mode HE 11 in RDWGs at frequencies between 134 and 141 GHz. To this end, gaussian process regression (GPR) with a customized covariance function as well as artificial neural networks (ANNs) and polynomial regression (PR) are applied. Compared by the mean absolute deviation (MAD), our finally proposed model shows much better agreement with numerical solutions than Maractili’s famous approximate analytical approach (MA). In contrast to MA, our approach is furthermore applicable to DWGs with arbitrary cross-sections.

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CM-EMI Prediction for 3-Level T-Type Traction Inverters using Wideband-Kriging

CM-EMI Prediction for 3-Level T-Type Traction Inverters usin...

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ieee International symposium on Electromagnetic Compatibility - EMC Europe

作者： Patrick D. Gsoels Jose Romero Lopera Akash Franz Vollmaier Jan C. Hansen Research Division Power Electronics Silicon Austria Labs GmbH Austria Christian Doppler Laboratory for EMC Aware Robust Electronic Systems Austria Institute of Electronics Graz University of Technology Austria Dept. of Electrical Communication Engineering Indian Institute of Science India

ISBN: (数字)9798350307351

ISBN: (纸本)9798350343045

The trend towards more sustainable mobility through electric vehicles (EVs) drives research and industry to develop more power efficient and compact power electronic circuits. The powertrain of an electric vehicle consists of an inverter (DC to AC converter) and an electric motor. To further push the performance limits, there is nowadays a trend in research and industry towards the capabilities of 3-Level based inverter typologies. The need to design a system that is electromagnetic compatibility (EMC) compliant is as much a concern as system efficiency. Surrogate model based approaches have been proven useful to predict electromagnetic emissions for simple power electronic circuits. The aim of this work is to show what surrogate model based approaches are capable of in terms of EMI prediction, even when the system complexity is high, as in the case of 3-Level T-Type traction inverters. This opens up a promising new way of predicting and optimising the electromagnetic emissions of electric vehicle’s powertrain without the need for costly prototyping.

关键词： Industries circuits Mechanical power transmission Predictive models Electromagnetic compatibility Electric vehicles Market research Inverters Integrated circuit modeling Electromagnetics

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Conductance Enhancement of C-shaped Graphene Nanoribbon Circuit Interconnect through Defect Treatment

Conductance Enhancement of C-shaped Graphene Nanoribbon Circ...

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Sustainable Energy, Signal Processing and Cyber Security (iSSSC), ieee International symposium on

作者： Ajit K. Sahu Narayan Sahoo Madhusudan Mishra Sukanta. K. Tripathy Naba. K. Sahoo Trinath Sahu Nikhil Ranjan Das Department of Electronic Science Berhampur University Berhampur Odisha INDIA Centre of Excellence in Nano Science and Technology for the Development of Sensors Berhampur University Berhampur Odisha INDIA Institute of Radio Physics and Electronics University of Calcutta Kolkata WB INDIA

ISBN: (纸本)9781665490573

We investigate the enhancement of the conductance of a dual bend (C-shaped) graphene interconnect by introducing various defect patterns. For certain defect patterns, an increase in conductance is observed. The defect pattern is optimized to a double atomic irregular defect pattern. It is important to note that implantation of the proposed defect pattern in the C-shaped interconnect results in a conductance of 1 e 2 /h at zero energy value, which is almost insensitive to a change in interconnect width. This study can aid in the realization of compact and efficient 2D electronic circuits, paving the way for modern VLSI design and Embedded System.

关键词： Embedded systems Shape Graphene Integrated circuit interconnections Very large scale integration Conductivity Signal processing

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Towards next-generation design-for-manufacturability (DFM) frameworks for electronics product realization

Towards next-generation design-for-manufacturability (DFM) f...

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ieee/CHMT(CPMT) International electronics Manufacturing Technology symposium

作者： M. Bajaj R. Peak M. Wilson Injoong Kim T. Thurman M.C. Jothishankar M. Benda P. Ferreira J. Stori Engineering Information Systems Lab GWW School of Mechanical Engineering Georgia Institute of Technology Atlanta CA USA Georgia Tech (GIT) GWW School of Mechanical Engineering Atlanta GA Manufacturing Research Center Georgia Institute of Technology Atlanta GA USA Georgia Tech (GIT) Manufacturing Research Center Atlanta GA Rockwell Collins (ReI) Cedar Rapids Iowa USA Rockwell Collins (ReI) Cedar Rapids Iowa Department of Mechanical and Industrial Engineering University of Illinois at Urbana Champaign (VIUe) Urbana IL USA

This paper elucidates the process architecture of a pilot implementation of a DFM Framework (specifically the SFM DFM Framework or SDF), which consists of four key ingredients. The first ingredient is a design Integrator that acquires product design information from an ECAD tool and in-house sources (each populating a subset of the design) and consolidates them into a STEP AP210 model. The second ingredient is a Rule-based Expert System (initiated at Boeing) that captures the manufacturability constraints as DFM rules and evaluates printed circuit assembly (PCA) designs against them. The third ingredient is a design View Generator that extracts design information from the AP210 model (first ingredient) and library database and derives a Kappa design model for the expert system (second ingredient) to evaluate. The fourth ingredient is the Results Viewer that helps the user browse DFM analysis results and identify design improvement opportunities. This implementation of the SDF demonstrates the ability to extract PCA design information and build a higher fidelity standards-based design model. Additionally, it also shows the capability of Rule-based Expert systems to emulate manufacturability checks on product (PCAs in this case) designs as well as increase analysis coverage and reduce human checking time via automation.

关键词： design for manufacture Expert systems Principal component analysis Data mining Manufacturing automation Product design electronic design automation and methodology Printed circuits Assembly systems Libraries

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