The modeling of multilayer distributed RC lines by lumped elements for the network simulator SPICE are explained. This tool allows an accurate prediction of the frequency, time domain, and noise behavior of monolithic...
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The modeling of multilayer distributed RC lines by lumped elements for the network simulator SPICE are explained. This tool allows an accurate prediction of the frequency, time domain, and noise behavior of monolithic active filters consisting of lumped and distributed elements. Measured values of an active mask programmable lowpass filter in CMOS technology is cited.
The following topics are dealt with: modeling, simulation, and reliability of GaAs devices;routing;switched-capacitor network analysis;statistical signal processing;number-theoretic architectures for digital signal pr...
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The following topics are dealt with: modeling, simulation, and reliability of GaAs devices;routing;switched-capacitor network analysis;statistical signal processing;number-theoretic architectures for digital signal processing;scattering, signal processing, and networks;network theory;signal processing using GaAs technology;VLSI for video signal processing;sensor technology;median filters;layout design;dynamic system analysis;integrated filters;artificial neural systems;parallel and pipelined implementation;nonlinear theory and testing;adaptive filters;A/D converters;graph theory;high-speed VLSI;systolic array processing;placement and partitioning;electronic circuit simulation;IIR digital filters;bifurcation and chaos in nonlinear systems;multidimensional systems;adaptive signal processing;spatial signal processing;nonlinear systems;digital signal hardware;power electronics;and multidimensional filters. 271 papers were presented, all of which are published in full in the present proceedings.
This symposium proceedings contains 84 papers. The following topics are dealt with: the US Air Force MATE Program;the US Navy CASS Program;the US Army IFTE Program;RF testing;artificial intelligence;maintenance and tr...
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This symposium proceedings contains 84 papers. The following topics are dealt with: the US Air Force MATE Program;the US Navy CASS Program;the US Army IFTE Program;RF testing;artificial intelligence;maintenance and training;design for testability;ATPG techniques;instrumentation technology;diagnostic techniques;TPS development;military testing;digital testing;electrooptics testing;test methods;integrated diagnostics/testability;and documentation and training. Abstracts of individual papers can be found under the relevant classification codes in this or other issues.
ZT-P is a small air-core toroidal reversed field pinch experiment operated as a prototype for the larger air-core ZT-H machine. The detailed design, construction, and electrical test results of dual, stereophonic, har...
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ZT-P is a small air-core toroidal reversed field pinch experiment operated as a prototype for the larger air-core ZT-H machine. The detailed design, construction, and electrical test results of dual, stereophonic, hard tube, feedback regulated amplifiers are presented. The amplifiers are a typical transformer coupled, grounded cathode design, with one capacitor bank having a floating connection. Centralized controls in each cabinet translate fiber-optic control room signals and provide self-monitoring diagnostics. Control room signals would include trigger, voltage, fault, and abort commands. Localized functions entail protection systems, tube diagnostics, fire/pre-fire detectors, feedback signals, and interlock-related functions. Also common to each tube bank are their related AC and power distribution circuits. Test results describing the ability for the AM link to provide good bandwidth and signal-to-noise ratio with reasonable linearity. The signal-to-noise ratio was found to be well over 66 dB with greater than -2 MHz bandwidth.
This paper describes the analysis, design, and development of a high-speed A/D and D/A converter using phase-quantization sampling. A monolithic GaAs A/D and D/A converter has been demonstrated within a RF signal acqu...
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This paper describes the analysis, design, and development of a high-speed A/D and D/A converter using phase-quantization sampling. A monolithic GaAs A/D and D/A converter has been demonstrated within a RF signal acquisition system. Performance data on the monolithic IC reveals that the 3-bit quantization system exhibits signal reconstruction with harmonic suppression exceeding -25 dB across an IF bandwidth of greater than 900 MHz.
A computerized aid to the electronicdesign process, called the Logic designer's Apprentice (LDA), is described. The LDA is a knowledge-based computer program (an expert system) that designs digital electronic cir...
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A computerized aid to the electronicdesign process, called the Logic designer's Apprentice (LDA), is described. The LDA is a knowledge-based computer program (an expert system) that designs digital electroniccircuits. The LDA extends existing CAD/CAE capabilities by providing a computer aid to the design process, supplementing those that assist the drafting, layout, and simulation processes. It seeks to ensure that appropriate testability features are incorporated during the earliest stages of design in accord with the guidelines defined for integrated diagnostics.
A VLSI graded bipolar/CMOS (BICMOS) combined technology and its device performance are presented. A discussion of the inherent features and design facilities for the monolithic system integration is given, followed by...
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A VLSI graded bipolar/CMOS (BICMOS) combined technology and its device performance are presented. A discussion of the inherent features and design facilities for the monolithic system integration is given, followed by the presentation of design techniques for digital as well as analog BICMOS circuits.
A new method for computer-aided design of automatic gain control circuits (AGCs) is presented. The method is a practical application of theory presented previously. It is, in particular, suitable for design of integra...
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A new method for computer-aided design of automatic gain control circuits (AGCs) is presented. The method is a practical application of theory presented previously. It is, in particular, suitable for design of integrated circuit AGCs. The algorithm incorporates SPICE simulation of specific gain-controlled amplifiers and detectors. The algorithm has been implemented as a Fortran program. It applies to the design of a noncoherent AGC which has a large dynamic range and adjustable AGC curve.
design techniques are proposed for voltage-to-frequency (V/F) and frequency-to-voltage (F/V) converters with no external control clock, circuits of which consist of switched-capacitor (SC) amplifiers. Their characteri...
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design techniques are proposed for voltage-to-frequency (V/F) and frequency-to-voltage (F/V) converters with no external control clock, circuits of which consist of switched-capacitor (SC) amplifiers. Their characteristics and experimental results are also discussed. These converters can operate with no external control clock and can be configured with a few MOSFETs and an SC circuit. It is anticipated that these converters will occupy less area and consume less electric power in comparison with ordinary V/F or F/V converter systems. The proposed converters can be applied to VCOs, simple FM systems, simple MODEM systems, analog dividers and analog multipliers.
The author derives a number of tapped delay line processing structures to approximate a variable-length tapped delay line for broadband array null steering over a certain bandwidth. The derivation is based on the maxi...
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The author derives a number of tapped delay line processing structures to approximate a variable-length tapped delay line for broadband array null steering over a certain bandwidth. The derivation is based on the maximally flat principle, so that the tapped delay line filter frequency response and its derivatives are equal to those of the variable-length tapped delay line at the center frequency as far as possible. The performance of these structures is then studied and elegant design equations derived.
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