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检索条件"任意字段=IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems"

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Transmission Line Based CDM ESD Current Target to Overcome Bandwidth Limitations

Transmission Line Based CDM ESD Current Target to Overcome B...

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ieee International symposium on Electromagnetic Compatibility - EMC Europe

作者： Gabriel Fellner David Pommerenke Lena Zeitlhoefler Friedrich Zur Nieden Institute of Electronics Graz University of Technology Austria Christian Doppler Laboratory for EMC Aware Robust Electronic Systems Austria Infineon Technologies AG Germany

ISBN: (数字)9798350307351

ISBN: (纸本)9798350343045

Reducing charged device model (CDM) electrostatic discharge (ESD) target levels for advanced integrated circuits (ICs) and systems on chip (SoCs) enables cost-effective manufacturing. Notably fast rise times, as low as 20 ps, have been observed for CDM events below 250 V. Previous investigations have highlighted fast rise times as critical parameters for damage in CDM testing of devices. These rapid rise times result in spectral frequency content exceeding 17.5 GHz, surpassing the bandwidth of existing CDM current targets employing disk resistors. To overcome this bandwidth limitation, a CDM current target comprised of parallel-connected transmission lines has been developed. Full-wave simulation results confirm the design of an initial prototype. Time-domain measurements conducted in an experimental setup exhibit exemplary results, with potential for further enhancement through de-embedding techniques.

关键词： Time-frequency analysis Voltage measurement Current measurement Simulation Electrostatic measurements Bandwidth Transmission line measurements Electrostatic discharges Electromagnetic compatibility Discharges (electric)

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Detection of Breast Cancer ESR1 p.E380Q Mutation on an ISFET Lab-on-Chip Platform

Detection of Breast Cancer ESR1 p.E380Q Mutation on an ISFET...

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ieee International symposium on circuits and systems (ISCAS)

作者： George Alexandrou Nicolas Moser Jesus Rodriguez-Manzano Pantelis Georgiou Jacqui Shaw Charles Coombes Chris Toumazou Melpomeni Kalofonou Department of Electrical and Electronic Engineering Imperial College London SW7 2BT UK Centre for Bio-Inspired Technology Institute of Biomedical Engineering Imperial College London SW7 2BT UK Leicester Cancer Research Centre Department of Genetics and Genome Biology University of Leicester LE2 7LX UK Division of Cancer Department of Surgery and Cancer Imperial College London SW7 2AZ UK

ISBN: (数字)9781728133201

ISBN: (纸本)9781728133218

This paper presents a method for detection of ESR1 p.E380Q, a common Breast Cancer (BC) mutation, using an ISFET (Ion-Sensitive Field-Effect Transistor) based Lab-on-Chip (LoC) platform. The LoC contains an ISFET array that can detect pH changes during DNA amplification, specifically Loop-Mediated Isothermal Amplification (LAMP). Synthetic ESR1 DNA was detected in a comparison pH-LAMP assay, carried out on the LoC platform as well as a conventional qPCR instrument. Positive detection of the allele arises due to bespoke allele-specific primers that target one base-pair difference between the wild-type and mutant alleles. The LoC and qPCR demonstrate comparable results detecting the mutant allele with mutant primers in around 25 minutes. The sensing microchip technology coupled with the molecular methods of isothermal chemistries and primer design allow this platform to be tested at a Point-of-Care setting for breast cancer patients, offering mutational tracking platform of circulating tumour DNA in liquid biopsies to assist patient stratification and allow tailored treatments.

关键词： DNA Tumors Breast cancer Lab-on-a-chip Instruments

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A DPA-Resistant Asynchronous-Logic NoC Router with Dual-Supply-Voltage-Scaling for Multicore Cryptographic Applications

A DPA-Resistant Asynchronous-Logic NoC Router with Dual-Supp...

引用

ieee International symposium on circuits and systems (ISCAS)

作者： Weng-Geng Ho Ne Kyaw Zwa Lwin Nay Aung Kyaw Jun-Sheng Ng Juncheng Chen Kwen-Siong Chong Bah-Hwee Gwee Joseph S. Chang IC Design Centre of Excellence − VIRTUS School of Electrical and Electronic Engineering Nanyang Technological University 50 Nanyang Avenue Singapore 639798

ISBN: (数字)9781728133201

ISBN: (纸本)9781728133218

We propose a 5-port asynchronous-logic Network-on-Chip (ANoC) router based on the Sense-Amplifier Half-Buffer (SAHB) approach for cryptographic processing cores to counteract side channel attack differential power analysis (DPA) in multicore platform. There are three features in the proposed DPA-resistant ANoC router. First, the proposed ANoC router embodies dual-supply-voltage SAHB cells, where the non-critical subsidiary supply voltage is adjustable from 0.3V to 1.2V, increasing the noise variance and hence reducing the Signal-to-Noise (SNR) ratio to hide the information leakage. Second, the proposed ANoC router performs as a noise engine by increasing the number of power-on IO ports, further randomizing the overall power dissipation. Third, the proposed ANoC router can switch between DPA-resistant mode and energy-efficient nominal (non-secure) mode, saving the power dissipation when the DPA secure countermeasure is unnecessary. Based on 65nm CMOS process, the multicore platform embedded with the proposed ANoC router is implemented, and the experiment is demonstrated by running the advanced encryption standard (AES) cryptography operation. When benchmarked against the nominal mode, the noise power variance of the proposed ANoC router increases by 2.3× in the DPA-resistant mode, reducing the overall SNR ratio by 56%. When comparing to other reported noise engines, our proposed ANoC router is one of the most DPA-secure, area-efficient and power-efficient designs for multicore cryptographic applications.

关键词： Multicore processing Cryptography IP networks Signal to noise ratio Engines Power dissipation Switches

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A distributed scalable SiGe power device large signal model based on MEXTRAM 504

A distributed scalable SiGe power device large signal model ...

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ieee symposium on Radio Frequency Integrated circuits (RFIC)

作者： S.-W. Yoon J. Laskar D.H. Cho K.S. Hong H.J. Shin K.W. Park S.D. Yi K.P. Suh B.H. Park Georgia Electronic Design Center School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA USA RF Technology Development System LSI Division Samsung Electronics Company Limited Yongin si Gyeonggi South Korea

We present a large signal power device model consisting of MEXTRAM BJT models of a small unit device and external lumped elements explaining all the parasitic effects resulting from the interconnection layout. The parasitic elements are included in the model in a distributed way. For the unit device, the device with an emitter size of 24 /spl mu/m/sup 2/ is modeled by a MEXTRAM 504 BJT model, which shows accurate high-current behaviors such as Kirk effect, high-injection effect, and quasi-saturation effect. The power device with an emitter size of 480 /spl mu/m/sup 2/ is designed to verify the model. DC, small signal, and large signal measurements are compared with the simulation results using the model; both results are quite well matched not only on DC and small signal characteristic, but also on large signal characteristic under a self-biasing condition with the same input and output matching impedances.

关键词： Silicon germanium Germanium silicon alloys Power system modeling Integrated circuit interconnections Heterojunction bipolar transistors Signal design High power amplifiers Gallium arsenide Power engineering computing design engineering

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Performance of switched mode arbitrary excitation using Harmonic Reduction Pulse Width Modulation (HRPWM) in array imaging applications

Performance of switched mode arbitrary excitation using Harm...

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ieee International Ultrasonics symposium

作者： D. M. J. Cowell T. Carpenter P. Smith C. Adams S. Harput S. Freear School of Electronic and Electrical Engineering University of Leeds UK

ISBN: (纸本)9781467398985

Switched excitation allows the miniaturisation of excitation circuitry for transducer integrated front ends, high channel count and portable ultrasound systems. Harmonic Reduction Pulse Width Modulation (HRPWM) provides a method to design five level switched mode excitation signals with control of instantaneous amplitude, frequency and phase plus minimised third harmonics for advanced ultrasound applications. This paper details the application of HRPWM using commercial transmit front end integrated circuits and linear array transducers. The ability of HRPWM to control the pressure of the ultrasound wave is investigated. A full scale error between desired and measured pressure of 3.5% at 4.1 MHz is demonstrated. The temporal windowing of linear frequency modulated excitation signals using HRPWM is demonstrated. Pulse compression linear imaging of a tissue phantom is demonstrated where an improvement in the -20 dB axial resolution of a nylon mono-filament target from 2.14 mm using bipolar excitation to 1.88 mm using HRPWM is shown.

关键词： Imaging Transducers Ultrasonic imaging Sonar equipment Switches Acoustics Harmonic analysis Transducers Ultrasonography Ultrasonic Waves Fourier analysis Acoustics Switches Imaging Sonar equipment Harmonic reduction Excitation Pulse width modulation Ultrasonic applications Pulse compression miniaturization

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A novel DP4T antenna switch for dual-band WLAN applications

A novel DP4T antenna switch for dual-band WLAN applications

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ieee symposium on Radio Frequency Integrated circuits (RFIC)

作者： Chang-Ho Lee B. Banerjee J. Laskar Georgia Electronic Design Center School of ECE Georgia Institute of Technology Atlanta GA USA

In this paper, we present a novel DP4T antenna switch with very simple control logic and high power handling capabilities for dual-band WLAN applications. The suggested DP4T switch architecture requires only two control lines. The developed DP4T switch exhibits 1.2 to 1.7 dB of insertion loss, and 27/53 dB to 23/37 dB of isolation at 2.4 GHz and 5.25 GHz, respectively. It also demonstrates 31 dBm of input P0.1dB, 35 dBm of input P1dB in 3/0 V operation, as well as better than -62 dBc of 2nd harmonics and -73 dBc of 3rd harmonics response, respectively. The MMICs are developed in a commercial 0.25-/spl mu/m GaAs pHEMT process. This switch architecture is preferable for Si-based processes because substrate vias are not required due to its generic topology. To the best of our knowledge, this is the first report on a DP4T RF switch architecture with very simple control logic for dual-band WLAN applications.

关键词： Switches Dual band Wireless LAN Logic Insertion loss MMICs Gallium arsenide PHEMTs Topology Radio frequency

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design and implementation of MPPT controlled grid connected photovoltaic system

Design and implementation of MPPT controlled grid connected ...

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ieee symposium on Computers & Informatics (ISCI)

作者： Md. Ismail Hossain Shakil Ahamed Khan Md. Shafiullah Mohammad Jakir Hossain EEE Department International Islamic University Chittagong Dhaka Bangladesh EETE Department Dhaka International University Dhaka Bangladesh EEE Department Bangladesh University of Engineering and Technology Dhaka Bangladesh EEE Department Dhaka University of Engineering and Technology (DUET) Gazipur Bangladesh

This paper proposes an intelligent method for maximum power point tracking (MPPT) of a photovoltaic system under variable temperature and insolation conditions and conversion of this solar energy into stabilized sine wave having low distortion factor (DF), so that the solar energy can be supplied to grid and can operate electrical and electronic devices efficiently. For the reduction of tracking time of maximum power from photovoltaic array and to obtain stabilized sine wave with very fast rise time for voltage stability, fuzzy logic control algorithm is implemented with the embedded microcontroller for improved performance as compared to conventional techniques. The system includes a photovoltaic array; a PWM controlled DC-DC, DC-AC converters, sensor circuits and zero crossing detector (ZCD). The designed MPPT controller regulates the converter output voltage by varying modulation index of the PWM pattern using MPPT algorithm and it maximizes the output power extracted from photovoltaic array. This paper discusses the low cost implementation of MPP algorithm in a 8-bit microcontroller using the tools and techniques to generate optimized real time code in C for ATMega8 microcontroller which will demonstrate how maximum power point tracker might provide elegant and efficient solution for increasing the efficiency of a solar system and connection of the extracted energy to grid which is based on experimental results rather than on mathematical models.

关键词： Fuzzy logic Microcontrollers Voltage control Inverters Pulse width modulation Niobium Photovoltaic systems

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designs of 8 × 8 MIMO Mobile Phone Antennas for 5G Mobile Communication System

Designs of 8 × 8 MIMO Mobile Phone Antennas for 5G Mobile C...

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ieee International symposium on Intelligent Signal Processing and Communication systems (ISPACS)

作者： Wei-Shun Chiu Chun-Cheng Lin Chih-Yu Huang Department of Electronic Engineering National Kaohsiung Normal University Kaohsiung Taiwan Department of Mathematic and Physical Sciences R.O.C. Air Force Academy Kaohsiung Taiwan

ISBN: (数字)9798350389210

ISBN: (纸本)9798350389227

The size of the mobile phone is $158 \mathrm{~mm} \times 80$ $\mathrm{mm} \times 8 \mathrm{~mm}$. The first antenna is designed in the frequency band of the fourth generation (4G) mobile communication system. It uses inverted-F antennas, monopole antennas, slit antennas, T-circuits, and parallel circuits. The frequency band is LTE 700, GSM 850 MHz at the low frequency band; GSM $1800 / 1900 / 2100 \mathrm{MHz}$, LTE $2300 / 2500 \mathrm{MHz}$ in the intermediate frequency band; 5G 3500/4900 MHz in the high frequency band. The antenna efficiency and gain are 76%/ $47 \% / 55 \%$ and $1.75 \mathrm{dBi} / 1.9 \mathrm{dBi} / 2.69 \mathrm{dBi}$, respectively. The second antenna is designed in the frequency band of the fifth generation (5G) mobile communication system. It is designed to be $4 \times 4$ MIMO on both sides of the long frame of the mobile phone. The frequency bands are 3500 and 4900 MHz. The antenna efficiency and gain are $73 \% / 91 \%$ and 4.4 $\mathrm{dBi} / 5.9 \mathrm{dBi}$, respectively. The designed $8 \times 8 \mathrm{MIMO}$ antenna (integration of 4 G and 5 G antenna) has a measured return loss above 6 dB and an isolation below -10 dB.

关键词： Antenna measurements GSM 5G mobile communication design methodology Mobile antennas Throughput Mobile handsets Loss measurement Long Term Evolution Gain

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Global coupled EM-electrical-thermal simulation and experimental validation for a spatial power combining MMIC array

Global coupled EM-electrical-thermal simulation and experime...

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Microwave, MTT-S International symposium

作者： W. Batty C.E. Christoffersen A.B. Yakovlev J.F. Whitaker M. Ozkar S. Ortiz A. Mortazawi R. Reano K. Yang L.P.B. Katehi C.M. Snowden M.B. Steer Institute of Microwaves and Photonics University of Leeds Leeds UK Department of Electrical Engineering Lakehead University Thunder Bay Ontario Canada Department of Electrical Engineering The University of Mississippi MS USA Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor MI USA Department of Electrical and Computer Engineering North Carolina Agriculture and Technical State University Raleigh NC USA Department of Electrical and Computer Engineering North Carolina State University Raleigh NC USA Institute of Microwaves and Photonics School of Electronic and Electrical Engineering University of Leeds Leeds UK

The first fully coupled electromagnetic-electro-thermal global simulation of a large microwave subsystem, here a whole spatial power combining MMIC array, is described. The modeling effort is supported by parallel developments in electro-optic and thermal measurement. The CAD tools and experimental characterisation described, provide a unique capability for the design of quasi-optical systems and for the exploration of the fundamental physics of spatial power combining devices.

关键词： Object oriented modeling Circuit simulation MMICs Microwave antenna arrays Power system modeling Microwave circuits Electromagnetic coupling Computational modeling design automation Physics

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TIE Micro – Chiplets and Next-gen Packaging

TIE Micro – Chiplets and Next-gen Packaging

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International symposium for design and Technology of electronics Packages (SIITME)

作者： Cătălin Bogdan Ciobanu Dan Manolescu Roxana Vlăduţă Luciana Chiţu Cosmin Moisă Marcel Manofu Paul Svasta Transilvania University of Braşov Romania National Institute of Research and Development in Microtechnologies Bucharest Romania National University of Science and Technology Politehnica Bucharest Romania Marvell Technology Bucharest Romania Continental Automotive Romania Timişoara Romania Politehnica University Timişoara Romania Romania UP-Skill Engineering Education Timişoara Romania

ISBN: (数字)9798331539511

ISBN: (纸本)9798331539528

As the semiconductor industry advances towards heterogeneous integrations and sophisticated systems in Package and chiplet technologies, it becomes imperative to equip future engineers with expertise in state-of-the-art methodologies, including the application of interposers, 2.5D and 3D integration. To address this need within the roadmap of the extracurricular education for future engineers, starting in 2024, the Technologies of Interconnections in electronics (TIE) student competition introduced a new topic - TIE Micro (TIE-$\mu$), which focuses on advanced packaging. Participants are provided with the project topics in advance and are required to submit comprehensive project design files and a detailed project report. The report must explain the student’s methodological approach, the layout design, and the results from the signal and power integrity simulations. The top ranked students present their work through an oral presentation. The jury is comprised of academia and industry representatives.

关键词： Industries System-in-package Chiplets Layout electronics industry Education Multichip modules Three-dimensional integrated circuits electronics packaging

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