The design problem of large electrical circuits with discrete components is considered, with their nominal values taken from a finite set of manufacturing values and their actual values allowed to change randomly with...
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The design problem of large electrical circuits with discrete components is considered, with their nominal values taken from a finite set of manufacturing values and their actual values allowed to change randomly within fixed tolerances. For solving this problem, a cut algorithm is presented, which is also suitable for the nonconvex case. If a solution exists, the algorithm has guaranteed convergence.
An exact design procedure for LDI type leapfrog Switched-Capacitor (SC) filters is presented. We introduce z variable transducer and characteristic functions similar to these functions of doubly terminated reactance f...
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An exact design procedure for LDI type leapfrog Switched-Capacitor (SC) filters is presented. We introduce z variable transducer and characteristic functions similar to these functions of doubly terminated reactance filters. The element values are obtained by the z-domain continued fraction expansion, but no reference to the original LCR filters themselves. From these discussions, we also derive the exact representation of low sensitivity property for leapfrog SC filters.
Automatic gain control circuits are used often in communications systems to normalize the basic amplitude of a signal used in phase, frequency, or amplitude modulation schemes. A new AGC design is presented. Its key f...
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Automatic gain control circuits are used often in communications systems to normalize the basic amplitude of a signal used in phase, frequency, or amplitude modulation schemes. A new AGC design is presented. Its key feature is in the manner of gain control. While similar in nature to earlier designs, a new biasing scheme allows the range of control voltage variation V to be up to 4 v. 1 Ref.
The comparator is the most important component in Analog-to-Digital Converters (ADCs). High-gain amplifiers are traditionally used in comparators. For high speed ADC applications, these comparators must simultaneously...
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The comparator is the most important component in Analog-to-Digital Converters (ADCs). High-gain amplifiers are traditionally used in comparators. For high speed ADC applications, these comparators must simultaneously provide high gain and large bandwidth. This requirement is not always met. A new approach to comparator design is thus necessary to meet the requirements of high speed ADCs. We have developed a new class of comparators that combine the high frequency operation of GaAs FETs with their excellent switching characteristics. The principles of operation and the design of these comparators for 2 and 3 bit flash ADCs are reviewed. Fabrication of these monolithic ICs and their performance at gigahertz sampling rates are described.
This paper reports on the successful development of a four stage, directly cascaded GaAs FET monolithic preamplifier chip realized using truly lumped elements for both RF and DC circuitry. The chip is designed to be e...
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This paper reports on the successful development of a four stage, directly cascaded GaAs FET monolithic preamplifier chip realized using truly lumped elements for both RF and DC circuitry. The chip is designed to be entirely self-biased and contains all required DC circuitry on-chip for operation from a single drain supply. The design is based on a nominal 1 micron gate length interdigital FET geometry of planar construction. The device is fabricated using a selective ion implantation process. The finished die dimensions are 0.060 by 0.110 inch with a thickness of 0.015 inch. The chip provides a gain of over 20 dB in a 2 GHz band centered near 7 GHz. The noise figure achieved is 6 dB, the output power at 1 dB gain compression is typically +8 dBm, and the third order intermodulation intercept point is approximately +20 dBm.
The design of nonrecursive digital filters based on the Kaiser window function, and the alternative design based on the weighted-Chebyshev approximation due to Rabiner, McClellan and Parks are used together in an impr...
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The design of nonrecursive digital filters based on the Kaiser window function, and the alternative design based on the weighted-Chebyshev approximation due to Rabiner, McClellan and Parks are used together in an improved procedure for the design of digital differentiators. The new procedure leads to significant savings in the amount of computation, of the order of 15 to 38 percent. In addition, a method is proposed which can be used to design equiripple differentiators satisfying prescribed bandwidth and inband accuracy specifications.
A method for computing the output noise spectrum of sampled - data circuits by means of autocorrelation techniques is presented. The noise at the output of most switched capacitor circuits may be separated into two cl...
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A method for computing the output noise spectrum of sampled - data circuits by means of autocorrelation techniques is presented. The noise at the output of most switched capacitor circuits may be separated into two classes, namely noise which appears sampled and held at the output and direct wideband noise. Each one of these classes has an autocorrelation function with a specific shape. In this analysis noise contribution of the amplifier and the ″on″ resistance of the MOS switches are considered. Experimental measurements at an exemplary circuit verify the results obtained by this method. Rules for the design of low noise switched capacitor circuits are given.
A new approach to the DC optimization of electrical circuits, which avoids the usual procedure of manually repeated local optimization runs, is presented. Given a range of value for each design parameter, it returns a...
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A new approach to the DC optimization of electrical circuits, which avoids the usual procedure of manually repeated local optimization runs, is presented. Given a range of value for each design parameter, it returns a list of all the local minima found in the parameter space, and among them the global one. Its advantages are a reduced turn-around time for the circuit designer, comparing to the repeated runs procedure; and also the possibility of comparing the computed local minima, a very useful feature from the engineering point of view.
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