Reconfigurable computing has grown to become important in hardware design. In autumn 2005, we taught for the first time a new course in digital system design with its main focus on FPGA technology and design using VHD...
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ISBN:
(纸本)9781424411610
Reconfigurable computing has grown to become important in hardware design. In autumn 2005, we taught for the first time a new course in digital system design with its main focus on FPGA technology and design using VHDL. This paper reports about the various issues dealt with including what topics to cover, text book selection, lab exercises etc. A summary of the students feedback is also included.
The functional safety of implanted medical devices is of high importance. This works presents a novel concept to verify bio-electronicsystems modeling the medical device in connection with the interacting biological ...
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ISBN:
(纸本)9798350332773
The functional safety of implanted medical devices is of high importance. This works presents a novel concept to verify bio-electronicsystems modeling the medical device in connection with the interacting biological system. The concept is applied to a setup consisting of an implanted pacemaker and an interacting organ, the human heart. The resulting model is verified with respect to relevant properties such as the reachability of hazard-related states appearing through the interaction of the bioelectronic system. In contrast to previous contributions this work demonstrates the ability to deterministicly verify bio-electronicsystems containing relevant and detailed models of the interacting biological system.
The paper describes a reconfigurable polymorphic chip REPOMO32, experiments carried out with this chip and provides report on important experiences with regard to practical applications of digital polymorphic circuits...
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ISBN:
(纸本)9781424466139
The paper describes a reconfigurable polymorphic chip REPOMO32, experiments carried out with this chip and provides report on important experiences with regard to practical applications of digital polymorphic circuits sensitive to the power supply voltage (V-dd). REPOMO32 contains array of 32 configurable logic elements which can perform polymorphic NAND/NOR function controlled by the level of the V-dd. Moreover, it can be declared as the first fabricated chip of this kind which basically allows the user to design more complex circuits than only a few gates.
An efficient mixed-signal design strategy for test insertion standardization. The mixed-signal DFT (design For Test) strategy is built on three main linchpins: DFT and other design rules, DFT design structures and fin...
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ISBN:
(纸本)9781424422760
An efficient mixed-signal design strategy for test insertion standardization. The mixed-signal DFT (design For Test) strategy is built on three main linchpins: DFT and other design rules, DFT design structures and finally design to test interactions. Such a design strategy improves the overall device fault coverage which leads to minimal device failure rate on the customer side. This poster article explains first the design strategy in detail and finally highlights the reached results.
This paper presents a new, patent pending, random bit generator whose noise source exploits the leakage current in a reverse biased p-n junction. The circuit is described and a model is provided to estimate data-rate ...
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ISBN:
(纸本)1424401844
This paper presents a new, patent pending, random bit generator whose noise source exploits the leakage current in a reverse biased p-n junction. The circuit is described and a model is provided to estimate data-rate and expected quality of the generated bit sequence. Since the noise source is quasi-stateless, its deterministic evolution does not present complex patterns and therefore a lack of entropy and faults can be detected on-line.
This paper considers the optimization of reversible and quantum circuits. Both represent the basis for emerging technologies e.g. in the area of quantum computation and low power design. An approach called window opti...
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ISBN:
(纸本)9781424466139
This paper considers the optimization of reversible and quantum circuits. Both represent the basis for emerging technologies e.g. in the area of quantum computation and low power design. An approach called window optimization is described that does not consider the circuit as a whole, but smaller sub-circuits of it (so called windows). Two schemes for extracting the windows and three approaches for their optimization are considered. Application scenarios show that applying the proposed optimizations leads to significant reductions of the circuit cost.
a new approach towards highly reconfigurable SoCs for data-streaming multi-sensory systems is presented. As the applications are in the security arena, a very high degree of dependability should be guaranteed. For thi...
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ISBN:
(纸本)9781467311854
a new approach towards highly reconfigurable SoCs for data-streaming multi-sensory systems is presented. As the applications are in the security arena, a very high degree of dependability should be guaranteed. For this purpose, extensive use is made of many-core processor architectures and associated embedded health-monitoring circuits. This enables the preventive (automatic) repair by spare parts or priority ranking of tasks among processors.
Proton beam characterization was performed at the Oslo Cyclotron Laboratory (OCL) in order to evaluate the beam properties and asses its usability for radiation testing of electronic devices. The characterization was ...
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ISBN:
(纸本)9781467361361;9781467361354
Proton beam characterization was performed at the Oslo Cyclotron Laboratory (OCL) in order to evaluate the beam properties and asses its usability for radiation testing of electronic devices. The characterization was performed with the aim of establishing good guidelines for reliable radiation tolerance testing at the OCL. A dosimetry measurement and calibration setup is proposed as well as a beam-to-target alignment and beam profile measurement setup. The beam characterization was performed using 30 MeV protons.
Hardware accelerators for H.264/AVC using arithmetic coding require special approaches to achieve high throughputs. This paper proposes an efficient architecture for the context formatter that is a part of the H.264/A...
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ISBN:
(纸本)1424401844
Hardware accelerators for H.264/AVC using arithmetic coding require special approaches to achieve high throughputs. This paper proposes an efficient architecture for the context formatter that is a part of the H.264/AVC binary encoder. Five versions of the architecture are developed to match different throughputs. The implementation results show that the proposed versions of the context formatter match the performance of corresponding arithmetic coders.
Due to the increasing design size and complexity of modern Integrated circuits (IC) and the decreasing time-to-market, debugging is one of the major bottlenecks in the IC development cycle. This paper presents a gener...
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ISBN:
(纸本)9781467311854
Due to the increasing design size and complexity of modern Integrated circuits (IC) and the decreasing time-to-market, debugging is one of the major bottlenecks in the IC development cycle. This paper presents a generalized approach to automate debugging which can be used in different scenarios from design debugging to post-silicon debugging. The approach is based on model-based diagnosis. Diagnostic traces are proposed as an enhancement reducing debugging time and increasing diagnosis accuracy. The experimental results show the effectiveness of the approach in post-silicon debugging.
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