In this paper, a high-speed VLSI design of the LZ-based data compression is presented. The proposed block processing architecture provides 100 percent hardware utilization and a shorter cycle time for searching the ma...
详细信息
In this paper, a high-speed VLSI design of the LZ-based data compression is presented. The proposed block processing architecture provides 100 percent hardware utilization and a shorter cycle time for searching the maximum matching strings. A systematic method to find the sharing substructure among the block structures is also proposed. With this systematic method, it can shrink the final area requirement on a single chip for on-line data compression. Hence, the proposed design is more area-efficient than the previous systolic designs.
This paper presents the parallel implementation of a fast third-order Volterra digital filtering algorithm. Our platform is an ATT DSP-3 parallel processor. Speed-up results indicate that our implementation exhibits h...
详细信息
This paper presents the parallel implementation of a fast third-order Volterra digital filtering algorithm. Our platform is an ATT DSP-3 parallel processor. Speed-up results indicate that our implementation exhibits high performance and suitability for largedata sizes. An application to nonlinear communication channel equalization is presented.
data acquisition systems containing transducers, analog readout circuits and digital data processing capability having dimensions comparable to conventional silicon VLSI are feasible in silicon. The on-chip integratio...
详细信息
data acquisition systems containing transducers, analog readout circuits and digital data processing capability having dimensions comparable to conventional silicon VLSI are feasible in silicon. The on-chip integration of these functions has been demonstrated and is a sound concept for the fabrication of an integrated silicon smart sensor for a single parameter. However, the complexity and data processing required in a data acquisition system for several quantities makes the concept, although technologically feasible, not economically viable. Partitioning of the various system functions over several dies and applying wafer-to-wafer bonding or using the multi-chip module is a more economically viable approach. Enhanced functionality can be obtained by using an active silicon platform as the substrate that contains all the infrastructural functions common to any instrument, such as power/thermal management, self-test and self-calibration and a local bus. In integrated chemical analysis systems, the additional advantage would be the slightly reduced packaging problem.
Memory circuits are excellent vehicles for yield enhancement of a process technology for VLSI products. A method was developed which consists of correlating the physical defects detected by in-line inspections with th...
详细信息
Memory circuits are excellent vehicles for yield enhancement of a process technology for VLSI products. A method was developed which consists of correlating the physical defects detected by in-line inspections with the electrical failures. In this method, two types of errors can affect results. A model is proposed in order to estimate and minimize the number of errors. The defect-yield correlation on memories indicates the priority problems responsible for yield loss. Nevertheless, the contribution of the killer defects detected by in-line inspections to yield loss has to be verified. New algorithms are proposed to provide this data that is often missing in yield management systems.
A method to correct spaceborne rain radar measurement for non-uniform beam filling (NUBF) is studied using a shipborne radar data set over the tropical Pacific. Statistical analyses are made on spatial variabilities o...
详细信息
A method to correct spaceborne rain radar measurement for non-uniform beam filling (NUBF) is studied using a shipborne radar data set over the tropical Pacific. Statistical analyses are made on spatial variabilities of rain rate. The result is reflected in estimating the variability in a radar IFOV which is then used to obtain a NUBF correction factor. Results indicate the usefulness of this method for reducing bias error in rain rate estimation.
This paper presents procedures that verify custom CMOS/BiCMOS VLSI circuits for their compliance to a given set of pre-defined rules or design styles. Predefined rules range from simple connectivity and sizing rules t...
详细信息
This paper presents procedures that verify custom CMOS/BiCMOS VLSI circuits for their compliance to a given set of pre-defined rules or design styles. Predefined rules range from simple connectivity and sizing rules to specific circuit topologies ensuring acceptable circuit speed, reliability, and signal integrity. Our compliance checker, Elecdra, operates on transistor-level circuit netlists, which may contain back-annotated parasitics. Custom VLSI microprocessors with over 3 million devices have been successfully verified by Elecdra at the full-chip level.
The largescale spatial and temporal variations of surface ice temperature over the Antarctic region are studied using infrared data derived from the Nimbus-7 Temperature Humidity Infrared Radiometer (THIR) from 1979 ...
详细信息
The largescale spatial and temporal variations of surface ice temperature over the Antarctic region are studied using infrared data derived from the Nimbus-7 Temperature Humidity Infrared Radiometer (THIR) from 1979 through 1985 and from the NOAA Advanced Very High Resolution Radiometer (AVHRR) from 1984 through 1995. Enhanced techniques suitable for the polar regions for cloud masking and atmospheric correction were used before converting radiances to surface temperatures. The observed spatial distribution of surface temperature is highly correlated with surface ice sheet topography and agrees well with ice station temperatures with 2 K to 4 K standard deviations. The average surface ice temperature over the entire continent fluctuates by about 30 K from summer to winter while that over the Antarctic Plateau varies by about 45 K. Interannual fluctuations of the coldest temperatures are observed to be as large as 15 K. Also, the interannual variations in surface temperatures are highest at the Antarctic Plateau and the ice shelves (e.g., Ross and Ronne) with a periodic cycle of about 5 years and standard deviations of about 11 K and 9 K, respectively. Despite large temporal variability, however, especially in some regions, a regression analysis that includes removal of the seasonal cycle shows no apparent trend in temperature during the period 1979 through 1995.
This paper describes how an automatic test program generation environment is developed by making use of the Summit Design's TDS software modules as the basic building blocks. A new design-to-test process flow is d...
详细信息
This paper describes how an automatic test program generation environment is developed by making use of the Summit Design's TDS software modules as the basic building blocks. A new design-to-test process flow is defined. A solution of eliminating conversion errors of simulation post-processing is also proposed. In this approach, a functional test program can be generated within minutes, which dramatically shortens the test program development time and gets a new product faster to market.
We have developed a Viterbi decoding circuit which is suitable for DVD players. We designed it to be compact and efficient by utilizing the rule of the DVD recording code. By experiment, we confirmed that the Viterbi ...
详细信息
We have developed a Viterbi decoding circuit which is suitable for DVD players. We designed it to be compact and efficient by utilizing the rule of the DVD recording code. By experiment, we confirmed that the Viterbi decoder reproduced digital data more precisely than a conventional bit-by-bit decoder. Thereby it improves the reliability of the DVD players. It was integrated into a data processing LSI which restores digital data streams recorded on the DVD. By employing this LSI, we have developed DVD video players, DVD-ROM drives, DVD-recordable drives, and DVD car navigation systems. We applied the Viterbi decoding to home-use optical disc players for the first time.
Analyzing 1,000 faulty 1 Mb SRAM chips that were randomly selected from a single manufacture, we found 251 stuck-at cell faults, 5 stuck-at bit-line faults, 1 stuck-at word-line fault, 46 neighborhood-pattern-sensitiv...
详细信息
Analyzing 1,000 faulty 1 Mb SRAM chips that were randomly selected from a single manufacture, we found 251 stuck-at cell faults, 5 stuck-at bit-line faults, 1 stuck-at word-line fault, 46 neighborhood-pattern-sensitive faults, and other kinds of faults. Under the condition that I/sub dd/=4.5 I; temperature=70/spl deg/C, and load capacity C/sub L/=30 pF, we detected margin faults in 460 chips. Because the actual fault data for SRAM chips is rarely reported, the data in this manuscript are very useful and should be of practical importance.
暂无评论