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检索条件"任意字段=IEEE Workshop on Signal Processing Systems Design and Implementation"
10802 条 记 录,以下是101-110 订阅
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Radix-differential 2D FIR filters
Radix-differential 2D FIR filters
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1997 ieee workshop on signal processing systems (SiPS 97) - design and implementation
作者: Aggoun, A Electronic and Electrical Engineering Department De Montfort University Gateway Leicestershire UK
An approach to the realisation of 2D FIR filters based on a novel radix-differential arithmetic is introduced. The differential algorithm is accomplished by coding the input video signal more efficiently using a DPCM ... 详细信息
来源: 评论
From NoC security analysis to design solutions
From NoC security analysis to design solutions
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Evain, S Diguet, JP Univ Rennes 1 IETR INSA UMR 6164CNRS F-35043 Rennes France
This paper addresses a new kind of security vulnerable spots introduced by Network-on-chip (NoC) use in System-on-Chip (SoC) design. This study is based on the experience of a CAD framework for NoC design and proposes... 详细信息
来源: 评论
implementation of the decorrelating transformation for low power fir filters
Implementation of the decorrelating transformation for low p...
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ieee workshop on signal processing systems design and implementation
作者: Erdogan, AT Arslan, T Lai, R Univ Edinburgh Sch Engn & Elect Edinburgh EH9 3JL Midlothian Scotland
This paper presents the implementation of the decorrelating (DECOR) transformation technique for low power FIR filtering cores. The technique was introduced in the past, but was not fully evaluated for its area, delay... 详细信息
来源: 评论
Synthesis and high level optimisation of multidimensional dataflow actor networks on FPGA
Synthesis and high level optimisation of multidimensional da...
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ieee workshop on signal processing systems design and implementation
作者: McAllister, J Woods, R Walke, R Reilly, D Queens Univ Belfast ECIT Belfast BT9 5EE Antrim North Ireland
This paper presents a new dataflow graph based approach for modelling, rapidly implementing, and performing high level optimization of embedded systems including dedicated pipelined hardware components. This overcomes... 详细信息
来源: 评论
A low cost packet detector in OFDM-based ultra-wideband systems
A low cost packet detector in OFDM-based ultra-wideband syst...
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ieee workshop on signal processing systems design and implementation
作者: Lai, Jyh-Ting Chu, Chun-Yuan Wu, An-You Chen, Wen-Chiang Graduate Institute of Electronics Engineering Department of Electrical Engineering National Taiwan University Faraday Technology Corporation
Multiband orthogonal frequency-division multiplexing (MB-OFDM) systems employ frequency-hopping technology to achieve the capabilities of multiple access and frequency diversity. However, they also complicate packet d... 详细信息
来源: 评论
design methodology for runtime reconfigurable FPGA: From high level specification down to implementation
Design methodology for runtime reconfigurable FPGA: From hig...
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Berthelot, F Nouvel, F Houzet, D CNRS UMR 6164 IETR INSA F-35043 Rennes France
In this paper we present an automatic design generation methodology for heterogeneous architectures composed of processors, DSPs and FPGAs. This methodology is based on an Adequation Algorithm Architecture where appli... 详细信息
来源: 评论
Limiting flexibility in multiplication over GF2m: A design methodology
Limiting flexibility in multiplication over GF2<SUP>m</SUP>:...
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ieee workshop on signal processing systems design and implementation
作者: Chelton, William Benaissa, Mohammed Univ Sheffield Dept Elect & Elect Engn Mappin St Sheffield S1 3JD S Yorkshire England
Multiplication over the field GF(2(m)) is computationally expensive, not least because the operation involves modulo reduction. It is typical to fix the field and field representation to improve performance, but some ... 详细信息
来源: 评论
Fine-grain asynchronous circuits for low-power high performance dsp implementations
Fine-grain asynchronous circuits for low-power high performa...
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ieee Annual workshop on signal processing systems: design and implementation
作者: Garnica, O Lanchares, J Hermida, R Univ Complutense Comp Archit Dept E-28040 Madrid Spain
The aim of this paper is to present a new approach to creating low-power high-performance DSP using delay-insensitive asynchronous circuits. To attain this, we pipeline the asynchronous circuit at logic gate level in ... 详细信息
来源: 评论
Trends in design and implementation of signal processing systems
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ieee signal processing MAGAZINE 2011年 第6期28卷 192-193页
作者: Mansour, Mohammad M. Chen, Liang-Gee Sung, Wonyong Amer Univ Beirut Beirut Lebanon Natl Taiwan Univ Taipei Taiwan Seoul Natl Univ Seoul 151 South Korea
The design and implementation of SP systems (DISPS) includes the development of software tools and methodologies to support the design of these complex systems. In its early days, DISPS focused on the hardware-based d... 详细信息
来源: 评论
Architecture-aware LDPC code design for software defined radio
Architecture-aware LDPC code design for software defined rad...
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ieee workshop on signal processing systems design and implementation
作者: Zhu, Yuming Chaki-Abarti, Chaitali Arizona State Univ Dept Elect Engn Tempe AZ 85287 USA
Low-Density Parity-Check (LDPC) codes have been adopted in the physical layer of many communication systems because of their superior performance. The direct implementation of these codes onto an existing software def... 详细信息
来源: 评论