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检索条件"任意字段=IEEE Workshop on Signal Processing Systems Design and Implementation"
10815 条 记 录,以下是121-130 订阅
Hardware design for end-to-end modular exponentiation in redundant number representation
Hardware design for end-to-end modular exponentiation in red...
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Sanu, MO Swartzlander, EE Univ Texas Dept Elect & Comp Engn Austin TX 78712 USA
In this paper, we describe a novel algorithm for modular exponentiation of large integers and present its hardware implementation. This algorithm combines elements from Montgomery's modular multiplication techniqu... 详细信息
来源: 评论
Radix-differential 2D FIR filters
Radix-differential 2D FIR filters
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1997 ieee workshop on signal processing systems (SiPS 97) - design and implementation
作者: Aggoun, A Electronic and Electrical Engineering Department De Montfort University Gateway Leicestershire UK
An approach to the realisation of 2D FIR filters based on a novel radix-differential arithmetic is introduced. The differential algorithm is accomplished by coding the input video signal more efficiently using a DPCM ... 详细信息
来源: 评论
From NoC security analysis to design solutions
From NoC security analysis to design solutions
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Evain, S Diguet, JP Univ Rennes 1 IETR INSA UMR 6164CNRS F-35043 Rennes France
This paper addresses a new kind of security vulnerable spots introduced by Network-on-chip (NoC) use in System-on-Chip (SoC) design. This study is based on the experience of a CAD framework for NoC design and proposes... 详细信息
来源: 评论
implementation of an H.264 motion estimation algorithm on a VLIW programmable digital signal processor
Implementation of an H.264 motion estimation algorithm on a ...
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Im, H Lee, W Sung, W Seoul Natl Univ Sch Elect Engn Seoul 151742 South Korea
We studied the efficient implementation of a motion estimation algorithm for H.264/AVC on TMS 320C64x, a VLIW (Very Long Instruction Word) SIMD (Single Instruction Multiple Data) digital signal processor. H.264 motion... 详细信息
来源: 评论
implementation of the decorrelating transformation for low power fir filters
Implementation of the decorrelating transformation for low p...
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ieee workshop on signal processing systems design and implementation
作者: Erdogan, AT Arslan, T Lai, R Univ Edinburgh Sch Engn & Elect Edinburgh EH9 3JL Midlothian Scotland
This paper presents the implementation of the decorrelating (DECOR) transformation technique for low power FIR filtering cores. The technique was introduced in the past, but was not fully evaluated for its area, delay... 详细信息
来源: 评论
A low cost packet detector in OFDM-based ultra-wideband systems
A low cost packet detector in OFDM-based ultra-wideband syst...
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ieee workshop on signal processing systems design and implementation
作者: Lai, Jyh-Ting Chu, Chun-Yuan Wu, An-You Chen, Wen-Chiang Graduate Institute of Electronics Engineering Department of Electrical Engineering National Taiwan University Faraday Technology Corporation
Multiband orthogonal frequency-division multiplexing (MB-OFDM) systems employ frequency-hopping technology to achieve the capabilities of multiple access and frequency diversity. However, they also complicate packet d... 详细信息
来源: 评论
Architecture-aware LDPC code design for software defined radio
Architecture-aware LDPC code design for software defined rad...
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ieee workshop on signal processing systems design and implementation
作者: Zhu, Yuming Chaki-Abarti, Chaitali Arizona State Univ Dept Elect Engn Tempe AZ 85287 USA
Low-Density Parity-Check (LDPC) codes have been adopted in the physical layer of many communication systems because of their superior performance. The direct implementation of these codes onto an existing software def... 详细信息
来源: 评论
ELMMA: A new low power high-speed adder for RNS
ELMMA: A new low power high-speed adder for RNS
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ieee workshop on signal processing systems design and implementation
作者: Patel, RA Benaissa, M Powell, N Boussakta, S Univ Sheffield Dept Elect & Elect Engn Sheffield S1 3JD S Yorkshire England
Modular adders are fundamental arithmetic components that are employed in Residue Number System (RNS) based digital signal processing (DSP) systems. They are widely used in modular multipliers, residue to binary conve... 详细信息
来源: 评论
SIMD implementation of interpolation in algebraic soft-decision Reed-Solomon decoding
SIMD implementation of interpolation in algebraic soft-decis...
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Boulianne, L Gross, WJ McGill Univ Dept Elect & Comp Engn Montreal PQ Canada
The Koetter-Vardy algorithm is an algebraic soft-decision decoding algorithm for Reed-Solomon codes. Software implementations of the Koetter-Vardy algorithm are considered as part of a redecoding architecture that aug... 详细信息
来源: 评论
Bit-width optimizations for high-level synthesis of digital signal processing systems
Bit-width optimizations for high-level synthesis of digital ...
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ieee workshop on signal processing systems design and implementation
作者: Andriamisaina, Caalipb Le Gal, Bertrand Casseau, Emmanuel LESTER Lab. CNRS FRE2734 UBS University France IRISA-R2D2 Lab. Rennes I University France
In this paper we propose a methodology that takes into account bit-width to optimize area and power consumption of hardware architectures provided by high level synthesis tools. The methodology is based on a bit-width... 详细信息
来源: 评论