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检索条件"任意字段=IEEE Workshop on Signal Processing Systems Design and Implementation"
10815 条 记 录,以下是131-140 订阅
design of a DVB-S receiver in FPGA
Design of a DVB-S receiver in FPGA
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ieee workshop on signal processing systems
作者: Cardells-Tormo, F Pérez-Pascual, A Torres-Carot, V Valls-Coquillat, J Almenar-Terrè, V Hewlett Packard Corp ICD R&D Lab Barcelona 08190 Spain
This paper deals with the design of an all-digital receiver for the DVB-S standard in FPGA. We describe the implementation issues of the next stages: digital acquisition at intermediate frequency, downconversion to ba... 详细信息
来源: 评论
High-speed VLSI implementation of 2-d discrete wavelet transform
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ieee TRANSACTIONS ON signal processing 2008年 第1期56卷 393-403页
作者: Cheng, Chao Parhi, Keshab K. Univ Minnesota Dept Elect & Comp Engn Minneapolis MN 55455 USA
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D DWT with computation time as low as N-... 详细信息
来源: 评论
Detection and expression classification systems for face images (FADECS)
Detection and expression classification systems for face ima...
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Stathopoulou, IO Tsihrintzis, GA Univ Piraeus Dept Informat Piraeus 18534 Greece
Towards building new, friendlier human-computer interaction systems and multimedia interactive services systems, we developed a neural network-based image processing system (called FADECS), which first determines auto... 详细信息
来源: 评论
Compander systems with adaptive preemphasis/deemphasis using linear prediction
Compander systems with adaptive preemphasis/deemphasis using...
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Holters, M Keiler, F Zölzer, U Peissig, J Helmut Schmidt Univ Hamburg Dept Signal Proc & Commun D-22043 Hamburg Germany
A new class of compander systems is proposed that combines conventional broad-band companders with adaptive filtering based on linear prediction. This allows not only non reduction, but also spectral shaping of noise ... 详细信息
来源: 评论
On the importance of the excitation signal generation method in bandwidth extension of speech
On the importance of the excitation signal generation method...
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Rodriguez, SA Burt, PMS Univ Sao Paulo Dept Telecomm & Control Engn Escola Politecn PTC EPUSP BR-05508900 Sao Paulo Brazil
The purpose of this work is to show the importance of an adequate generation of the excitation signal for the performance of bandwidth extension algorithms for speech signals. Two previously proposed methods of obtain... 详细信息
来源: 评论
ARRAY BASED design OF DIGITAL-FILTERS
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ieee TRANSACTIONS ON ACOUSTICS SPEECH AND signal processing 1990年 第9期38卷 1628-1632页
作者: ARAVENA, JL PORTER, WA UNIV ALABAMA DEPT ELECT & COMP ENGNHUNTSVILLEAL 35899
It is noted that signal processing designs for real-time large-scale systems are increasingly confronted with two conflicting objectives. The traditional objective of optimal design in low signal-to-noise ratio enviro... 详细信息
来源: 评论
VLSI map decoder architectural analysis
VLSI map decoder architectural analysis
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ieee workshop on signal processing systems design and implementation
作者: Elassal, M Bayoumi, M Univ Louisiana CACS Lafayette LA 70504 USA
This paper presents an architectural analysis for the MAP decoder hardware implementations. The use of the graphical representation of the trellis-time graph is proposed to analytically model the scheduling between di... 详细信息
来源: 评论
High-speed pipelined ECC processor on FPGA
High-speed pipelined ECC processor on FPGA
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ieee workshop on signal processing systems design and implementation
作者: Chelton, William Benaissa, Mohammed Univ Sheffield Dept Elect & Elect Engn Mappin St Sheffield S1 3JD S Yorkshire England
This paper details the design of a new high-speed pipelined elliptic curve cryptography (ECC) application specific instruction set processor (ASIP) using field programmable gate array (FPGA) technology. A six-stage pi... 详细信息
来源: 评论
Receiver synthesis for nonlinearly amplified OFDM signal
Receiver synthesis for nonlinearly amplified OFDM signal
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ieee workshop on signal processing systems
作者: Zhidkov, SV System-On-Chip R and D Center Samsung Electronics Co. Ltd. South Korea
In this paper receiver synthesis for nonlinearly amplified orthogonal frequency division multiplexing (OFDM) signal is presented. Optimal maximum-likelihood (ML) receiver is proposed and its computational complexity i... 详细信息
来源: 评论
Programmable IF architecture for multi-standard software defined radios
Programmable IF architecture for multi-standard software def...
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ieee workshop on signal processing systems design and implementations (SiPS 05)
作者: Sheikh, F Masud, S Loan, A Lahore Univ Management Sci Dept Comp Sci & Engn Lahore 54792 Pakistan
An improved intermediate frequency (IF) architecture for software defined radios is presented. This architecture is programmable, reconfigurable and suited to hardware implementation. The architecture is based on a co... 详细信息
来源: 评论