Over the last decade Digital signalprocessing (DSP) has evolved from being a term known by only a few specialists, to a household term. The growth in DSP applied in e.g., consumer, medical, communications, networking...
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ISBN:
(纸本)0769503128
Over the last decade Digital signalprocessing (DSP) has evolved from being a term known by only a few specialists, to a household term. The growth in DSP applied in e.g., consumer, medical, communications, networking and computing devices has been spectacular. In fact, the digital signal processor market has grown 40% per year since 1988 and this figure is expected to continue over the next 10 years. At the same time the extreme improvement in hardware technologies has been paving the way for designing dedicated architectures for realtime execution of still more complex DSP algorithms, continuously decreasing the power and silicon consumption required to perform certain functionalities. Consequently, we consider advanced DSP topics as being essential in the curriculum for a still growing number of electrical engineering students. These topics are basically related to 1) the design of highly complex DSP algorithms according to given specifications, and 2) realtime implementation of these algorithms using various and conceptually different hardware architectures. Aalborg University, which has a long standing tradition for project-oriented teaching in traditional DSP theory at the Master level, therefore in 1994 launched a new Master programme in "DSP Algorithms and ASIC Architectures". Now, after five years of very successful execution of this programme, we in this paper would like to report on our experiences.
This paper presents the design of a single chip adaptive beamformer which contains 5 million transistors and can perform 50 gigaflops. The core processor of the adaptive beamformer is a QR-array processor implemented ...
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This paper presents the design of a single chip adaptive beamformer which contains 5 million transistors and can perform 50 gigaflops. The core processor of the adaptive beamformer is a QR-array processor implemented on a fully efficient linear systolic architecture. The paper highlights a number of rapid design techniques that have been used to realise the design. These include an architecture synthesis tool for quickly developing the circuit architecture and the utilisation of a library of parameterisable silicon intellectual property (IP) cores, to rapidly develop the circuit layouts.
In this paper, a design and implementation of a digital signal controller (DSC) for high frequency-based grid-tie inverter connected to wind emulator system is designed, fabricated, and tested. A 150 MHz (6.67-ns Cycl...
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In this work, we study a downlink communications scheme, focusing our attention on the case where the base station is equipped with multiple antennas and transmits information simultaneously to a certain number of use...
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ISBN:
(纸本)078039710X
In this work, we study a downlink communications scheme, focusing our attention on the case where the base station is equipped with multiple antennas and transmits information simultaneously to a certain number of users with single antenna terminals. We consider a realistic scenario where an imperfect estimate of the actual channel is available at both communication ends. Precisely, the actual channel is assumed to be inside an uncertainty region, around the channel estimate, which models the imperfection of the channel knowledge. In this context, we propose a robust power allocation technique that minimizes the transmitted power, while maintaining the necessary quality of service to obtain reliable communication links between the base station and the users. This robust power allocation is obtained as the solution of a convex optimization problem, which is next particularized for two common cases of channel uncertainty regions, and which can be numerically solved very efficiently. Finally, we present simulation results to show the performance of the proposed transmission scheme.
Passive Radar systems use the target illumination by third-party transmitters, e.g. FM radio or terrestrial TV broadcast stations, for target detection and localisation. Due to the great number and wide frequency spac...
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ISBN:
(纸本)9781479920358
Passive Radar systems use the target illumination by third-party transmitters, e.g. FM radio or terrestrial TV broadcast stations, for target detection and localisation. Due to the great number and wide frequency spacing of the different broadcast services, the resulting multistatic and multiband illumination of air targets can be used to generate a wide-area air picture and to achieve a sound tracking performance even for small and low-altitude air targets. However, to facilitate the operational use of Passive Radar e.g. as primary or complementary sensor within air surveillance or air traffic management systems, the performance and maturity levels of Passive Radar sensors have to be further increased. Thereby, the performance of active air surveillance radars can be considered a as benchmark. To close the gap to operational employment, a combined FM/DAB/DVB Passive Radar system was developed. Extensive test campaigns have lead to numerous improvements to the signalprocessing algorithms, to the diversity approach and to the accuracy of the model-based performance prediction toolset. This paper summarizes the results and the experience obtained during this effort.
In the last years multimedia processing applications have gained more and more importance in the field of mobile and hand-held devices, requiring dedicated hardware platforms characterized by high performance computat...
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In the last years multimedia processing applications have gained more and more importance in the field of mobile and hand-held devices, requiring dedicated hardware platforms characterized by high performance computation capabilities with reduced area occupation and low power consumption. 2D graphics and signalprocessing applications in general benefit from the usage of integer single-instruction-multiple-data (SIMD) functional units, while 3D graphics applications can be significantly accelerated employing single precision floating-point functional units. This paper presents a model and implementation of a versatile multiplier able to perform either double precision, (paired) single precision floating-point multiplications or 16-bit or 8-bit SIMD integer (vector) multiplications; it was implemented on an FPGA device and compared to other floating-point multipliers and similar devices, each capable of performing only a limited subset of the proposed design. The results show that all the functionalities provided by the set of the other considered devices can be performed by the proposed design with a minor area overhead penalty and still competitive performance; thus the proposed multiplier represents in particular a good candidate for usage in area-limited designs.
Fault occurrence, location, and system performance information, based on the analysis of traveling waves is gaining importance as new levels of high frequency measurement equipment are being introduced to the power gr...
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ISBN:
(纸本)9798350311167
Fault occurrence, location, and system performance information, based on the analysis of traveling waves is gaining importance as new levels of high frequency measurement equipment are being introduced to the power grid. In this work Continuous Wavelet Transformations with the complex Morlet wavelet analyzing functions was used to design a signalprocessing scheme to extract time and frequency characteristics from measured and recorded transient events that launched traveling waves on a 115 kV transmission system. The primary motivation was to extract baseline system performance information employing the traveling waves launched as a result of line re-energizations. This work is a proof of concept aimed extracting and baselining a system's line specific characteristics or 'fingerprints' and determining if a useful level of fingerprint consistency exists for typical line energizations. implementation of the proposed scheme on these specific signals, measured at 1.5 MHz sampling frequency, successfully extracted consistent fingerprints of the system's time-frequency behavior. A database of these fingerprints could be used to determine a dynamic high-frequency model for the system as well as track changes in the physical system as the response changes in different source and system operational scenarios.
The design of a prototype waveform interpolation (PWI) based codec, operating at 3.6 kbit/s, is presented with main focus on the quantization of the slowly evolving waveform (SEW) and rapidly evolving waveform (REW) c...
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Currently, graphical user interfaces (GUI) are required that facilitate the interpretation of industrial processes. In this literature, an automatic control system was implemented using a GUI and radio frequency (RF) ...
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We investigate some low-sensitivity transformations converting a prototype lowpass filter into a bandpass or a bandstop filter. The resulting coefficient values become quite low compared with conventional structures. ...
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We investigate some low-sensitivity transformations converting a prototype lowpass filter into a bandpass or a bandstop filter. The resulting coefficient values become quite low compared with conventional structures. Hence, when the coefficient values are expressed in minimum signed powers of two (MNSPT) forms or canonic signed digit (CSD) forms, they require a few shifts and adds and/or subtracts for implementation and we obtain a multiplierless realization. Further, when we allow some marginally insignificant deviation in the specifications including the tolerances and the bandedges, the number of shifts and adds and/or subtracts per multiplier becomes quite small, making this approach quite attractive. Alternatively, we can design the overall filter with marginally stricter tolerances than the desired specifications and meet the criteria after quantizing the coefficients.
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