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A Method for designing Emg Integrator using an FPGA

A Method for Designing Emg Integrator using an FPGA

引用

5th ieee International Work Conference on Bio-Inspired Intelligence, IWOBI 2017

作者： Mostafa, Sheikh Shanawaz Awal, Md. Abdul Ahmad, Mohiuddin Morgado-Dias, Fernando Instituto Superior Tecnico da Universidade de Lisboa Lisbon 1049-001 Portugal Signal Processing and Consultancy Group University of Queensland St LuciaQLD4072 Australia Khulna University of Engineering and Technology Khulna9203 Bangladesh Madeira Interactive Technologies Institute Funchal9020-105 Portugal University of Madeira Colegio Dos Jesuitas Rua Dos Ferreiros Funchal9000-082 Portugal

ISBN: (纸本)9781538608500

Electromyography is a method for recording electrical activities of the muscle for different clinical and nonclinical tasks. For extracting more information, integrated electromyography is commonly used than the raw electromyography. This paper presents the design and implementation of integrated electromyography both in software and hardware. Software was implemented in Matlab due to easier implementation whereas hardware was designed on Field Programmable Gate Array (FPGA) due to low cost and flexibility. It can be seen that, the integrator works like a moving average window filter and a hundred-point window size is chosen in the integrator design. To verify the method, real surface electromyography data was collected and used. The mean error between software (Matlab) and hardware is 5.8288e-08 and the correlation coefficient is 1. © 2017 ieee.

关键词： MATLAB

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SPICE and reservoir models for semiconductor optical amplifiers for high speed optical signal processing

SPICE and reservoir models for semiconductor optical amplifi...

引用

14th International workshop on the Physics of Semiconductor Devices

作者： Basu, P. K. Das Barman, Abhlrup Univ Calcutta Inst Radio Phys & Elect Kolkata 700009 W Bengal India

ISBN: (纸本)9781424417278

Semiconductor Optical Amplifiers (SOA) are key components in the present day all optical networks. They are used as wavelength converters, optical logic gates, bit comparators and many other all-optical digital signal processing applications. To design the systems, fast and efficient models need be developed considering the basic physics of the SOA. In the present paper, we describe two models that are useful in explaining the high frequency and transient behaviour of SOAs. In the first one, developed by us, the rate equations for photons and carriers in a TW-SOA are suitably tailored so that physical quantities can be replaced by circuit elements like resistors and capacitors and current sources. The equivalent circuit can then be analysed by SPICE simulation. Parasitic elements can easily be included in the model. Satisfactory agreement with available experimental data and results with rigorous transfer matrix method has been obtained. The second model, the reservoir model, developed by, Mathlouthi et al based on wideband steady state Connelly model, is useful for predicting the transient and high frequency behavior of SOA-based gates. In our work the reservoir model has been applied to explain the cross gain modulation and gain transient effects for single and WDM signals. It works quite fast to describe the behaviour of long cascades of SOAs. The simulated results agree closely with the experimental results for 1 Gb/s bit stream applied to single and cascaded SOAs and also in WDM systems.

关键词： semiconductor optical amplifiers all-optical gates optical networks SPICE model reservoir model

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design and implementation of an MHP video and graphics subsystem on Xilinx ML310 platform

Design and implementation of an MHP video and graphics subsy...

引用

International Conference on Intelligent Information Hiding and Multimedia signal processing

作者： Chen, Min-Hong Chang, Feng-Cheng Hang, Hsueh-Ming Natl Chiao Tung Univ Dept Elect Engn Hsinchu 300 Taiwan

ISBN: (纸本)9780769527451

Multimedia Home Platform (MHP) is a standard to enable versatile applications of a DVB program. In this paper, we design and implement a simplified MHP video and graphics subsystem. The Xilinx ML310 is chosen as the hardware platform to implement our design. The execution environment consists of an embedded Linux, a frame-buffer based X server, and a Java ME Personal Basis Profile,(J2ME PBP) run-time. To implement the MHP video functionality, we incorporate the FFmpeg libraries and the JavaTV JMF Lite to provide the demultiplexing and rendering operations of an MPEG-2 video. In addition, our major efforts are put on the video and graphics integration. The J2ME PBP reference software is heavily modified to optimally compose the video objects and the AWT graphics components in an MHP-compliant way. The application examples show that our proposed system is able to provide the AWT graphics and the JMF video presentation services, including normal presentation, arbitrary clipping scaling and positioning of an MPEG-2 video.

关键词： Multimedia systems

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Beamforming for interference mitigation and its implementation on an SDR baseband processor

Beamforming for interference mitigation and its implementati...

引用

ieee workshop on signal processing systems (SIPS)

作者： Adrian Krdu Yann Lebrun Ubaid Ahmad Sofie Pollin Prashant Agrawal Min Li Advanced Learning and Research Institute Universita della Svizzera italiana Lugano Switzerland Interuniversity Microelectronics Center Leuven Belgium

We present the first implementation of a distributed beam-forming algorithm for interference mitigation on an SDR baseband processor. Co-channel interference (CCI) is becoming a major source of impairments in wireless communications and distributed beamforming is a promising technique to mitigate its negative impact. However, such schemes are challenging to implement in practical scenarios due to their complexity and synchronization requirements. In this paper, we report on implementation of a suboptimal, yet efficient, beamforming scheme for CCI mitigation and present the complexity modeling and algorithm transformations for achieving numerically stability. We also present the fixed-point quantization and the proper mapping on a parallel programmable baseband architecture aimed for software-defined radio (SDR). We optimize this algorithm for a coarse grained reconfigurable array (CGRA) processor and evaluate it in the context of the LTE standard.

关键词： Array signal processing Matrix decomposition Interference signal to noise ratio Vectors signal processing algorithms Algorithm design and analysis

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DFLAP: A dynamic frequency linear array processor

DFLAP: A dynamic frequency linear array processor

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International Conference on Image processing (ICIP-96)

作者： Vijaykrishnan, N Ranganathan, N Bhavanishankar, N UNIV S FLORIDA DEPT COMP SCI & ENGNMICROELECT RES CTRTAMPAFL 33620

ISBN: (纸本)0780332598

In this paper, a novel dynamic frequency based SIMD linear array processor (DFLAP) for image processing applications is proposed. The operating clock frequency of the processor is varied dynamically between 400 MHz and 50 MHz based on the operation performed in order to enhance the processor throughput. An efficient implementation for the dynamic clocking unit (DCU) which enables dynamic switching of clock frequencies is presented. Each processing element in the linear array contains an 8-bit arithmetic/logic unit, an 8×8 single-cycle multiplier, a shifter, a bidirectional neighbor communication unit, a 32×8 dual port SRAM, and a DCU. The architecture was designed and implemented using CADENCE design tools. Several low-level image processing tasks have been mapped onto the architecture to demonstrate the effectiveness of the dynamic frequency based architecture.

关键词： Parallel processing systems

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Architecture of an experimental Web multimedia educational repository 4

Architecture of an experimental Web multimedia educational r...

引用

4th EURASIP Conference on Video, Image processing and Multimedia Communications

作者： Klicek, B Zekic-Susac, M Univ Zagreb Fac Org & Informat Varazdin Varazhdin Croatia

ISBN: (纸本)9531840547

The paper describes an approach towards design of an experimental educational repository. The focus is on facilitating education, combining different learning style theories with technology preferences, and evaluating contribution of multimedia and Web technologies. The initial survey on learning style preferences towards using different technologies during the learning process showed significant dependence. A model of supporting different phases of learning cycles in relation to used technologies is proposed. The model serves as the basis for designing the architecture of an educational repository. Furthermore, the paper describes the implementation of this architecture on the ERIS (Educational Repository for Intelligent systems) system. Some formal ways of educational repository design are also noted, as well as the possibilities for further research of ERIS.

关键词： learning theory e-learning education design multimedia systems design intelligent systems

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A system-level reuse methodology for embedded data-dominated applications

A system-level reuse methodology for embedded data-dominated...

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ieee workshop on signal processing systems (SIPS)

作者： F. Vermeulen F. Catthoor D. Verkest H. De Man IMEC VLSI Systems and Design Methodologies Leuven Belgium Katholieke Universiteit Leuven Leuven Belgium

This paper presents a system-level reuse methodology for data-dominated applications. A formalism is developed that structures the algorithmic specification in parts combining arithmetic and low-level control constructs that can be reused at the structural VHDL level without change and parts that combine the costly data-access-related constructs which are kept at higher levels in the code hierarchy. In this way, they retain the essential part of the design exploration freedom such that a global system-level data transfer and storage exploration phase can still be applied. The important power and area savings resulting from our approach compared to a traditional approach with fully predefined reusable blocks, are illustrated on examples of the video and modem world.

关键词： Arithmetic Modems

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Teaching mixed-criticality: Multi-rotor flight control and payload processing on a single chip

Teaching mixed-criticality: Multi-rotor flight control and p...

引用

2015 workshop on Embedded and Cyber-Physical systems Education, WESE 2015

作者： Schlender, Henning Schreiner, Sören Metzdorf, Malte Grüttner, Kim Nebel, Wolfgang Carl von Ossietzky University of Oldenburg Germany OFFIS - Institute for Information Technology Oldenburg Germany

ISBN: (纸本)9781450338974

Modern Cyber-Physical systems (CPS) already integrate multiple functions and this trend is expected to grow in the near future for economic reasons. Mixed-Criticality Cyber-Physical systems (MC-CPS) impose the challenging task of integrating safety-critical and non-safety critical applications on the same device or even on the same Systemon- Chip. The engineering of MC-CPS requires competences from different disciplines, such as physics, mechatronics, electrical engineering, embedded HW/SW design, real-time systems, software engineering, control theory, and safety analysis. Most of these disciplines are covered by university courses, but the application of these techniques on the design of a real MC-CPS can hardly be handled in a regular course. In this paper, the concept, organization, technical outcomes and discussion of the experiences of a two-term student project group is presented. The group performed the specification, implementation and test of a mixed-criticality multi-rotor system: integrating a safety-critical ight control algorithm with mission-critical payload processing on a single chip. Based on this experience, a student project group for teaching the interdisciplinary and crosscutting topic of mixed-criticality within a traditional technical computer science curriculum is advocated. © 2015 ACM.

关键词： Teaching

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design Space Exploration of DSP Applications Based on Behavioral Description Models

Design Space Exploration of DSP Applications Based on Behavi...

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ieee workshop on signal processing systems (SIPS)

作者： F. Thabet P. Coussy D. Heller E. Martin LESTER-CNRS Université de Bretagne Sud France

Exploring different communication architectures and timing behaviors is a key step in modern system design flows. This paper describes a behavioral description model (BDM) that allows design space exploration of DSP applications at different abstraction levels. The proposed approach consists in embedding a sequential function into a BDM object that includes a set of I/O and control processes. Communication architectures and timing behaviors (I/O scheduling, I/O parallelism...) can be varied and easily explored by adding I/O and control code into the dedicated concurrent processes while keeping the functionality description unchanged throughout the refinement steps. Although the proposed approach leads to slower simulations when compared to a rewrite of the specification for the desired I/O scheme, it allows much faster exploration because models do not have to be rewritten for every I/O scheme to be explored

关键词： Space exploration Digital signal processing Mathematical model Timing High level synthesis Communication system control Decoding Time to market Modeling Hardware

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The case for teaching DSP algorithms in conjunction with implementations

The case for teaching DSP algorithms in conjunction with imp...

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ieee Digital signal processing workshop

作者： L.S. DeBrunner V. DeBrunner School of Electrical and Computer Engineering University of Oklahama Norman OK USA

In this paper, we argue the need for integrating the teaching of DSP algorithms with their implementation. We view this as the next step in the road of DSP education, naturally following the current trends from all algorithmic theory in the 19 70's to the increasing (but still limited) incorporation of implementation techniques. On the other hand, we also see the increasing availability of implementation texts ranging from computer arithmetic to embedded real-time systems. These texts have a limited algorithmic component. We believe that we should teach DSP algorithms and their implementations together in one unified course (or sequence of courses). It might be most logical to incorporate this material at the junior year.

关键词： Computer aided software engineering Education Digital signal processing signal processing algorithms MATLAB design engineering Programming profession Filters Digital signal processors Assembly

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