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A Universal Methodology of Complex Number Computation for Low-Complexity and High-Speed implementation

ieee TRANSACTIONS ON CIRCUITS AND systems I-REGULAR PAPERS 2025年第3期72卷 1308-1320页

作者： Wang, Yu Zhang, Jin Wu, Youlong Lyu, Fei Luo, Yuanyong Nanjing Xiaozhuang Univ Sch Elect Engn Nanjing 211171 Peoples R China Jinling Inst Technol Sch Elect & Informat Engn Nanjing 211169 Peoples R China Nanjing Univ Aeronaut & Astronaut Coll Integrated Circuits Nanjing 211106 Peoples R China Nanjing Univ Sch Phys Nanjing 210093 Peoples R China Huawei Corp Dept Turing Architecture Design Linx Lab HiSilicon Shenzhen 518129 Peoples R China

In complex-valued neural network (CVNN) applications, complex number calculations require high performance rather than high precision. However, most previous studies focused on high-precision approaches, which have low speed and high hardware costs. This paper proposes a universal methodology of complex number computation for low-complexity and high-speed implementation. The proposed methodology is based on the piecewise linear (PWL) method and can be used for different types of complex number computations. Considering that multiplication operations consume considerable resources, multiplication, fused square-add (FSA) and fused multiply-add (FMA) operations are the focus of optimization. The partial products of the square operation are reduced by folding and merging techniques because of their symmetry in the FSA operation. The partial products of the multiplication and FMA operations are reduced via Booth encoding. In addition, the partial products are further reduced by the proposed step-by-step truncation method. The proposed segmenter, which simulates the hardware implementation, automatically divides the nonlinear functions in the complex number computations into the smallest number of segments according to the required precision. The results show that the proposed approach improves performance and reduces hardware costs compared with the state-of-the-art methods for complex number calculations involving square roots, reciprocals and logarithms.

关键词： Hardware Image segmentation Software Neural networks Costs signal processing algorithms Power demand Optimization Merging Encoding Piecewise linear (PWL) approximation method computation for complex numbers step-by-step truncation square root calculation of complex numbers reciprocal calculation of complex numbers logarithm calculation of complex numbers

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A Low-Complexity and High-Throughput Hardware design for Lempel-Ziv 4 Compression Algorithm

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ieee TRANSACTIONS ON CIRCUITS AND systems I-REGULAR PAPERS 2025年

作者： Chen, Tao Song, Suwen Wang, Zhongfeng Nanjing Univ Sch Elect Sci & Engn Nanjing 210023 Peoples R China Sun Yat Sen Univ Sch Integrated Circuits Shenzhen 518107 Peoples R China

The Lempel-Ziv (LZ) 4 compression algorithm, widely used in data transmission and storage, faces the challenge of high-speed implementation and increased complexity in the era of big data. Therefore, this paper proposes a single-core parallel architecture for LZ4 algorithm with high throughput and low complexity. Firstly, to enhance throughput, two innovative approaches are introduced from the perspective of parallelism and frequency with an acceptable compression ratio loss: each parallelization window is restricted to performing a single match, bridging the gap between actual and theoretical parallelism;the feedback loop in the circuit is broken by utilizing the spatial correlation between adjacent matches for higher frequency. Secondly, two optimization schemes are employed on resource-consuming modules to achieve low complexity. Multi-port hash tables using Live Value Table (LVT) are improved based on inherent data characteristics, significantly reducing the hardware resource consumption while ensuring excellent scalability on hash table depth and frequency. The match comparison operation is moved ahead, further reducing the logic resources by 64.36%. Finally, our design is implemented on FPGA and ASIC platforms. Experimental results on FPGA demonstrate that the proposed architecture achieves a throughput of 17.39 Gb/s, exhibiting a 2.86x improvement over the state-of-the-art, along with a 6.46x enhancement in area efficiency. Further optimizations including Canonic Signed Digit (CSD) coding and computational reuse on the ASIC platform result in a 45x improvement in area efficiency.

关键词： Hardware Throughput Parallel processing Complexity theory Field programmable gate arrays Compression algorithms Encoding signal processing algorithms Parallel architectures Logic Lossless data compression LZ4 algorithm FPGA ASIC high throughput low complexity hardware accelerator

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Globally Optimal Resource Allocation design for Discrete Phase Shift IRS-Assisted Multiuser Networks With Perfect and Imperfect CSI

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ieee TRANSACTIONS ON WIRELESS COMMUNICATIONS 2025年第2期24卷 1306-1324页

作者： Wu, Yifei Xu, Dongfang Ng, Derrick Wing Kwan Schober, Robert Gerstacker, Wolfgang Friedrich Alexander Univ Erlangen Nurnberg FAU Inst Digital Commun D-91054 Erlangen Germany Hong Kong Univ Sci & Technol Dept Elect & Comp Engn Hong Kong Peoples R China Univ New South Wales Sch Elect Engn & Telecommun Sydney NSW 2052 Australia

Intelligent reflecting surfaces (IRSs) are a promising low-cost solution for achieving high spectral and energy efficiency in future communication systems by enabling the customization of wireless propagation environments. Despite the plethora of research on resource allocation design for IRS-assisted multiuser wireless communication systems, the optimal design and the corresponding performance upper bound are still not fully understood. To bridge this gap in knowledge, in this paper, we investigate the optimal resource allocation design for IRS-assisted multiuser multiple-input single-output (MISO) systems employing practical discrete IRS phase shifters. In particular, we jointly optimize the beamforming vector at the base station (BS) and the discrete IRS phase shifts to minimize the total transmit power for the cases of perfect and imperfect channel state information (CSI) knowledge. To this end, two novel algorithms based on the generalized Benders decomposition (GBD) method are developed to obtain the globally optimal solution for perfect and imperfect CSI, respectively. Moreover, to facilitate practical implementation, we propose two corresponding low-complexity suboptimal algorithms with guaranteed convergence by capitalizing on successive convex approximation (SCA). In particular, for imperfect CSI, we adopt a bounded error model to characterize the CSI uncertainty and propose a new transformation to convexify the robust quality-of-service (QoS) constraints. Our numerical results confirm the optimality of the proposed GBD-based algorithms for the considered system for both perfect and imperfect CSI. Furthermore, we unveil that both proposed SCA-based algorithms can attain a locally optimal solution within a few iterations. Moreover, compared with the state-of-the-art solution based on alternating optimization (AO), the proposed low-complexity SCA-based schemes achieve a significant performance gain, especially for moderate-to-large numbers of IRS elements.

关键词： Wireless communication Resource management Optimization Phase shifters Array signal processing Vectors Channel estimation Approximation algorithms Quality of service Convergence Generalized Benders decomposition method optimal resource allocation intelligent reflecting surface

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A Novel Pattern Recognition Method for Self-Powered TENG Sensor Embedded to the Robotic Hand

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ieee ACCESS 2025年 13卷 14101-14112页

作者： Balapan, Azat Yeralkhan, Rauan Aryslanov, Alikhan Kalimuldina, Gulnur Yeshmukhametov, Azamat Nazarbayev Univ Dept Robot Engn Astana 010000 Kazakhstan Nazarbayev Univ Dept Mech & Aerosp Engn Astana 010000 Kazakhstan Nazarbayev Univ Inst Smart Syst & Artificial Intelligence Astana 010000 Kazakhstan

This paper presents the development and implementation of a human-like robotic hand integrated with advanced triboelectric nanogenerator (TENG) based tactile sensors for shape and material recognition. Meanwhile, traditional piezo sensors' effectiveness is limited, sensitive to the temperature, and the manufacturing cost is high. TENG sensors offer a self-powered alternative with simplified circuitry, cost-effective fabrication, and enhanced durability. To capitalize on these benefits, we propose a novel machine learning approach that represents time-series data as two-dimensional images processed using a two-dimensional convolutional neural network (2D CNN). This method is compared against the traditional one-dimensional convolutional neural network (1D CNN) method. The research methodology encompasses TENG sensor preparation, noise cancellation, robotic hand design, and control electronics. Experimental results demonstrate that the proposed 2D CNN method significantly improves shape and material recognition accuracy, achieving 98% and 99%, respectively, compared to 94% and 98% with the 1D CNN method. Real-time evaluation further validates the robustness and adaptability of the proposed model in unstructured environments. These findings underscore the potential of integrating TENG sensors with advanced neural network architectures for autonomous dexterous manipulation in various industrial applications, paving the way for future advancements in robotic tactile sensing.

关键词： Robot sensing systems Hands Thumb Shape Sensors Data collection Tactile sensors Data visualization Convolutional neural networks Carbon Dataset collection machine learning robot hand design signal processing TENG sensor

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Underdetermined AOA Estimation Using Non-Uniform Sub-Connected Hybrid Beamforming systems

IEEE OPEN JOURNAL OF THE COMMUNICATIONS SOCIETY

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ieee OPEN JOURNAL OF THE COMMUNICATIONS SOCIETY 2025年 6卷 1485-1496页

作者： Liu, Yu-Chen Su, Hsuan-Jung Takano, Yasuhiro Natl Taiwan Univ Grad Inst Commun Engn Taipei 10617 Taiwan Chitose Inst Sci & Technol Dept Informat Syst Engn Chitose Hokkaido 0668655 Japan

Hybrid beamforming (HBF) is emerging as a key technology for future wireless networks, particularly in millimeter wave (mmWave) bands. In this paper, we present a non-uniform sub-connected hybrid beamforming (NSC-HBF) system that enables the implementation of the difference co-array for the underdetermined angle-of-arrival (AOA) estimation. We propose a broad beam synthesis technique to mitigate performance degradation caused by uneven analog combining gains. To further enhance estimation efficiency, we modified the co-array least mean squares (co-array LMS) method by directly solving the least-squares problem to determine the filter weights. The proposed method reduces computational complexity and eliminates iterative procedures for faster processing. Our numerical results demonstrate the pseudo-spectrum and detection performance for both pencil and broad beams, highlighting the importance of analog combining codebook design. Additionally, the proposed method achieves higher estimation accuracy compared to the co-array root-LMS.

关键词： Estimation Antenna arrays Array signal processing Vectors Radio frequency Covariance matrices Computer architecture Structural beams Computational complexity Millimeter wave communication Nested array HBF NSC-HBF underdetermined AOA estimation

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Decentralized Likelihood Ascent Search-Aided Detection for Distributed Large-Scale MIMO systems

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ieee Transactions on Wireless Communications 2025年第5期24卷 4160-4173页

作者： Chen, Qiqiang Wang, Zheng Qi, Chenhao Gao, Zhen Huang, Yongming Niyato, Dusit Southeast University School of Information Science and Engineering Nanjing210096 China Jinan250307 China Zhuhai519088 China Jiaxing314019 China Jurong West 639798 Singapore

In this paper, we propose the decentralized likelihood ascent search (DLAS)-aided detection for the distributed large-scale multiple-input multiple-output (MIMO) systems to achieve more remarkable performance gains. With the help of DLAS, traditional distributed iterative methods are able to achieve better performance than the linear detection schemes such as ZF and MMSE. According to analysis, we derive the equivalent noise and the post-processing SNR for DLAS. More importantly, based on them, we demonstrate that the proposed DLAS-aided detection achieves the full received diversity. To further facilitate its implementation in practice, we design the decentralized effective ring (DER) architecture with significantly reduced bandwidth requirement and better parallel computation. Finally, simulation results demonstrate that the proposed DLAS-aided detection attains the same received diversity as ML detection while surpassing state-of-the-art decentralized schemes in terms of BER performance, with reduced complexity and bandwidth costs. © 2002-2012 ieee.

关键词： MIMO Bandwidth Vectors Computer architecture Antennas signal detection Costs Complexity theory Antenna arrays Uplink

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Development and Evaluation of a Calibration Methodology for Pressure-Resistive Sensors in a Specialized Diagnostic Laboratory

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ieee ACCESS 2025年 13卷 77642-77655页

作者： Zelnik, Roman Ruzarovsky, Roman Horak, Tibor Csekei, Martin Michal, David Sido, Jan Slovak Univ Technol Bratislava Inst Mfg Technol Fac Mat Sci & Technol Trnava Trnava 91724 Slovakia Slovak Univ Technol Bratislava Inst Appl Informat Automat & Mechatron Fac Mat Sci & Technol Trnava Trnava 91724 Slovakia

This paper presents the development and evaluation of a calibration methodology for pressure-resistive sensors, implemented within a specialised diagnostic laboratory. The approach utilises algorithmic correction, structured measurement routines, and real-time signal processing to perform sensor calibration exclusively at the software level, without requiring hardware intervention. A custom sensor profiling framework has been designed to enable precise analysis of sensor characteristics, degradation, and long-term behaviour. The calibration algorithm employs mathematical interpolation and dataset synchronisation techniques to enhance accuracy and reduce measurement uncertainty. Experimental validation demonstrated a reduction in average deviation from 18.1% to 1.1%, with an overall tolerance range of just 2.6%. These results confirm the effectiveness of the proposed methodology in improving sensor precision and stability. The system is particularly suited for industrial environments where reliable pressure sensing is essential for safety, efficiency, and predictive maintenance.

关键词： Sensors Calibration Accuracy Reliability Pressure sensors Mechanical sensors Sensor phenomena and characterization Pressure measurement Sensor systems Temperature measurement Autonomous calibration algorithms diagnostic laboratories measurement deviation reductions pressure-resistive sensors sensor profiles software-level calibrations

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CSD-Driven Speedup in RISC-V Processor 18th

CSD-Driven Speedup in RISC-V Processor

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18th International workshop on design and Architecture for signal and Image processing, DASIP 2025

作者： Ebrahimiazandaryani, Farhad Fey, Dietmar Friedrich-Alexander-Universität Erlangen-Nürnberg Erlangen91058 Germany

ISBN: (纸本)9783031878961

This paper introduces a synthesizable μ-architectural design method to boost the performance of a given RISC-V processor architecture by utilizing Canonical Signed Digit (CSD) representation during the execution stage within the processor pipeline. CSD is a unique ternary number system that enables carry/borrow-free addition/subtraction in constant time O(1) regardless of word length N. The CSD extension is exemplarily demonstrated to the Potato processor, a simple RISC-V implementation for FPGAs. However, the method can also be applied to other implementations in principle. Our performance boost due to the CSD requires an overhead for conversion between binary and CSD representation. This overhead is compensated by an extension to a seven-stage pipeline architecture, featuring a three-step execution stage that increases the throughput and the operating frequency and enables loop unrolling, which is especially advantageous in applications with consecutive calculations, e.g., signal processing. By experimental results, we compared our CSD-based ternary solution to the original implementation, which utilizes the usual pure binary number representation of the operands. Our approach achieved a 2.41X increase in operating frequency over the original RISC-V processor on FPGA, with over 20% of this gain attributed to the CSD encoding. This enhancement resulted in up to a 2.40X improvement in throughput and a 2.37X reduction in execution time for computation-intensive benchmark applications. © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： Pipeline processing systems

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Digital Low-Cost FPGA implementation of Two-Coupled and Grid-Based Network of 2D Artificial Cochlea Using the Hopf Resonator Approach

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ieee TRANSACTIONS ON CIRCUITS AND systems I-REGULAR PAPERS 2025年第5期72卷 2178-2188页

作者： Lin, Sen Xiang, Songjie Chen, Rui Li, Liyuan Ge, Yisu Gao, Xiaoyun Daoud, Mohammad Sh. Mayet, Abdulilah Mohammad Chu, Yanling Huang, Yideng Wenzhou Med Univ Affiliated Hosp 3 Dept Otolaryngol Wenzhou 325200 Zhejiang Peoples R China Wenzhou Med Univ Affiliated Hosp & Yuying Childrens Hosp 2 Dept Otolaryngol Wenzhou 325000 Zhejiang Peoples R China Wenzhou Med Univ Affiliated Hosp 1 Dept Otolaryngol Wenzhou 325000 Zhejiang Peoples R China Wenzhou Univ Coll Comp Sci & Artificial Intelligence Wenzhou 325100 Peoples R China Hangzhou Dianzi Univ Dept Digital Media Technol Hangzhou 310018 Peoples R China Al Ain Univ Coll Engn Abu Dhabi U Arab Emirates King Khalid Univ Coll Engn Elect Engn Dept Abha 61421 Saudi Arabia Wenzhou Med Univ Quzhou Affiliated Hosp Dept Otolaryngol Quzhou Peoples Hosp Quzhou 324000 Zhejiang Peoples R China

The Cochlea, a spiral-shaped structure in the inner ear, plays a crucial role in the process of hearing by converting sound waves into electrical signals that the brain can interpret. This study introduces a cost-effective adaptation of 2D artificial Cochlea mathematical modeling using a planar approximation technique. The main novelty and contribution of our work is a method employs surface-based functions and is known as the Surface-Based Approximation Model of Cochlea (SBAMoC). By simplifying complex multiplication processes in nonlinear components, the SBAMoC reduces costs and enhances efficiency, making it suitable for FPGA implementation with minimal hardware requirements. The proposed model is evaluated in scenarios involving two-coupled oscillations and grid-based cochlear networks to better understand its performance. Through hardware synthesis on a Virtex-II board, the SBAMoC demonstrates improved efficiency and reduced computational expenses compared to the original model, achieving faster speeds and greater cost-effectiveness. In practical tests, the SBAMoC exhibits higher operational speeds and increased scalability, outperforming the original model by replicating accurate cochlear behaviors with minimal deviations. Specifically, the single SBAMoC implementation in our model achieves a speed boost of approximately 1.333 times compared to the original model (381.292 MHz vs. 286.029 MHz) and supports a greater number of fitted SBAMoCs (75 vs. 35), showcasing its superior efficiency and performance enhancements. In case of real-world applications, it can be considered for the development of more efficient and cost-effective cochlear implants, leading to improved hearing restoration solutions for individuals with hearing impairments. Also, the findings from this study could also be leveraged to enhance the design and implementation of signal processing systems in various audio and communication devices, paving the way for advanced audio processing technolog

关键词： Cochlea sound waves optimization digital FPGA auditory system bio-inspired AI

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implementation and Validation of a Comprehensive, Noise-Aware FMCW Radar Simulation Framework

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ieee Sensors Journal 2025年第9期25卷 15235-15246页

作者： Ubezio, Barnaba Sambath, Praanesh Eryildirim, Abdulkadir Zangl, Hubert University of Klagenfurt Institute of Smart Systems Technologies Klagenfurt9020 Austria Joanneum Research Robotics Klagenfurt9020 Austria Infineon Technologies Austria AG Graz8020 Austria

Complete simulation environments for automotive scenarios require simulated sensor data. The widespread use of vision sensors led to the availability of comprehensive simulations of their measurements. The same level of detail is hardly attained for frequency-modulated continuous wave (FMCW) radar sensors, despite their numerous advantages in automotive applications. Standard radar simulations, in fact, solely focus on their ultimate output, i.e., point clouds with velocity information. Most state-of-the-art tools based on image-rendering and ray-tracing do not treat one or more important characteristics, such as reflection intensities, multiple antennas, and noise impairments. We present a comprehensive and high-fidelity simulation framework for FMCW radars, where images from an RGB-D camera model in the Unity game engine are manipulated to generate 3-D time-domain radar measurements. In addition, the framework provides thermal and phase noise (PN) modeling, radiation patterns, and corresponding LiDaR-like point clouds for ground truth. signal processing techniques are performed on the generated data in the same way as on a real sensor, so that standard radar output is provided. The simulated data are compared and validated with real measurements collected in a parking garage, showing the accurate reproducibility of multiple scenarios. The overall characteristics of the proposed simulation are also compared with other simulator software in the literature. © 2001-2012 ieee.

关键词： Phase noise

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