Fast Fourier Transforms (FFTs) are frequently employed in various applications such as imageprocessing and speech recognition. Though FFT calculations can be speeded up considerably, real time processing requirements...
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Many low level vision tasks that are computationally intensive are easily parallelizable. The lack of parallel processingsystems, or their prohibitive costs, have prevented the move of vision processingalgorithms fr...
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ISBN:
(纸本)0780317602
Many low level vision tasks that are computationally intensive are easily parallelizable. The lack of parallel processingsystems, or their prohibitive costs, have prevented the move of vision processingalgorithms from single processor systems to multiprocessor systems. With the recent spurt of parallel processing hardware, there is a need to investigate the feasibility of using such machines for some vision algorithms. Speedup is an important factor in determining the feasibility of migration from single processor systems to parallel processors. In this work, we investigate a particular segmentation algorithm and present theoretical speedup results. Our formula can work out numerical speedups by simply plugging in the parameter values.
A hierarchical data structure for the representation of document images in vector form is suggested, which allows to store in compact form all needed information about connected components, segments and feature points...
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ISBN:
(纸本)0819412236
A hierarchical data structure for the representation of document images in vector form is suggested, which allows to store in compact form all needed information about connected components, segments and feature points. The process steps for obtaining this data structure are described. A fast one-pass algorithm for the transformation of a large-size thinned image into the vector form is suggested. The defects which can exist in the vector representation are extracted and an algorithm for their reduction is shortly described. Experimental results are also shown.
This paper presents constant-time algorithms for labeling the connected components of images on a network of processors with a wide reconfigurable bus. The algorithms are based on a processor indexing scheme which emp...
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Enhancement of radiological images (chest x-rays, CT images, mammograms, etc.) can improve their subsequent clinical interpretation by physicians or improve their automatic screening. In this paper we present two new ...
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ISBN:
(纸本)0780312813
Enhancement of radiological images (chest x-rays, CT images, mammograms, etc.) can improve their subsequent clinical interpretation by physicians or improve their automatic screening. In this paper we present two new algorithms for automated adaptive contrast enhancement. Compared to existing techniques the proposed methods are completely automatic, in the sense that do not require any interactive iterative adjustments by the reviewing physician. Furthermore, they exhibit better or equal performance with available methods. Both algorithms can be efficiently implemented using low-cost workstations or personal computers and can process even 2 K×2 K images in a few seconds.
A machine vision system was developed to inspect roses, and assign grades similar to those used by human graders. Illumination and imageprocessing techniques were developed to extract the main features used by human ...
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ISBN:
(纸本)0819413283
A machine vision system was developed to inspect roses, and assign grades similar to those used by human graders. Illumination and imageprocessing techniques were developed to extract the main features used by human vision. These features were identified as stem length, diameter and straightness, and bud color and maturity (i.e., openness). Illumination techniques include the design of an inspection chamber and the choice of proper light source. image analysis includes the development of algorithms for image understanding. Supervised learning was used to classify roses.
The authors present a set of heterogeneous algorithms for computer vision tasks using the image understanding architecture (IUA). The full-scale IUA developed jointly by Hughes Research Labs and University of Massachu...
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This paper describes the efficient implementation of the 2-D DCT for image coding on the DSP96002 processor. The DSP96002 is a general purpose, dual-bus IEEE floating point digital signal processor. Utilizing the DSP9...
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ISBN:
(纸本)0780317610
This paper describes the efficient implementation of the 2-D DCT for image coding on the DSP96002 processor. The DSP96002 is a general purpose, dual-bus IEEE floating point digital signal processor. Utilizing the DSP96002's inherent parallel processing capabilities, the execution of a 8×8 fast 2-D DCT takes 133 microseconds. The recently proposed 2-D and 1-D fast DCT algorithms are employed in this implementation. Transform coefficient zigzag ordering, used in the image coding process, executes in less than 28 microseconds. The fast DSP96002 routines, incorporated within this implementation, can be applied in a number of image coding applications such as video and still image coding as well as the newer JPEG still image and MPEG video standards.
Spurred by the emerging theory of multiscale representations of signals and wavelet transforms, researchers in the signal and imageprocessing community have developed multiresolution processingalgorithms. These algo...
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A multi-purpose hardware system for processingimages at video rates is described. image sequence hardware for temporal analysis in realtime (ISHTAR) uses 18 TI TMS320c40 (c40) DSPs to process input from a CCD camera ...
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ISBN:
(纸本)0819410241
A multi-purpose hardware system for processingimages at video rates is described. image sequence hardware for temporal analysis in realtime (ISHTAR) uses 18 TI TMS320c40 (c40) DSPs to process input from a CCD camera or vCR source. The hardware architecture consists of a pipeline of nine processor boards, each with two c40 processors, the whole system being synchronized by the vertical sync of the input device. This enables the calculation of a number of two dimensional convolutions to be achieved at video frame rates with a delay between the input and the output dictated by the length of the pipeline. The system is fully reconfigurable in software and partially reconfigurable in hardware so that many different types of imageprocessingalgorithms can be implemented. The specific application of a generalized gradient model to measure image motion is described, outlining the particular program structure dictated by the hardware design. The SUN 4 host has access to each processor and has the ability to change parameters and program control while the system is running. In this way active control feedback loops can be employed, particularly when the motion of the camera is under the host control, forming an active vision system. Simulations using real image sequences are presented.
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