This paper describes two approaches suitable for an FPGA implementation of Walsh-Hadamard transforms. These transforms are important in many signal-processing applications including speech compression, filtering and c...
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ISBN:
(纸本)0780370414
This paper describes two approaches suitable for an FPGA implementation of Walsh-Hadamard transforms. These transforms are important in many signal-processing applications including speech compression, filtering and coding. Two novel architectures for the Fast Hadamard Transforms using both systolic architecture and distributed arithmetic techniques are presented. The first approach uses the Baugh-Wooley multiplication algorithm for a systolic architecture implementation. The second approach is based on both distributed arithmetic ROM and accumulator structure, and a sparse matrix factorisation technique. Implementations of the algorithms on a Xilinx FPGA board are described. Distributed arithmetic approach exhibits better performances when compared with the systolic architecture approach.
The new MPEG-4 Audio standard provides two toolsets for synthetic Audio generation, Audio processing and multimedia content description called Structured Audio (SA) and BInary Format for Scenes (BIFS). Moving from a s...
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ISBN:
(纸本)0780370414
The new MPEG-4 Audio standard provides two toolsets for synthetic Audio generation, Audio processing and multimedia content description called Structured Audio (SA) and BInary Format for Scenes (BIFS). Moving from a systematic analysis of SA and from the implementation of an efficient SA decoder, this paper describes the design of a virtual DSP architecture able to exploit the data level parallelism contained in many typical audio processingalgorithms. The proposed virtual DSP architecture shows good performance on general purpose platforms and can be easily adapted and optimized for parallel superscalar devices. The porting and results on a V-LIW DSP device confirm the effectiveness and flexibility of the approach, particularly suitable for standalone embedded solutions.
In the motor control industry, DSP systems offer major improvements over analog designs, enabling notably to replace speed or position sensors by the implementation of sensorless control algorithms. In this paper, we ...
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ISBN:
(纸本)0780370414
In the motor control industry, DSP systems offer major improvements over analog designs, enabling notably to replace speed or position sensors by the implementation of sensorless control algorithms. In this paper, we propose a new viable method which estimates the rotor velocity from the "rotor slot harmonics" included in the stator current signals. This approach is based on both an adjustable digital filter, which is fitted to this particular application, and an extended Kalman filter whose computational burden has been reduced thanks to an additionnal virtual state.
The problem of structure from motion (SFM) is to extract the three-dimensional model of a moving scene from a sequence of images. Most of the algorithms which work by fusing the two-frame depth estimates (observations...
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ISBN:
(纸本)0780370414
The problem of structure from motion (SFM) is to extract the three-dimensional model of a moving scene from a sequence of images. Most of the algorithms which work by fusing the two-frame depth estimates (observations) assume an underlying statistical model for the observations and do not evaluate the quality of the individual observations. However, in real scenarios, it is often difficult to justify the statistical assumptions. Also, outliers are present in any observation sequence and need to be identified and removed from the fusion algorithm. In this paper, we present a recursive fusion algorithm using Robbins-Monro stochastic approximation (RMSA) which takes care of both these problems to provide an estimate of the real depth of the scene point. The estimate converges to the true value asymptotically. We also propose a method to evaluate the importance of the successive observations by computing the Fisher information (FI) recursively. Though we apply our algorithm in the SFM problem by modeling of human face, it can be easily adopted to other data fusion applications.
A demonstrator for OFDM transmission based on a programmable DSP (TMS320C6201) is described. It turns out that the realized rather moderate sampling rates up to 10 Msamples/s still represent quite a challenge for stat...
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ISBN:
(纸本)0780370414
A demonstrator for OFDM transmission based on a programmable DSP (TMS320C6201) is described. It turns out that the realized rather moderate sampling rates up to 10 Msamples/s still represent quite a challenge for state-of-the-art DSPs in terms of the required computational power but also the synchronization of the internal processing with the I/O interface to a real-time environment. It is illustrated that SW development under stringent resource constraints requires analysis and partitioning of the algorithms in a manner very similar to the mapping strategies necessary in an ASIC design for either cost-sensitive or extremely challenging applications. Therefore, the demonstrator development provides a sound basis for a subsequent design of such a kind of ASICs.
In this paper, we propose a segment-based matching pursuit algorithm where the psychoacoustical properties of the human auditory system are taken into account. Rather than scaling the dictionary elements according to ...
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ISBN:
(纸本)0780370414
In this paper, we propose a segment-based matching pursuit algorithm where the psychoacoustical properties of the human auditory system are taken into account. Rather than scaling the dictionary elements according to auditory perception, we define a psychoacoustic-adaptive norm on the signal space which can be used for assigning the dictionary elements to the individual segments in a rate-distortion optimal manner. The new algorithm is asymptotically equal to signal-to-mask ratio based algorithms in the limit of infinite analysis window length. However, the new algorithm provides a significantly improved selection of the dictionary elements for finite window length.
Vector rotation is the key operation employed extensively in many digital signal processing applications. In this paper, we introduce a new design concept called Angle Quantization (AQ). It can be used as a design ind...
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ISBN:
(纸本)0780370414
Vector rotation is the key operation employed extensively in many digital signal processing applications. In this paper, we introduce a new design concept called Angle Quantization (AQ). It can be used as a design index for vector rotational operation, where the rotational angle is known in advance. Based on the AQ process, we establish a unified design framework for cost-effective low-latency rotational algorithms and architectures. Several existing works, such as conventional CORDIC, AR-CORDIC, MVR-CORDIC, and EEAS-based CORDIC, can be fitted into the design framework, forming a Vector Rotational CORDIC Family. Based on the new design framework, we can realize high-speed / low-complexity rotational VLSI circuits, whereas without degrading the precision performance in fixed-point implementations.
A representation form of prior information about visually accepted images is proposed in this paper on purpose to create of images processingalgorithms based on maximum a posteriori principle. The image model was pre...
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A representation form of prior information about visually accepted images is proposed in this paper on purpose to create of images processingalgorithms based on maximum a posteriori principle. The image model was presented in the Student's distribution form of decomposition coefficients of the image in Wavelet functions basis. The change boundaries of proposed model parameters were defined for visually accepted images. An adequacy of the model was verified for real-world images. The expediency and advantages of proposed model were shown at the creation of image denoising algorithm.
In this paper a reprogrammable video processor architecture is presented. The processor is based on FPGA technology so it can be programmed to work with different algorithms prepared by the user (i.e. edge detection)....
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In this paper a reprogrammable video processor architecture is presented. The processor is based on FPGA technology so it can be programmed to work with different algorithms prepared by the user (i.e. edge detection). processing performance can be very high since each algorithm definition is hardware optimized.
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