An innovative algorithm is presented for the automatic detection of spot targets in infrared terrain image sequences. The algorithm is designed to successfully perform target detection also in presence of deceitful ho...
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ISBN:
(纸本)0819404101
An innovative algorithm is presented for the automatic detection of spot targets in infrared terrain image sequences. The algorithm is designed to successfully perform target detection also in presence of deceitful hot background structures such as rocks and sand representing the hottest regions of the scene. The original contribution is represented by the thermal model adopted for the infrared scene and which drives the intraframe processing by iteratively applying three processing steps: i) thresholding ii) clustering iii) semantic labeling. The aim of the intraframe segmentation module is first to detect well contrasted targets and then verify the presence of less contrasted ones on the hypothesis that they all belong to the same formation. At each iteration within the intraframe analysis the thermal threshold is lowered and the hot part of the scene is processed to look for the presence of targets. By theans of different clustering procedures the hot part of the scene is partitioned into a set of connected objects each characterized by a feature vector consisting of area peak thermal value and centroid coordinates. The objects which correspond to the target model are marked as potential targets. If they have been already detected during the previous iterations without sensible changes in the descriptive parameters they are labeled as " confirmed" targets. If on the contrary the area has significantly increased they are labeled as " expanded" targets. If a
This paper presents the architectural features and imagingapplications of the Orthogonal MultiProcessor (OMP) system, which is under construction at the University of Southern California with research funding from NS...
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ISBN:
(纸本)0819402931
This paper presents the architectural features and imagingapplications of the Orthogonal MultiProcessor (OMP) system, which is under construction at the University of Southern California with research funding from NSF and assistance from several industrial partners. The prototype OMP is being built with 16 Intel i860 RISC microprocessors and 256 parallel memory modules using custom-designed spanning buses, which are 2-D interleaved and orthogonally accessed without conflicts. The 16-processor OMP prototype is targeted to achieve 430 MIPS and 600 Mflops, which have been verified by simulation experiments based on the design parameters used. The prototype OMP machine will be initially applied for imageprocessing, computer vision, and neural network simulation applications. We summarize important vision and imagingalgorithms that can be restructured with neural network models. These algorithms can efficiently run on the OMP hardware with linear speedup. The ultimate goal is to develop a high-performance Visual Computer (Viscom) for integrated low- and high-level imageprocessing and vision tasks.
This paper describes the design of a very large scale integration (VLSI) application specific integrated circuit (ASIC) for use in pattern recognition. The pattern recognition scheme uses Hu1 and Mailra''s2 al...
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ISBN:
(纸本)0819403482
This paper describes the design of a very large scale integration (VLSI) application specific integrated circuit (ASIC) for use in pattern recognition. The pattern recognition scheme uses Hu1 and Mailra''s2 algorithms for moment invariants. A prototype design was generated that resolved the long delay time of the multiplier by custom designing adder cells based on the Manchester carry chain. Use of the Manchester carry chain effectively incorporated the lookahead carry function into the adder cells. The prototype ASIC is currently being fabricated in 2. 0-mm compiled simulator for metal oxide semiconductor (CMOS) technology (simulated at 20 MHz). The prototype consisted of a 4x8 multiplier and a 12-bit accumulator stage. The present ASIC design consists of a 9x26 multiplier (maximum propagation time of 50 ns) and a 48-bit accumulator stage. The final ASICs will be used in parallel at the board level to achieve the 56 MegaPixels/s [230 million operations per second (MOPs)] necessary to perform the moment invariant algorithms in real time on 512x512 pixel images with 256 grey scales. 2.
A nass image storage and retrieval system is described that utilizesdigital tape for image storage, and provides fast retrieval of imagebatches from a tape archive through use of multiple retrieval tapedrives in paral...
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ISBN:
(纸本)0819402958
A nass image storage and retrieval system is described that utilizes
digital tape for image storage, and provides fast retrieval of image
batches from a tape archive through use of multiple retrieval tape
drives in parallel. Suitable applications are described and system cost
is compared with alternative storage media.
Powerful new signal processingalgorithms are now becoming available for such tasks as the detection and tracking of multiple targets via image sequence analysis. For typical real-time applications, these algorithms r...
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ISBN:
(纸本)0819403466
Powerful new signal processingalgorithms are now becoming available for such tasks as the detection and tracking of multiple targets via image sequence analysis. For typical real-time applications, these algorithms require throughputs on the order of hundreds to thousands of MFLOPS. In order to achieve such throughputs, it is necessary to employ parallelprocessing architectures, which normally require large size, weight and power consumption for their implementation. We have developed a high-performance, programmable MIMD processor called the SCC-100 which is particularly well-suited for miniaturization using hybrid wafer-scale packaging technology. A 20-node configuration with a peak throughput in excess of 1 GFLOPS will be packaged in a three-inch cube using this approach.
This conference proceedings contains 25 papers. The main subjects are color imageprocessing, median and order statistic filters, morphological and stack filters, nonlinear filters, neural networks applications, image...
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ISBN:
(纸本)081940294X
This conference proceedings contains 25 papers. The main subjects are color imageprocessing, median and order statistic filters, morphological and stack filters, nonlinear filters, neural networks applications, image-processingalgorithms, and image recognition and learning in parallel networks.
This paper presents an analytical method to measure the performance of a proposed parallelprocessing computer architecture for imageprocessingapplications. The main idea behind this architecture is to carry out ima...
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ISBN:
(纸本)0819402931
This paper presents an analytical method to measure the performance of a proposed parallelprocessing computer architecture for imageprocessingapplications. The main idea behind this architecture is to carry out imageprocessing work in a highly parallel manner so that the response time is shorter. The proposed architecture keeps both the processor and the memory system as busy as possible in order to obtain faster response time and proper utilization of the hardware compared to a conventional parallelprocessing architecture. Our proposed architecture consists of an array of processing elements(PEs), a system control unit(SCU), interconnection network and memory modules. Each PE contains two central processing units (CPU), one is responsible for the execution of all non-memory operations and the other is responsible for all memory operations. The overall response time of a job is faster because we divide the actual execution and the memory operation into two separate entities and carry them out concurrently. We develop an analytical method to evaluate the performance of the proposed architecture in terms of processor utilization and number of busy memory modules. We also present some imageprocessingalgorithms suitable for the proposed architecture and analyze their performance compared to the conventional system. The results we obtained indicate that our architecture provides better processor utilization, response time and memory usages compared to a conventional parallel architecture.
A real time segmentation algorithm for infrared sequences is presented, based on the iterative application of thermal histogram processing and thresholding. The segmentation algorithm is intrinsically not sequential a...
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ISBN:
(纸本)0819403466
A real time segmentation algorithm for infrared sequences is presented, based on the iterative application of thermal histogram processing and thresholding. The segmentation algorithm is intrinsically not sequential and may therefore be decomposed into a graph of concurrent processing tasks well suited to a parallel implementation. The algorithm is based on the assumption that two pixel populations are present, namely object and background. Since in this hypothesis the separation goodness function should have one single maximum, the algorithm forces this behaviour by redistributing the area of the histogram, i.e. by progressively brightening the target population. An initialization phase finds out potential target areas throughout the current frame in cooperation with a temporal tracking and labeling task, and compiles the search windows set. For each search window the thermal histogram is computed. Then a family of modified histograms is obtained by removing greater and greater areas from the hot tail of the original histogram and by replacing it with an impulse of the same area at the highest extreme of the thermal range. Each of these histograms enters a module which computes a separation goodness function. The separation function presents two adjacent segments: the high thermal segment and the low thermal segment. The former is a constant segment which lasts from the high extreme of the thermal range down to the lowest thermal value of the removed area, the latter has a variable shape and lasts as far as the lowest extreme of the thermal range. The iteration is stopped as soon as the variable segment reaches a monotonically decreasing behaviour. The boundary value between the two segments is chosen as threshold within that window. Experimental results are presented.
In this paper a parallel computer architecture for real time imageprocessing is described. The architecture centers on the direct mapping of a synchronous dataflow graph on hardware and software. Each node (or group ...
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ISBN:
(纸本)0819404411
In this paper a parallel computer architecture for real time imageprocessing is described. The architecture centers on the direct mapping of a synchronous dataflow graph on hardware and software. Each node (or group of nodes) is replaced by a hardware or software module. The processing elements are interconnected by a flexible and fast communication network based on multiple interruptable buses. The prototype SYDAMA I (SYnchronous DAtaflow MAchine) has been built. On this system, many low level imageprocessingalgorithms run in real time at video rate. applications of the system are real time computer vision, real time image enhancement, real time color segmentation, real time depth data processing, robotics, and autonomous vehicle guidance.
Affine signal transformations are useful for modeling self-similar structures in fractal images and shape deformations in visual motion. In the first part of this paper a theoretical framework, called affine morpholog...
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ISBN:
(纸本)081940411X
Affine signal transformations are useful for modeling self-similar structures in fractal images and shape deformations in visual motion. In the first part of this paper a theoretical framework, called affine morphology, is developed to analyze parallel and serial superpositions of affine image transformations. Affine morphology unifies and extends translation-invariant morphological image transformations and their rotation/scaling-invariant generalizations by using action of affine groups on lattices. Several theoretical aspects of affine morphology are explored for binary images. In the second part of the paper, the affine transformations are extended to gray-level images and arbitrary signals, and affine models are developed by using a sum superposition of affine signal transformations. A solution is then given to the problem of estimating the parameters of this sum-affine model using least squares algorithms, and some applications are outlined for image and speech signal processing.
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